CN202362017U - Test device - Google Patents

Test device Download PDF

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Publication number
CN202362017U
CN202362017U CN2011204440638U CN201120444063U CN202362017U CN 202362017 U CN202362017 U CN 202362017U CN 2011204440638 U CN2011204440638 U CN 2011204440638U CN 201120444063 U CN201120444063 U CN 201120444063U CN 202362017 U CN202362017 U CN 202362017U
Authority
CN
China
Prior art keywords
circuit board
utility
model
testing apparatus
test device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
CN2011204440638U
Other languages
Chinese (zh)
Inventor
王文忠
徐伟
文玉远
张晶
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SHANGHAI FUTAILONG AUTOMOBILE ELECTRONIC TECHNOLOGY Co Ltd
Original Assignee
SHANGHAI FUTAILONG AUTOMOBILE ELECTRONIC TECHNOLOGY Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SHANGHAI FUTAILONG AUTOMOBILE ELECTRONIC TECHNOLOGY Co Ltd filed Critical SHANGHAI FUTAILONG AUTOMOBILE ELECTRONIC TECHNOLOGY Co Ltd
Priority to CN2011204440638U priority Critical patent/CN202362017U/en
Application granted granted Critical
Publication of CN202362017U publication Critical patent/CN202362017U/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Abstract

The utility model discloses a test device which comprises a first circuit board, a second circuit board, a third circuit board, a fourth circuit board and a motherboard, wherein the first circuit board, the second circuit board, the third circuit board and the fourth circuit board are in connection with the motherboard; the mother board is in connection with an output interface. The test device only needs one wire harness, which can substantially reduce exploitation costs, shorten an exploitation period, raise the versatility of the test device and meanwhile raise the reliability of the test device.

Description

A kind of testing apparatus
Technical field
The utility model relates to the testing apparatus field, particularly a kind of testing apparatus.
Background technology
Referring to shown in Figure 1, every circuit board and equipment to be tested all need the single line bundle in the existing testing apparatus, and it is connected to equipment to be tested just needs the several threads bundle, has so just increased cost of development, has elongated the construction cycle, has reduced the versatility of testing apparatus.
The utility model content
The technical matters that the utility model will solve provides that a kind of cost is low, the testing apparatus of highly versatile.
For achieving the above object, the technical scheme of the utility model is following:
A kind of testing apparatus, said testing apparatus comprise circuit board one, circuit board two, circuit board three, circuit board four and motherboard, and said circuit board one, circuit board two, circuit board three are connected with motherboard with circuit board four, and said motherboard is connected with output interface.
Through technique scheme, the beneficial effect of the utility model is:
The utility model only needs the single line bundle, and the so very big cost of development that reduced has shortened the construction cycle, has improved the versatility of testing apparatus, has improved the reliability of testing apparatus simultaneously.
Description of drawings
In order to be illustrated more clearly in the utility model embodiment or technical scheme of the prior art; To do to introduce simply to the accompanying drawing of required use in embodiment or the description of the Prior Art below; Obviously, the accompanying drawing in describing below only is some embodiment of the utility model, for those of ordinary skills; Under the prerequisite of not paying creative work, can also obtain other accompanying drawing according to these accompanying drawings.
Fig. 1 is connected synoptic diagram for existing testing apparatus with equipment under test;
Fig. 2 is that the utility model is connected synoptic diagram with equipment under test.
Embodiment
For technological means, creation characteristic that the utility model is realized, reach purpose and be easy to understand understanding with effect, below in conjunction with concrete diagram, further set forth the utility model.
Referring to shown in Figure 2; A kind of testing apparatus of the utility model; Said testing apparatus comprises circuit board one, circuit board two, circuit board three, circuit board four and motherboard, and said circuit board one, circuit board two, circuit board three are connected with motherboard with circuit board four, and said motherboard is connected with output interface.
The utility model in use; The signal of four circuit boards is connected to an output interface through motherboard; Output interface is connected with equipment to be tested through the single line bundle, the wire harness of needs when this just saves in original testing apparatus output interface on the every circuit board and is connected with equipment under test respectively.Just reduce cost of development so, improved tempo of development, made testing apparatus have very high versatility, also improved the reliability of testing apparatus simultaneously.
More than show and described ultimate principle of the utility model and the advantage of principal character and the utility model.The technician of the industry should understand; The utility model is not restricted to the described embodiments; The principle of describing in the foregoing description and the instructions that the utility model just is described; Under the prerequisite that does not break away from the utility model spirit and scope, the utility model also has various changes and modifications, and these variations and improvement all fall in the utility model scope that requires protection.The utility model requires protection domain to be defined by appending claims and equivalent thereof.

Claims (1)

1. testing apparatus; It is characterized in that; Said testing apparatus comprises circuit board one, circuit board two, circuit board three, circuit board four and motherboard, and said circuit board one, circuit board two, circuit board three are connected with motherboard with circuit board four, and said motherboard is connected with output interface.
CN2011204440638U 2011-11-10 2011-11-10 Test device Expired - Lifetime CN202362017U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN2011204440638U CN202362017U (en) 2011-11-10 2011-11-10 Test device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN2011204440638U CN202362017U (en) 2011-11-10 2011-11-10 Test device

Publications (1)

Publication Number Publication Date
CN202362017U true CN202362017U (en) 2012-08-01

Family

ID=46573198

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2011204440638U Expired - Lifetime CN202362017U (en) 2011-11-10 2011-11-10 Test device

Country Status (1)

Country Link
CN (1) CN202362017U (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106571166A (en) * 2016-11-09 2017-04-19 中国空间技术研究院 MT29F series NAND FLASH test aging system with customizable process
RU194203U1 (en) * 2019-03-29 2019-12-03 Федеральное государственное бюджетное образовательное учреждение высшего образования "Петрозаводский государственный университет" FPGA-based NAND memory chip testing device
RU199833U1 (en) * 2019-06-03 2020-09-22 Федеральное государственное бюджетное образовательное учреждение высшего образования "Петрозаводский государственный университет" Modular system for electrical and functional testing of FPGA-based NAND memory chips

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106571166A (en) * 2016-11-09 2017-04-19 中国空间技术研究院 MT29F series NAND FLASH test aging system with customizable process
CN106571166B (en) * 2016-11-09 2020-02-14 中国空间技术研究院 MT29F series NAND FLASH test aging system with customizable flow
RU194203U1 (en) * 2019-03-29 2019-12-03 Федеральное государственное бюджетное образовательное учреждение высшего образования "Петрозаводский государственный университет" FPGA-based NAND memory chip testing device
RU199833U1 (en) * 2019-06-03 2020-09-22 Федеральное государственное бюджетное образовательное учреждение высшего образования "Петрозаводский государственный университет" Modular system for electrical and functional testing of FPGA-based NAND memory chips

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Legal Events

Date Code Title Description
C14 Grant of patent or utility model
GR01 Patent grant
CX01 Expiry of patent term

Granted publication date: 20120801

CX01 Expiry of patent term