CN202306379U - Current mirroring circuit - Google Patents

Current mirroring circuit Download PDF

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Publication number
CN202306379U
CN202306379U CN2011204278200U CN201120427820U CN202306379U CN 202306379 U CN202306379 U CN 202306379U CN 2011204278200 U CN2011204278200 U CN 2011204278200U CN 201120427820 U CN201120427820 U CN 201120427820U CN 202306379 U CN202306379 U CN 202306379U
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pipe
grid
current
drain electrode
nmos
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曾军
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Nationz Technologies Inc
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Nationz Technologies Inc
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Abstract

The utility model relates to a current mirroring circuit, which comprises a current input terminal, a bias terminal, a current output terminal, a variable resistor, a first NMOS tube, a second NMOS tube, a third NMOS tube and a fourth NMOS tube. The first terminal of the variable resistor is connected with the current input terminal, while the third terminal of the variable resistor is connected with the bias terminal. The drain electrode of the first NMOS tube is connected with the second terminal of the variable resistor. The drain electrode of the second NMOS tube is connected with the source electrode of the first NMOS tube, while the source electrode of the second NMOS tube is grounded. The grid electrode of the third NMOS tube is connected with the grid electrode of the second NMOS tube and the drain electrode of the first NMOS tube, while the source electrode of the third NMOS tube is grounded. The grid electrode of the fourth NMOS tube is connected with the grid electrode of the first NMOS tube and the first terminal of the variable resistor. The source electrode of the fourth NMOS tube is connected with the drain electrode of the third NMOS tube, while the drain electrode of the fourth NMOS tube is connected with the current output terminal. Due to the adoption of the current mirroring circuit, when the input current changes, the pressure drop over a self-bias resistor can be adjusted through the variable resistor. Therefore, the reduction of the precision of the image current due to the reason that MOS tubes enter a linear region is avoided and the application requirement on the wide input and output current range can be satisfied.

Description

A kind of current mirroring circuit
Technical field
The utility model relates to the mimic channel field, relates in particular to a kind of current mirroring circuit.
Background technology
Current mirror is an important circuit unit of mimic channel, and it both can be used as bias unit and also can be used as Signal Processing Element, is widely used in the design of various simulations and radio circuit.
Two common tube current mirrors receive the influence of channel length modulation easily, and the current precision of its output is not high.In order to address this problem, people have invented common-source common-gate current mirror, and the adding of cascade device makes that the output impedance of current mirror is very high, and when output end voltage changed, changing noticeably of image current reduced, so precision is greatly improved.But the shortcoming of this current mirror is that the voltage remaining that consumes is excessive, can't be used for the application scenario of low supply voltage.
In order to solve the contradiction between image current precision and the output voltage remaining, people have invented the automatic biasing current mirror again.Fig. 1 is the circuit diagram of automatic biasing current mirror in the prior art.As shown in Figure 1, in the prior art, the automatic biasing current mirror comprises fixed resistance R 0, NMOS pipe NMOS pipe M 11, NMOS manages M 12, NMOS manages M 13With NMOS pipe M 14NMOS manages M 11, NMOS manages M 12, NMOS manages M 13With NMOS pipe M 14Be N-channel MOS FET (Metal-Oxide-Semiconductor Field-Effect Transistor, Metal-Oxide Semiconductor FET) pipe.Fixed resistance R 0The first termination current input terminal, NMOS manages M 11Drain electrode meet fixed resistance R 0Second end; NMOS manages M 12Drain electrode meet NMOS pipe M 11Source electrode, source ground; NMOS manages M 13Grid meet NMOS pipe M 12Grid and NMOS pipe M 11Drain electrode, source ground; NMOS manages M 14Grid meet NMOS pipe M 11Grid and fixed resistance R 0First end, source electrode meets NMOS pipe M 13Drain electrode, drain electrode connects current output terminal.Input current I InBy current input terminal input, output current I OutExport by current output terminal.
Automatic biasing current mirror shown in Figure 1 has reduced a threshold voltage with the voltage remaining that consumes when keeping common-source common-gate current mirror output current advantage of high precision.Automatic biasing current mirror shown in Figure 1 needs each NMOS pipe to be operated in the saturation region in operate as normal, and NMOS manages M 11The condition that is operated in the saturation region is a resistance R 0On pressure drop manage M less than NMOS 11Threshold voltage.Work as input current I InDuring increase, fixed resistance R 0On pressure drop also increase thereupon, as fixed resistance R 0On pressure drop manage M greater than NMOS 11Threshold voltage the time, NMOS manages M 11Will get into linear zone by the saturation region, cause the input impedance of current mirror to reduce, thereby make input and output currents match degree reduce.
Thus it is clear that, as input current I InDuring variation, because resistance R in the automatic biasing current mirror shown in Figure 1 0Resistance fix this resistance R 0On the pressure drop meeting along with input current I InLinear change can cause metal-oxide-semiconductor to get into linear zone and cisco unity malfunction like this, makes the image current precision reduce.Therefore, automatic biasing current mirror shown in Figure 1 can only be operated in a narrower input and output range of current, can not satisfy the application demand of wide input and output electric current.
The utility model content
The utility model technical matters to be solved provides a kind of current mirroring circuit, satisfies the application demand of wide input and output electric current.
For solving the problems of the technologies described above, the utility model provides a kind of current mirroring circuit, comprising:
Current input terminal;
Offset side;
Current output terminal;
Variable resistor, the said current input terminal of said variable-resistance first termination, the said offset side of the 3rd termination;
The one NMOS pipe, the drain electrode of said NMOS pipe connects said variable-resistance second end;
The 2nd NMOS pipe, the drain electrode of said the 2nd NMOS pipe connects the source electrode of said NMOS pipe, source ground;
The 3rd NMOS pipe, the grid of said the 3rd NMOS pipe connect the drain electrode of the grid and the said NMOS pipe of said the 2nd NMOS pipe, source ground;
The 4th NMOS pipe, the grid of said the 4th NMOS pipe connects the grid and said variable-resistance first end of said NMOS pipe, and source electrode connects the drain electrode of said the 3rd NMOS pipe, and drain electrode connects said current output terminal.
Further, above-mentioned current mirroring circuit also can have following characteristics, also is serially connected with fixed resistance between the drain electrode of said variable-resistance second end and said NMOS pipe.
Further, above-mentioned current mirroring circuit also can have following characteristics, also comprises N group current mirror image tube, and wherein, N is a natural number, and each is organized said current mirror image tube and comprises:
The 5th NMOS pipe, the drain electrode of said the 5th NMOS pipe connects the drain electrode of said NMOS pipe, and grid connects the grid of said NMOS pipe;
The 6th NMOS pipe, the drain electrode of said the 6th NMOS pipe connects the source electrode of said the 5th NMOS pipe, and grid connects the grid of said the 2nd NMOS pipe, source ground;
The 7th NMOS pipe, the grid of said the 7th NMOS pipe connects the grid of said the 3rd NMOS pipe, source ground;
The 8th NMOS pipe, the source electrode of said the 8th NMOS pipe connects the drain electrode of said the 7th NMOS pipe, and grid connects the grid of said the 4th NMOS pipe, and drain electrode connects the drain electrode of said the 4th NMOS pipe.
Further, above-mentioned current mirroring circuit also can have following characteristics, and said variable resistor is the PMOS pipe, and the source electrode of said PMOS pipe is said variable-resistance first end, and grid is said variable-resistance the 3rd end, drains to be said variable-resistance second end.
Further, above-mentioned current mirroring circuit also can have following characteristics, the resistance of said variable resistor for forming by n parallel branch, and each said parallel branch comprises the fixed resistance and the switch of series connection, wherein, n is a natural number.
For solving the problems of the technologies described above, the utility model has also proposed a kind of current mirroring circuit, comprising:
Current input terminal;
Offset side;
Current output terminal;
Variable resistor, the said current input terminal of said variable-resistance first termination, the said offset side of the 3rd termination;
The one PMOS pipe, the drain electrode of said PMOS pipe connects said variable-resistance second end;
The 2nd PMOS pipe, the drain electrode of said the 2nd PMOS pipe connects the source electrode of said PMOS pipe, and source electrode meets power supply Vdd;
The 3rd PMOS pipe, the grid of said the 3rd PMOS pipe connect the drain electrode of the grid and the said PMOS pipe of said the 2nd PMOS pipe, and source electrode meets power supply Vdd;
The 4th PMOS pipe, the grid of said the 4th PMOS pipe connects the grid and said variable-resistance first end of said PMOS pipe, and source electrode connects the drain electrode of said the 3rd PMOS pipe, and drain electrode connects said current output terminal.
Further, above-mentioned current mirroring circuit also can have following characteristics, also is serially connected with fixed resistance between the drain electrode of said variable-resistance second end and said PNMOS pipe.
Further, above-mentioned current mirroring circuit also can have following characteristics, also comprises N group current mirror image tube, and wherein, N is a natural number, and each is organized said current mirror image tube and comprises:
The 5th PMOS pipe, the drain electrode of said the 5th PMOS pipe connects the drain electrode of said PMOS pipe, and grid connects the grid of said PMOS pipe;
The 6th PMOS pipe, the drain electrode of said the 6th PMOS pipe connects the source electrode of said the 5th PMOS pipe, and grid connects the grid of said the 2nd PMOS pipe, and source electrode meets power supply Vdd;
The 7th PMOS pipe, the grid of said the 7th PMOS pipe connects the grid of said the 3rd PMOS pipe, and source electrode meets power supply Vdd;
The 8th PMOS pipe, the source electrode of said the 8th PMOS pipe connects the drain electrode of said the 7th PMOS pipe, and grid connects the grid of said the 4th PMOS pipe, and drain electrode connects the drain electrode of said the 4th PMOS pipe.
Further, above-mentioned current mirroring circuit also can have following characteristics, and said variable resistor is the NMOS pipe, and the source electrode of said NMOS pipe is said variable-resistance first end, and grid is said variable-resistance the 3rd end, drains to be said variable-resistance second end.
Further, above-mentioned current mirroring circuit also can have following characteristics, the resistance of said variable resistor for forming by n parallel branch, and each said parallel branch comprises the fixed resistance and the switch of series connection, wherein, n is a natural number.
The current mirroring circuit of the utility model; When input current changes; Can regulate the pressure drop on the self-bias resistor through variable resistor, make the pressure drop on the self-bias resistor constant as far as possible, guarantee that all metal-oxide-semiconductors all work in the saturation region; Avoid causing the image current precision to reduce, thereby can satisfy the application demand of wide input and output electric current owing to metal-oxide-semiconductor gets into linear zone.
Description of drawings
Fig. 1 is the circuit diagram of automatic biasing current mirror in the prior art;
Fig. 2 is a kind of structural drawing of current mirroring circuit among the utility model embodiment;
Fig. 3 is the another kind of structural drawing of current mirroring circuit among the utility model embodiment;
Fig. 4 is another structural drawing of current mirroring circuit among the utility model embodiment;
Fig. 5 is another structural drawing of current mirroring circuit among the utility model embodiment;
Fig. 6 is electric resistance array and equivalent circuit diagram thereof.
Embodiment
Below in conjunction with accompanying drawing the principle and the characteristic of the utility model are described, institute gives an actual example and only is used to explain the utility model, is not the scope that is used to limit the utility model.
Fig. 2 is a kind of structural drawing of current mirroring circuit among the utility model embodiment.As shown in Figure 2, in the present embodiment, current mirroring circuit comprises that current input terminal, current output terminal, offset side, PMOS manage M 10, fixed resistance R 0, NMOS manages M 11, NMOS manages M 12, NMOS manages M 13With NMOS pipe M 14Wherein, NMOS pipe M 11, NMOS manages M 12, NMOS manages M 13With NMOS pipe M 14Be N-channel MOS FET pipe.Wherein, PMOS pipe M 10Be P channel mosfet pipe, PMOS manages M 10In this current mirroring circuit as variable resistor.Visible by Fig. 2, PMOS manages M 10Source electrode connect current input terminal, grid meets offset side Vbias; Fixed resistance R 0First termination PMOS pipe M 10Drain electrode, NMOS manages M 11Drain electrode meet fixed resistance R 0Second end; NMOS manages M 12Drain electrode meet NMOS pipe M 11Source electrode, source ground; NMOS manages M 13Grid meet NMOS pipe M 12Grid and NMOS pipe M 11Drain electrode, source ground; NMOS manages M 14Grid meet NMOS pipe M 11Grid and PMOS pipe M 10Source electrode, source electrode meets NMOS pipe M 13Drain electrode, drain electrode connects current output terminal.Input current I InBy current input terminal input, output current I OutExport by current output terminal.
In the side circuit design, NMOS manages M 11, NMOS manages M 12, NMOS manages M 13With NMOS pipe M 14These four transistors are long ditch deferent, and channel length one shows and improve the currents match degree, and breadth length ratio is decided according to the current mirror ratio.
In other embodiment of the utility model, current mirroring circuit can not comprise fixed resistance R 0, in this case, NMOS manages M 11Drain electrode directly meet PMOS pipe M 10The drain electrode of (getting final product the power transformation resistance).
In other embodiment of the utility model, the PMOS pipe M in the current mirroring circuit shown in Figure 2 10Also can replace by other variable resistors, as shown in Figure 6.Fig. 6 is electric resistance array and equivalent circuit diagram thereof.As shown in Figure 6, electric resistance array is made up of n parallel branch, comprises n fixed resistance R 1, R 2R N-1, R nWith n switch V Ctrl1, V Ctrl2V Ctrln-1, V Ctrln, each parallel branch comprises the fixed resistance and the switch of series connection, fixed resistance R 1With switch V Ctrl1Be composed in series first parallel branch, fixed resistance R 2With switch V Ctrl2Be composed in series second parallel branch ..., fixed resistance R N-1With switch V Ctrln-1Be composed in series the n-1 parallel branch, fixed resistance R nWith switch V CtrlnBe composed in series the n parallel branch.The electric resistance array on Fig. 6 left side is equivalent to the variable resistor R on the right EqWherein, n is a natural number.
Visible by Fig. 2, in the present embodiment, current mirroring circuit is compared with the circuit of automatic biasing current mirror of the prior art shown in Figure 1, has increased as variable-resistance PMOS pipe M 10, make whole self-bias resistor (fixed resistance R 0Add variable resistor) become variable resistor by fixed resistance.When the input current of current mirror changes, as variable-resistance PMOS pipe M 10Regulate the pressure drop on the self-bias resistor, make NMOS manage M 11, NMOS manages M 12, NMOS manages M 13, NMOS manages M 14All work in the saturation region, improved the matching degree of input and output electric currents.Particularly, utilize PMOS pipe M 10The characteristic that changes with gate source voltage of resistance, as input current I InHour, PMOS manages M 10Source voltage is lower, so PMOS pipe M 10On pressure drop apparent in view, thereby compensated whole self-bias resistor.Otherwise as input current I InWhen big, PMOS manages M 10Source voltage terminal is higher, so PMOS pipe M 10On pressure drop ratio less, little to the influence of whole self-bias resistor value like this, thereby can not cause metal-oxide-semiconductor to get into linear zone and reduce the image current precision.
Therefore; Current mirroring circuit among the utility model embodiment when input current changes, can be regulated the pressure drop on the self-bias resistor through variable resistor; Make the pressure drop on the self-bias resistor constant as far as possible; Guarantee that all NMOS pipes all work in the saturation region, avoid causing the image current precision to reduce, thereby make the current mirroring circuit of the utility model can satisfy the application demand of wide input and output electric current owing to metal-oxide-semiconductor gets into linear zone.
When the required input and output electric current variation range of current mirroring circuit continues to strengthen, can be through strengthening the size of image current pipe, make current mirroring circuit can satisfy the application demand of wideer input and output range of current, as shown in Figure 3.
Fig. 3 is the another kind of structural drawing of current mirroring circuit among the utility model embodiment.Current mirroring circuit shown in Figure 3 is compared with current mirror shown in Figure 2, has increased N (N is a natural number) group NMOS pipe, and wherein, each group NMOS pipe comprises NMOS pipe M 15, NMOS manages M 16, NMOS manages M 17With NMOS pipe M 18NMOS manages M 15Drain electrode meet NMOS pipe M 11Drain electrode, grid meets NMOS pipe M 11Grid; NMOS manages M 16Drain electrode meet NMOS pipe M 15Source electrode, grid meets NMOS pipe M 12Grid, source ground; NMOS manages M 17Grid meet NMOS pipe M 13Grid, source ground; NMOS manages M 18Source electrode meet NMOS pipe M 17Drain electrode, grid meets NMOS pipe M 14Grid, drain electrode meets NMOS pipe M 14Drain electrode.All the other adopt metal-oxide-semiconductor and M that dotted line connects among Fig. 3 15~ M 18Purposes is identical, describes no longer one by one here.
Current mirroring circuit shown in Figure 2 is the tandem circuit of the utility model, the NMOS pipe M shown in Fig. 3 15, NMOS manages M 16, NMOS manages M 17With NMOS pipe M 18And the metal-oxide-semiconductor that adopts dotted line to connect among Fig. 3 is auxiliary current mirror image pipe, has only as input current I InWhen big, auxiliary current mirror image Guan Caihui inserts tandem circuit shown in Figure 2.NMOS manages M 15, NMOS manages M 16, NMOS manages M 17With NMOS pipe M 18Four constitute one group of auxiliary current mirror image pipe, and they must insert simultaneously, have identical logarithm to guarantee the right and left metal-oxide-semiconductor.In concrete the application, the auxiliary current mirror image pipe group that actual needs inserts is counted N and input current I InSize relevant, as input current I InWhen big, need the auxiliary current mirror image pipe group number of access many, and as input current I InHour, need the auxiliary current mirror image pipe group number of access few.
According to the current expression of saturation region metal-oxide-semiconductor, as input current I InWhen being increased to greatly, constant if the breadth length ratio of current mirror image tube is kept, then the overdrive voltage of this metal-oxide-semiconductor must increase.With Fig. 2 is example, and this may cause metal-oxide-semiconductor M 12Get into linear zone, thereby cause the image current precision to reduce.Fig. 3 has replaced the current mirror image tube of Fig. 2 with current mirror pipe array, as input current I InWhen being increased to greatly, the auxiliary current mirror image pipe of access can be avoided enlarging markedly of overdrive voltage, thereby can suppress metal-oxide-semiconductor entering linear zone, avoids the image current precision to reduce.
Current mirroring circuit shown in Figure 3 can satisfy the application demand of wideer input and output range of current, can when the input current variation range is very big, use.
Visible by Fig. 3; Current mirroring circuit in the present embodiment; When input current changes, can keep the pressure drop on the self-bias resistor through variable resistor, make it constant as far as possible; Thereby can not cause metal-oxide-semiconductor entering linear zone and the image current precision is reduced, therefore can satisfy the application demand of wide input and output electric current.
Fig. 4 is another structural drawing of current mirroring circuit among the utility model embodiment.As shown in Figure 4, in the present embodiment, current mirroring circuit comprises that current mirroring circuit comprises that current input terminal, current output terminal, offset side, NMOS manage M 20, fixed resistance R 0, PMOS manages M 21, PMOS manages M 22, PMOS manages M 23With PMOS pipe M 24Wherein, PMOS pipe M 21, PMOS manages M 22, PMOS manages M 23With PMOS pipe M 24Be P channel mosfet pipe.Wherein, NMOS pipe M 20Be N-channel MOS FET pipe, NMOS manages M 20In this current mirroring circuit as variable resistor.Visible by Fig. 4, NMOS manages M 20Source electrode connect current input terminal, grid meets offset side Vbias; Fixed resistance R 0First termination NMOS pipe M 20Drain electrode, PMOS manages M 21Drain electrode meet fixed resistance R 0Second end; PMOS manages M 22Drain electrode meet PMOS pipe M 21Source electrode, source electrode meets power supply Vdd; PMOS manages M 23Grid meet PMOS pipe M 22Grid and PMOS pipe M 21Drain electrode, source electrode meets power supply Vdd; PMOS manages M 24Grid meet PMOS pipe M 21Grid and NMOS pipe M 20Source electrode, source electrode meets PMOS pipe M 23Drain electrode, drain electrode connects current output terminal.Input current I InBy current input terminal input, output current I OutExport by current output terminal.
It is thus clear that current mirroring circuit shown in Figure 4 and current mirroring circuit shown in Figure 2 adopt opposite metal-oxide-semiconductor as variable resistor and current mirror image tube.
In other embodiment of the utility model, current mirroring circuit shown in Figure 4 can not comprise fixed resistance R 0, in this case, PMOS manages M 21Drain electrode directly meet NMOS pipe M 20The drain electrode of (getting final product the power transformation resistance).
In other embodiment of the utility model, the NMOS pipe M in the current mirroring circuit shown in Figure 4 20Also electric resistance array for example shown in Figure 6 can be replaced by other variable resistors.
Visible by Fig. 4; Current mirroring circuit in the present embodiment when input current changes, can be regulated the pressure drop on the self-bias resistor through variable resistor; Make the pressure drop on the self-bias resistor constant as far as possible; Guarantee that all PMOS pipes all work in the saturation region, avoid causing the image current precision to reduce, thereby make the current mirroring circuit of present embodiment can satisfy the application demand of wide input and output electric current owing to metal-oxide-semiconductor gets into linear zone.
When the required input and output electric current variation range of current mirroring circuit continues to strengthen, can make current mirroring circuit can satisfy the application demand of wideer input and output range of current through strengthening the size of image current pipe.At this moment, can add the sort of auxiliary current mirror image pipe among similar Fig. 3 with current mirroring circuit shown in Figure 4 as tandem circuit.Promptly on current mirroring circuit basis shown in Figure 4, add N group auxiliary current mirror image pipe.Fig. 5 is another structural drawing of current mirroring circuit among the utility model embodiment.As shown in Figure 5, each group auxiliary current mirror image pipe comprises PMOS pipe M 25, PMOS manages M 26, PMOS manages M 27With PMOS pipe M 28PMOS manages M 25Drain electrode meet PMOS pipe M 21Drain electrode, grid meets PMOS pipe M 21Grid; PMOS manages M 26Drain electrode meet PMOS pipe M 25Source electrode, grid meets PMOS pipe M 22Grid, source electrode meets power supply Vdd; PMOS manages M 27Grid meet PMOS pipe M 23Grid, source electrode meets power supply Vdd; PMOS manages M 28Source electrode meet PMOS pipe M 27Drain electrode, grid meets PMOS pipe M 24Grid, drain electrode meets PMOS pipe M 24Drain electrode.
Among Fig. 5, PMOS manages M 25, PMOS manages M 26, PMOS manages M 27With PMOS pipe M 28Must insert simultaneously in the current mirroring circuit shown in Figure 4, have identical logarithm to guarantee the right and left metal-oxide-semiconductor.In concrete the application, the auxiliary current mirror image pipe group that actual needs inserts is counted N and input current I InSize relevant, as input current I InWhen big, need the auxiliary current mirror image pipe group number of access many, and as input current I InHour, need the auxiliary current mirror image pipe group number of access few.
Visible by Fig. 5; Current mirroring circuit in the present embodiment; When input current changes, can keep the pressure drop on the self-bias resistor through variable resistor, make it constant as far as possible; Thereby can not cause metal-oxide-semiconductor entering linear zone and the image current precision is reduced, therefore can satisfy the application demand of wide input and output electric current.
The above is merely the preferred embodiment of the utility model, and is in order to restriction the utility model, not all within the spirit and principle of the utility model, any modification of being done, is equal to replacement, improvement etc., all should be included within the protection domain of the utility model.

Claims (10)

1. a current mirroring circuit is characterized in that, comprising:
Current input terminal;
Offset side;
Current output terminal;
Variable resistor, the said current input terminal of said variable-resistance first termination, the said offset side of the 3rd termination;
The one NMOS pipe, the drain electrode of said NMOS pipe connects said variable-resistance second end;
The 2nd NMOS pipe, the drain electrode of said the 2nd NMOS pipe connects the source electrode of said NMOS pipe, source ground;
The 3rd NMOS pipe, the grid of said the 3rd NMOS pipe connect the drain electrode of the grid and the said NMOS pipe of said the 2nd NMOS pipe, source ground;
The 4th NMOS pipe, the grid of said the 4th NMOS pipe connects the grid and said variable-resistance first end of said NMOS pipe, and source electrode connects the drain electrode of said the 3rd NMOS pipe, and drain electrode connects said current output terminal.
2. current mirroring circuit according to claim 1 is characterized in that, also is serially connected with fixed resistance between the drain electrode of said variable-resistance second end and said NMOS pipe.
3. current mirroring circuit according to claim 1 is characterized in that, also comprises N group current mirror image tube, and wherein, N is a natural number, and each is organized said current mirror image tube and comprises:
The 5th NMOS pipe, the drain electrode of said the 5th NMOS pipe connects the drain electrode of said NMOS pipe, and grid connects the grid of said NMOS pipe;
The 6th NMOS pipe, the drain electrode of said the 6th NMOS pipe connects the source electrode of said the 5th NMOS pipe, and grid connects the grid of said the 2nd NMOS pipe, source ground;
The 7th NMOS pipe, the grid of said the 7th NMOS pipe connects the grid of said the 3rd NMOS pipe, source ground;
The 8th NMOS pipe, the source electrode of said the 8th NMOS pipe connects the drain electrode of said the 7th NMOS pipe, and grid connects the grid of said the 4th NMOS pipe, and drain electrode connects the drain electrode of said the 4th NMOS pipe.
4. current mirroring circuit according to claim 1 is characterized in that, said variable resistor is the PMOS pipe, and the source electrode of said PMOS pipe is said variable-resistance first end, and grid is said variable-resistance the 3rd end, drains to be said variable-resistance second end.
5. current mirroring circuit according to claim 1 is characterized in that, the resistance of said variable resistor for forming by n parallel branch, and each said parallel branch comprises the fixed resistance and the switch of series connection, wherein, n is a natural number.
6. a current mirroring circuit is characterized in that, comprising:
Current input terminal;
Offset side;
Current output terminal;
Variable resistor, the said current input terminal of said variable-resistance first termination, the said offset side of the 3rd termination;
The one PMOS pipe, the drain electrode of said PMOS pipe connects said variable-resistance second end;
The 2nd PMOS pipe, the drain electrode of said the 2nd PMOS pipe connects the source electrode of said PMOS pipe, and source electrode meets power supply Vdd;
The 3rd PMOS pipe, the grid of said the 3rd PMOS pipe connect the drain electrode of the grid and the said PMOS pipe of said the 2nd PMOS pipe, and source electrode meets power supply Vdd;
The 4th PMOS pipe, the grid of said the 4th PMOS pipe connects the grid and said variable-resistance first end of said PMOS pipe, and source electrode connects the drain electrode of said the 3rd PMOS pipe, and drain electrode connects said current output terminal.
7. current mirroring circuit according to claim 6 is characterized in that, also is serially connected with fixed resistance between the drain electrode of said variable-resistance second end and said PNMOS pipe.
8. current mirroring circuit according to claim 6 is characterized in that, also comprises N group current mirror image tube, and wherein, N is a natural number, and each is organized said current mirror image tube and comprises:
The 5th PMOS pipe, the drain electrode of said the 5th PMOS pipe connects the drain electrode of said PMOS pipe, and grid connects the grid of said PMOS pipe;
The 6th PMOS pipe, the drain electrode of said the 6th PMOS pipe connects the source electrode of said the 5th PMOS pipe, and grid connects the grid of said the 2nd PMOS pipe, and source electrode meets power supply Vdd;
The 7th PMOS pipe, the grid of said the 7th PMOS pipe connects the grid of said the 3rd PMOS pipe, and source electrode meets power supply Vdd;
The 8th PMOS pipe, the source electrode of said the 8th PMOS pipe connects the drain electrode of said the 7th PMOS pipe, and grid connects the grid of said the 4th PMOS pipe, and drain electrode connects the drain electrode of said the 4th PMOS pipe.
9. current mirroring circuit according to claim 6 is characterized in that, said variable resistor is the NMOS pipe, and the source electrode of said NMOS pipe is said variable-resistance first end, and grid is said variable-resistance the 3rd end, drains to be said variable-resistance second end.
10. current mirroring circuit according to claim 6 is characterized in that, the resistance of said variable resistor for forming by n parallel branch, and each said parallel branch comprises the fixed resistance and the switch of series connection, wherein, n is a natural number.
CN2011204278200U 2011-11-02 2011-11-02 Current mirroring circuit Expired - Lifetime CN202306379U (en)

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CN103092252A (en) * 2012-10-23 2013-05-08 深圳先进技术研究院 Power-independent biasing circuit
CN103592988A (en) * 2012-08-14 2014-02-19 上海华虹宏力半导体制造有限公司 Circuit for compensating voltage coefficient of reference current
CN104391538A (en) * 2014-11-20 2015-03-04 无锡中星微电子有限公司 High-voltage cascade current mirror circuit
CN109901655A (en) * 2019-03-29 2019-06-18 上海华虹宏力半导体制造有限公司 Generating circuit from reference voltage
CN109947172A (en) * 2019-04-11 2019-06-28 苏州大学 A kind of high output resistance image current source circuit of low pressure drop
CN110932722A (en) * 2019-12-04 2020-03-27 芯创智（北京）微电子有限公司 Capacitance multiplication circuit applied to phase-locked loop filter
CN112886931A (en) * 2021-01-28 2021-06-01 深圳市万微半导体有限公司 Digital weighted current source circuit for eliminating offset error of operational amplifier
CN114499130A (en) * 2022-04-14 2022-05-13 深圳市思远半导体有限公司 Self-adaptive constant-on-time step-down direct current converter

Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103592988B (en) * 2012-08-14 2015-08-19 上海华虹宏力半导体制造有限公司 To the circuit that the voltage coefficient of reference current compensates
CN103592988A (en) * 2012-08-14 2014-02-19 上海华虹宏力半导体制造有限公司 Circuit for compensating voltage coefficient of reference current
CN103092252A (en) * 2012-10-23 2013-05-08 深圳先进技术研究院 Power-independent biasing circuit
CN103092252B (en) * 2012-10-23 2016-04-13 深圳先进技术研究院 A kind of biasing circuit irrelevant with power supply
CN103076838B (en) * 2012-12-28 2014-10-08 中国科学院微电子研究所 Current mirror and complementary bias method thereof
CN103076838A (en) * 2012-12-28 2013-05-01 中国科学院微电子研究所 Current mirror and complementary bias method thereof
CN104391538A (en) * 2014-11-20 2015-03-04 无锡中星微电子有限公司 High-voltage cascade current mirror circuit
CN104391538B (en) * 2014-11-20 2016-07-20 无锡中感微电子股份有限公司 High-voltage cascade current mirroring circuit
CN109901655A (en) * 2019-03-29 2019-06-18 上海华虹宏力半导体制造有限公司 Generating circuit from reference voltage
CN109947172A (en) * 2019-04-11 2019-06-28 苏州大学 A kind of high output resistance image current source circuit of low pressure drop
CN109947172B (en) * 2019-04-11 2024-01-26 苏州大学 Mirror current source circuit with low voltage drop and high output resistance
CN110932722A (en) * 2019-12-04 2020-03-27 芯创智（北京）微电子有限公司 Capacitance multiplication circuit applied to phase-locked loop filter
CN112886931A (en) * 2021-01-28 2021-06-01 深圳市万微半导体有限公司 Digital weighted current source circuit for eliminating offset error of operational amplifier
CN114499130A (en) * 2022-04-14 2022-05-13 深圳市思远半导体有限公司 Self-adaptive constant-on-time step-down direct current converter
CN114499130B (en) * 2022-04-14 2022-07-22 深圳市思远半导体有限公司 Self-adaptive constant-on-time step-down direct-current converter

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