CN202305806U - Embedded multi-kernel processing satellite navigation receiver - Google Patents
Embedded multi-kernel processing satellite navigation receiver Download PDFInfo
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- CN202305806U CN202305806U CN2011203994190U CN201120399419U CN202305806U CN 202305806 U CN202305806 U CN 202305806U CN 2011203994190 U CN2011203994190 U CN 2011203994190U CN 201120399419 U CN201120399419 U CN 201120399419U CN 202305806 U CN202305806 U CN 202305806U
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- 238000012545 processing Methods 0.000 title claims abstract description 23
- 230000006870 function Effects 0.000 abstract description 7
- 238000013461 design Methods 0.000 abstract description 4
- 238000011161 development Methods 0.000 abstract description 3
- 230000015654 memory Effects 0.000 abstract description 3
- 238000004891 communication Methods 0.000 abstract 1
- 238000012795 verification Methods 0.000 abstract 1
- 239000000047 product Substances 0.000 description 5
- 230000005540 biological transmission Effects 0.000 description 2
- 238000012544 monitoring process Methods 0.000 description 2
- 230000003044 adaptive effect Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- DMBHHRLKUKUOEG-UHFFFAOYSA-N diphenylamine Chemical compound C=1C=CC=CC=1NC1=CC=CC=C1 DMBHHRLKUKUOEG-UHFFFAOYSA-N 0.000 description 1
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Abstract
The utility model discloses an embedded multi-kernel processing satellite navigation receiver. The receiver comprises a task scheduling module, a baseband signal processing module and a navigation data processing module, wherein the task scheduling module comprises an embedded task scheduling central processing unit (CPU); the baseband signal processing module comprises a embedded capture special CPU and an embedded track channel processing CPU; the navigation data processing module comprises an embedded navigation data analyzing CPU and an embedded application program CPU; and the embedded CPUs are in mutual communication connection through a low-delay bus. The receiver adopts embedded CPU kernels, the design of hardware is simple, and functions of a product are required to be improved or the product is required to be upgraded by only transmitting new software to nonvolatile memories arranged in the embedded CPUs through an upgrading interface, so the flexibility and the environment adaptability of the satellite navigation receiver are enhanced, the development time is also reduced, and the difficulty in verification and debugging is reduced.
Description
Technical field
The utility model relates to a kind of embedded multi-core and handles satellite navigation receiver.
Background technology
The baseband functions module of common satellite navigation (like the Big Dipper, GPS or GLONASS) receiver acquisition tracking satellite signal is used specialized hardware and DSP, perhaps on FPGA, realizes baseband functions with the HDL language description.The shortcoming of doing like this is, the time of exploitation checking is longer, and number of parts possibly increase, be unfavorable for making, when among the product module is placed into other products, using as part, the monitoring running status very trouble that just becomes, revise and the difficulty of upgrading also very big.
The utility model content
The purpose of the utility model is to solve the deficiency of existing satellite navigation receiver; Provide a kind of novel embedded multinuclear to handle satellite navigation receiver; It is long to overcome the development time that the conventional satellite navigation neceiver uses ASIC, DSP or FPGA hardware description to bring; Shortcomings such as number of parts is many, and ruuning situation monitoring, software function modification and software upgrading difficulty are big.
The purpose of the utility model realizes through following technical scheme: embedded multi-core is handled satellite navigation receiver; It comprises task scheduling modules, baseband signal processing module and navigation data processing module; Task scheduling modules comprises a built-in tasks scheduling CPU; Baseband signal processing module comprises an embedded dedicated cpu and the embedded tracing channel processing CPU of catching; The navigation data processing module comprises an embedded navigation data parsing CPU and a built-in application program CPU, and each embedded type CPU postpones the bus connection that communicates with one another through low respectively.
The utility model also comprises a upgrade interface module, and the upgrade interface module is connected with the low bus that postpones.
The beneficial effect of the utility model is: use the embedded type CPU kernel, hardware designs is simple, has used the ripe assembly of checking, and the checking workload is very little; Improve product function or solve potential problems need upgrade the time at needs; Only need to get final product to the built-in new software of nonvolatile memory transmission of embedded type CPU through upgrade interface; The dirigibility and the adaptive capacity to environment of satellite navigation receiver have been strengthened; Simultaneously also reduce the development time, reduced the difficulty of checking and debugging.
Description of drawings
Fig. 1 is the utility model structural representation block scheme.
Embodiment
The technical scheme of the utility model is described in further detail: as shown in Figure 1 below in conjunction with accompanying drawing; Embedded multi-core is handled satellite navigation receiver; It comprises task scheduling modules, baseband signal processing module and navigation data processing module; Task scheduling modules comprises a built-in tasks scheduling CPU, and baseband signal processing module comprises an embedded dedicated cpu and the embedded tracing channel processing CPU of catching, and the navigation data processing module comprises an embedded navigation data parsing CPU and a built-in application program CPU; Each embedded type CPU postpones the bus connection that communicates with one another through low respectively; Very simply and not need additional designs HDL code owing to used ready-made embedded type CPU kernel, hardware designs to become, the checking workload significantly reduces.It also comprises a upgrade interface module; The upgrade interface module is accomplished external protocol and the inner low exchanges data of bus, the supervision and the Product Renewal upgrade function of system running state of postponing; Improve product function or solve potential problems need upgrade the time at needs, need through the upgrade interface module to the built-in new software of nonvolatile memory transmission of embedded type CPU.
For each embedded type CPU that the particular job task is arranged, the software process of execution is confirmed according to task.The CPU that for example is responsible for catching spreading code just need not carry out the task of track loop.Embedded multi-core is handled satellite navigation receiver and has been used 5 embedded type CPUs altogether, and the model of each CPU is confirmed according to its task computation amount of being responsible for: the calculated amount of catching work is the heaviest, and then the model performance of this CPU is best; The calculated amount of task scheduling is very little, and then the model performance of this CPU needn't be very strong.
Claims (2)
1. embedded multi-core is handled satellite navigation receiver; It is characterized in that: it comprises task scheduling modules, baseband signal processing module and navigation data processing module; Task scheduling modules comprises a built-in tasks scheduling CPU; Baseband signal processing module comprises an embedded dedicated cpu and the embedded tracing channel processing CPU of catching; The navigation data processing module comprises an embedded navigation data parsing CPU and a built-in application program CPU, and each embedded type CPU postpones the bus connection that communicates with one another through low respectively.
2. embedded multi-core according to claim 1 is handled satellite navigation receiver, and it is characterized in that: it also comprises a upgrade interface module, and the upgrade interface module is connected with the low bus that postpones.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011203994190U CN202305806U (en) | 2011-10-19 | 2011-10-19 | Embedded multi-kernel processing satellite navigation receiver |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011203994190U CN202305806U (en) | 2011-10-19 | 2011-10-19 | Embedded multi-kernel processing satellite navigation receiver |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN202305806U true CN202305806U (en) | 2012-07-04 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN2011203994190U Expired - Fee Related CN202305806U (en) | 2011-10-19 | 2011-10-19 | Embedded multi-kernel processing satellite navigation receiver |
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| CN (1) | CN202305806U (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103439725A (en) * | 2013-08-21 | 2013-12-11 | 上海司南卫星导航技术有限公司 | Universal GNSS receiver based on asymmetric dual-core central processing unit |
| CN105607082A (en) * | 2016-01-13 | 2016-05-25 | 广东欧珀移动通信有限公司 | Method and apparatus for reducing GPS interference, and mobile terminal |
| WO2022188379A1 (en) * | 2021-03-12 | 2022-09-15 | 国网智能科技股份有限公司 | Artificial intelligence system and method serving electric power robot |
-
2011
- 2011-10-19 CN CN2011203994190U patent/CN202305806U/en not_active Expired - Fee Related
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103439725A (en) * | 2013-08-21 | 2013-12-11 | 上海司南卫星导航技术有限公司 | Universal GNSS receiver based on asymmetric dual-core central processing unit |
| CN105607082A (en) * | 2016-01-13 | 2016-05-25 | 广东欧珀移动通信有限公司 | Method and apparatus for reducing GPS interference, and mobile terminal |
| CN105607082B (en) * | 2016-01-13 | 2017-11-07 | 广东欧珀移动通信有限公司 | Reduce the method, device and mobile terminal of global position system GPS interference |
| WO2022188379A1 (en) * | 2021-03-12 | 2022-09-15 | 国网智能科技股份有限公司 | Artificial intelligence system and method serving electric power robot |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C56 | Change in the name or address of the patentee | ||
| CP01 | Change in the name or title of a patent holder |
Address after: 610017 Chengdu hi tech Zone Science and Technology Incubation Park Patentee after: CHENGDU GOLDENWAY TECHNOLOGY CO., LTD. Address before: 610017 Chengdu hi tech Zone Science and Technology Incubation Park Patentee before: Chengdu Goldenway Technology Co.,Ltd. |
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| PE01 | Entry into force of the registration of the contract for pledge of patent right |
Denomination of utility model: Embedded multi-kernel processing satellite navigation receiver Effective date of registration: 20131204 Granted publication date: 20120704 Pledgee: Xi'an hi tech Development Zone Guoxin micro credit Co., Ltd. Pledgor: CHENGDU GOLDENWAY TECHNOLOGY CO., LTD. Registration number: 2013990000924 |
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| PLDC | Enforcement, change and cancellation of contracts on pledge of patent right or utility model | ||
| PE01 | Entry into force of the registration of the contract for pledge of patent right |
Denomination of utility model: Embedded multi-kernel processing satellite navigation receiver Effective date of registration: 20131204 Granted publication date: 20120704 Pledgee: Xi'an hi tech Development Zone Guoxin micro credit Co., Ltd. Pledgor: CHENGDU GOLDENWAY TECHNOLOGY CO., LTD. Registration number: 2013990000924 |
|
| PLDC | Enforcement, change and cancellation of contracts on pledge of patent right or utility model | ||
| PC01 | Cancellation of the registration of the contract for pledge of patent right |
Date of cancellation: 20141229 Granted publication date: 20120704 Pledgee: Xi'an hi tech Development Zone Guoxin micro credit Co., Ltd. Pledgor: CHENGDU GOLDENWAY TECHNOLOGY CO., LTD. Registration number: 2013990000924 |
|
| PLDC | Enforcement, change and cancellation of contracts on pledge of patent right or utility model | ||
| C41 | Transfer of patent application or patent right or utility model | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20170109 Address after: 610041 Chengdu hi tech Zone Science and Technology Incubation Park Patentee after: Chengdu Goldenway Electronic Co., Ltd. Address before: 610017 Chengdu hi tech Zone Science and Technology Incubation Park Patentee before: CHENGDU GOLDENWAY TECHNOLOGY CO., LTD. |
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| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20120704 Termination date: 20171019 |
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| CF01 | Termination of patent right due to non-payment of annual fee |