CN202282762U - Low-power-consumption broadband low-noise amplifier - Google Patents
Low-power-consumption broadband low-noise amplifier Download PDFInfo
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- CN202282762U CN202282762U CN2011203960071U CN201120396007U CN202282762U CN 202282762 U CN202282762 U CN 202282762U CN 2011203960071 U CN2011203960071 U CN 2011203960071U CN 201120396007 U CN201120396007 U CN 201120396007U CN 202282762 U CN202282762 U CN 202282762U
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Abstract
The utility model discloses a low-power-consumption broadband low-noise amplifier, which is provided with an input unit 1, an input unit 2, an isolation unit 3, an isolation unit 4 and a load unit 5, wherein a current multiplexing common-gate structure is adopted for each of the input unit 1 and the input unit 2, double cross coupling is performed from gate electrodes to source electrodes and from substrates to the source electrodes of MOS (Metal Oxide Semiconductor) transistors at an input level, and the input impedance of 50 ohms is input through a differential input end via the input unit 1 and the input unit 2. A signal current produced by a PMOS (P-Channel Metal Oxide Semiconductor) transistor is superposed with a signal current produced by an NMOS (N-Channel Metal Oxide Semiconductor) transistor after passing through the isolation unit 4 and then transmitted to the load unit 5 through the isolation unit 3, and finally, an amplified voltage differential signal is output.
Description
Technical field
The utility model relates to a kind of low-power consumption wideband low noise amplifier; Adopt CMOS technology, in radio circuit, have greater advantage, project organization is simple; Improving noiseproof feature and gain while; Power consumption is reduced significantly, have bigger gain bandwidth and input coupling bandwidth, and have less noise factor.
Background technology
Low noise amplifier is the very low amplifier of noise factor; General as the high frequency of all kinds of radio receivers or the amplifying circuit of intermediate-frequency preamplifier and high sensitivity electron detection equipment; For nearly all radio-frequency transmitter system, a requisite module is exactly a low noise amplifier.Since the radiofrequency signal amplitude that receives of system usually very a little less than, the noise of amplifier self maybe be very serious to the interference of signal, therefore hopes to reduce this noise, and certain voltage gain is provided, to improve the signal to noise ratio of output.
The common gate structure amplifier is widely used in the design of wideband low noise amplifier, and main cause is that it has broadband input matching properties, and traditional common gate structure amplifier circuit is as shown in Figure 1.Signal through breadth length ratio and the gate bias voltage of adjustment M1 and M2, can be adjusted the size of current of flow through M1 and M2 by transistor M1, the input of M2 source electrode, and then changes the mutual conductance of M1 and M2
g m, make its input impedance and 50 ohm antennas coupling.Resistance size through adjustment load resistance R1 and R2 can obtain the different voltages with different gain.This structure has the input bandwidth and the gain bandwidth of broad.But traditional common gate structure amplifier has following shortcoming:
The firstth, power consumption is big, the input impedance of traditional common gate structure amplifier be approximately 1/ (
g m+
g Mb), wherein
g mBe the input transistors mutual conductance,
g MbBe the equivalent transconductance of input transistors substrate to the next bulk effect correspondence of source potential difference band.In order to realize the coupling of input impedance and 50 ohm antennas, must make following formula be approximately equal to 50 ohm through increasing operating current to improve the mutual conductance of input pipe.
The secondth, it is low to gain, and traditional common gate structure Amplifier Gain depends on the load impedance size to a great extent, but big ohmic load can bring too much pressure drop, reduces the voltage remaining and the linearity; And big sense value load inductance had both increased chip area and can cause circuit to present the narrowband gain characteristic.
The 3rd is that isolation is poor, because the isolation of traditional common gate structure amplifier is relatively poor, this will cause output end signal to turn back to input, be difficult to satisfy the requirement of system to the isolation index.
Be that noise is big at last, the noise factor of traditional common gate structure amplifier is bigger, often surpasses 4dB.
Summary of the invention
The utility model is for overcoming the deficiency of traditional common gate structure amplifier, a kind of low-power consumption wideband low noise amplifier is provided, can guaranteeing on the broadband character basis that the power consumption of step-down amplifier and noise improve Amplifier Gain and isolation.
The technical scheme that the utility model is taked is following: a kind of low-power consumption wideband low noise amplifier; It is characterized in that: be provided with first, second two input units, first, second two isolated locations and load unit; The positive and negative two ends of difference radio-frequency input signals connect the positive input terminal and the negative input end of first, second two input units respectively; The output of first, second two input units connects corresponding interconnection between the output of first, second two isolated locations and first, second two input units respectively; The output of first isolated location connects load unit, load unit output difference radio frequency output signal; Wherein:
First input block comprises NMOS pipe M1; NMOS manages M2; First; The second two resistance; First; The second two electric capacity; The grid of NMOS pipe M1 and NMOS pipe M2 all connects first bias voltage behind series resistance first resistance and second resistance respectively; The grid of NMOS pipe M1 is connected and is connected the source electrode of NMOS pipe M2 behind first electric capacity and be connected with the negative terminal of difference radio-frequency input signals; The grid of NMOS pipe M2 is connected and is connected the source electrode of NMOS pipe M1 behind second electric capacity and be connected with the anode of difference radio-frequency input signals; The substrate of NMOS pipe M1 connects the source electrode of NMOS pipe M2, and the substrate of NMOS pipe M2 connects the source electrode of NMOS pipe M1;
Second input unit comprises PMOS pipe M3, PMOS pipe M4, the 3rd, the 4 two resistance, the 3rd, the 4 two electric capacity; The grid of PMOS pipe M3 and PMOS pipe M4 all connects second bias voltage behind series resistance the 3rd resistance and the 4th resistance respectively; The grid of PMOS pipe M3 is connected and is connected the source electrode of PMOS pipe M4 behind the 3rd electric capacity and be connected with the negative terminal of difference radio-frequency input signals; The grid of PMOS pipe M4 is connected and is connected the source electrode of PMOS pipe M3 behind the 4th electric capacity and be connected with the anode of difference radio-frequency input signals; The substrate of PMOS pipe M3 connects the source electrode of PMOS pipe M4, and the substrate of PMOS pipe M4 connects the source electrode of PMOS pipe M3;
The drain electrode of NMOS pipe M1 connects the drain electrode of PMOS pipe M3 in second input unit through the 5th electric capacity in first input unit, and the drain electrode of NMOS pipe M2 connects the drain electrode of PMOS pipe M4 in second input unit in first input unit through the 6th electric capacity;
First isolated location comprises the 5th NMOS pipe M5 and the 6th NMOS pipe M6; The source electrode of the 5th NMOS pipe M5 and the 6th NMOS pipe M6 connects the drain electrode of NMOS pipe M1 and NMOS pipe M2 in first input unit respectively, and the grid of the 5th NMOS pipe M5 and the 6th NMOS pipe M6 all connects supply voltage VDD;
Second isolated location comprises the 5th, the 6 two resistance, and an end of the 5th, the 6th resistance connects the drain electrode of pipe M3 of PMOS in second input unit and PMOS pipe M4, the equal ground connection of the other end of the 5th, the 6th resistance respectively;
Load unit comprises the 7th, the 8 two resistance; Seven, an end of the 8th resistance connects the drain electrode of pipe M5 of NMOS in first isolated location and NMOS pipe M6 respectively; Seven, the other end of the 8th resistance all connects supply voltage VDD, and an end of the 8th, the 7th resistance is exported positive and negative difference radio frequency output signal respectively through the 7th electric capacity and the 8th electric capacity respectively.
Advantage of the utility model and remarkable result:
(1) low-power consumption.Under realizing that 50 ohm of input impedance matching require; Adopt the present invention can reduce power consumption significantly; Can power consumption be reduced to 0.8mW (operating current 0.45mA under the 1.8V supply voltage) through transistors cross couple and current multiplexing technology; And adopt traditional common gate structure amplifier, need about 4mW power consumption (operating current 2.2mA under the 1.8V supply voltage).
(2) high-gain.Operating current of the present invention is lower, so can use big resistance resistance (R5, R6) to increase gain and can not produce excessive pressure drop.The cross-couplings technology can improve the mutual conductance of metal-oxide-semiconductor equivalence simultaneously
g mWith
g Mb, voltage gain is increased.Under identical power consumption condition (under the 1.8V supply voltage, operating current 0.45mA), the present invention with respect to traditional common gate structure amplifier, only adopt cross-couplings technology, only adopt its voltage gain of current multiplexing technology significantly to improve, see Fig. 4.
(3) high-isolation.Isolated location of the present invention adopts cathode-input amplifier to improve the isolation of amplifier, compares direct output, and the circuit isolation can be increased to 65dB from original 30dB.
(4) low noise.The present invention adopts cross-couplings and current multiplexing technology simultaneously, thereby has reduced the circuit noise coefficient.Under identical power consumption condition (under the 1.8V supply voltage, operating current 0.45mA), the traditional relatively common gate structure amplifier of the present invention, only adopt cross-couplings technology, only adopt its noise factor contrast of current multiplexing technology, see Fig. 5.
(5) the current multiplexing dual crossing coupling of the utility model proposition is total to the grid low noise amplifier, can significantly reduce power consumption, improves voltage gain, and noise-reduction coefficient can be applied in the broadband rf front end.
Description of drawings
Fig. 1 is the circuit theory diagrams of traditional common gate structure low noise amplifier;
Fig. 2 is the circuit block diagram of the utility model low noise amplifier;
Fig. 3 is the circuit theory diagrams of the utility model low noise amplifier;
The voltage gain curve ratio that Fig. 4 is the present invention and traditional common gate structure amplifier under the identical power consumption, only adopt the cross-couplings technology, only adopt the current multiplexing technology;
The noise factor curve ratio that Fig. 5 is the present invention and traditional common gate structure amplifier under the identical power consumption, only adopt the cross-couplings technology, only adopt the current multiplexing technology.
Embodiment
Referring to Fig. 2, the utility model is provided with input unit 1, input unit 2, isolated location 3, isolated location 4 and load unit 5.The positive and negative two ends of difference radio-frequency input signals connect the positive input terminal in+ and the negative input end in-of input unit 1, input unit 2 respectively; Input unit 1, input unit 2 outputs connect isolated location 3, isolated location 4 respectively; And corresponding interconnection between the output of input unit 1 and input unit 2; The output of isolated location 3 connects load unit, and load unit is exported positive and negative difference radio frequency output signal out+ and out-.
Referring to Fig. 3, input unit 1, input unit 2 adopt the current multiplexing common gate structure, and have carried out the dual crossing coupling at the metal-oxide-semiconductor grid and the substrate of input stage, and differential input end is realized 50 ohm of input impedance through input unit 1, input unit 2.The signal code that the PMOS pipe produces is superimposed with the signal code that the NMOS pipe produces through isolated location 4 backs, delivers to load unit 5 through isolated location 3 again, the voltage differential signal that final output is amplified.Wherein: input unit 1 is provided with NMOS pipe M1, M2 and capacitor C 1, C2 resistance R 1, R2; Input unit 2 is provided with PMOS pipe M3, M4 and capacitor C 3, C4 resistance R 3, R4; Isolated location 3 is provided with NMOS pipe M5, M6; Isolated location 4 is provided with resistance R 5, R6; Load unit 5 is provided with R7, R8; The annexation of circuit is following:
Difference input radio frequency in+ connects the source electrode of metal-oxide-semiconductor M1, M4, and in-connects the source electrode of metal-oxide-semiconductor M2, M3.Wherein M1, M2 are the NMOS pipe, and M3, M4 are the PMOS pipe.Be connected to bias voltage V behind the gate series resistance R1 of NMOS pipe M1, M2, the R2
Bias_NMOS, be connected to bias voltage V behind the gate series resistance R3 of PMOS pipe M3, M4, the R4
Bias_PMOS, connect M2, M4 source electrode respectively behind the grid series capacitance C1 of metal-oxide-semiconductor M1, M3, the C3, connect M1, M3 source electrode respectively behind the grid series capacitance C2 of metal-oxide-semiconductor M2, M4, the C4, this connected mode is one group of cross-couplings.Simultaneously, the substrate of metal-oxide-semiconductor M1, M3 connects M2, M4 source electrode respectively, and the substrate of metal-oxide-semiconductor M2, M4 connects M1, M3 source electrode respectively, and this connected mode is second group of cross-couplings.
The drain electrode of NMOS pipe M1, M2 connects the NMOS pipe M5 of isolated location 3, the source electrode of M6 respectively.The drain electrode of PMOS pipe M3, M4 connects resistance R 5, the R6 of isolated location 4 respectively, also is connected to the NMOS pipe M5 of isolated location 3, the source electrode of M6 simultaneously behind series capacitance C5, the C6.The NMOS pipe M5 of isolated location 3, the grid of M6 directly meet supply voltage VDD, and the resistance R 7 of drain electrode connection load unit 5, R8 are after capacitor C 7, C8 output difference radio-frequency signal out+ and out-.
The difference radio-frequency input signals is through input unit 1 and input unit 2 inputs, for the amplifying circuit of common gate structure, its input impedance be about 1/ (
g m+
g Mb), here,
g mBe the transistorized mutual conductance of common gate,
g MbThe equivalent transconductance of bringing to the potential difference of source S for common gate transistor substrate B.At first, adopt the current multiplexing technology in this patent, the input impedance of input unit 1 and input unit 2 is matched 100 ohm respectively, both parallel connections are 50 ohm of system's input impedance.Compare traditional common gate structure amplifier, needed power consumption has reduced half the.And this method of attachment has reduced the second-order effect of metal-oxide-semiconductor, makes the global noise coefficient of circuit decrease.Secondly, increase
g mWith
g MbCan reduce the input impedance of circuit.
g mWith
g MbWith electric current
I dRelevant, through increasing
g mWith
g MbReduce input impedance and mean the necessary operating current that increases, just increased power consumption.This patent has carried out the dual crossing coupling at input; The source electrode that connects M2, M4 behind the grid series capacitance C1 of metal-oxide-semiconductor M1, M3, the C3 respectively; The source electrode that connects M1, M3 behind the grid series capacitance C2 of metal-oxide-semiconductor M2, M4, the C4 respectively, this connected mode are first group of cross-couplings.Simultaneously, the substrate of metal-oxide-semiconductor M1, M3 connects the source electrode of M2, M4 respectively, and the substrate of metal-oxide-semiconductor M2, M4 connects the source electrode of M1, M3 respectively, and this method of attachment is second group of cross-couplings.At this moment, the corresponding equivalence of metal-oxide-semiconductor in input unit 1, the input unit 2
g mWith
g MbIncrease to 2
g mWith 2
g MbIt is half that this connected mode makes that power consumption can reduce again.In sum, compare traditional common gate structure amplifier and accomplish 50 ohm of input couplings, the power consumption that this patent needs is original 1/4th.Promptly under same power supplies voltage, operating current is reduced to 1/4th of traditional common gate structure low noise amplifier.The dual crossing mode of being of coupled connections can be improved noise factor simultaneously.
The drain electrode of NMOS pipe M1, M2 connects the NMOS pipe M5 of isolated location 3, the source electrode of M6 respectively.The drain electrode of PMOS pipe M3, M4 connects resistance R 5, the R6 of isolated location 4 respectively, also is connected to the M5 of isolated location 3, the source electrode of M6 behind series capacitance C5, the C6 simultaneously.The NMOS pipe M5 of isolated location 3, the grid of M6 directly connect supply voltage VDD, export difference radio-frequency signal out+, out-through capacitor C 7, C8 behind the resistance R 7 of drain electrode connection load unit 5, the R8.This method of attachment has guaranteed that the amplifying signal electric current that input unit 2 produces and the amplifying signal electric current of input unit 1 generation superpose, and has guaranteed that output is to input isolation performance preferably.The signal code of stack is radio-frequency differential output signal through the voltage signal of the amplification that load unit 5 produces.
Visible referring to Fig. 4, the utility model and traditional common gate structure amplifier under the identical power consumption, only adopt the cross-couplings technology, the voltage gain curve ratio that only adopts the current multiplexing technology, its result shows that the low noise amplifier of the utility model design gains the highest.Visible referring to Fig. 5; The utility model and traditional common gate structure amplifier under the identical power consumption, only adopt the cross-couplings technology, the noise factor curve ratio that only adopts the current multiplexing technology, its result shows that the low noise amplifier noise factor of the utility model design is minimum.
Low noise amplifier operating current under the 1.8V supply voltage of the utility model design is about 0.45mA, and power consumption is 0.8mW.This low noise amplifier three dB bandwidth is about 2.5GHz, and voltage gain is about 24dB, and the in-band noise coefficient is about 2.5dB to 3.5dB.Through contrast, its performance is far superior to traditional common gate structure amplifier and the independent low noise amplifier that uses the current multiplexing technology or use the cross-couplings art designs separately.
Claims (1)
1. low-power consumption wideband low noise amplifier; It is characterized in that: be provided with first, second two input units, first, second two isolated locations and load unit; The positive and negative two ends of difference radio-frequency input signals connect the positive input terminal and the negative input end of first, second two input units respectively; The output of first, second two input units connects corresponding interconnection between the output of first, second two isolated locations and first, second two input units respectively; The output of first isolated location connects load unit, load unit output difference radio frequency output signal; Wherein:
First input block comprises NMOS pipe M1; NMOS manages M2; First; The second two resistance; First; The second two electric capacity; The grid of NMOS pipe M1 and NMOS pipe M2 all connects first bias voltage behind series resistance first resistance and second resistance respectively; The grid of NMOS pipe M1 is connected and is connected the source electrode of NMOS pipe M2 behind first electric capacity and be connected with the negative terminal of difference radio-frequency input signals; The grid of NMOS pipe M2 is connected and is connected the source electrode of NMOS pipe M1 behind second electric capacity and be connected with the anode of difference radio-frequency input signals; The substrate of NMOS pipe M1 connects the source electrode of NMOS pipe M2, and the substrate of NMOS pipe M2 connects the source electrode of NMOS pipe M1;
Second input unit comprises PMOS pipe M3, PMOS pipe M4, the 3rd, the 4 two resistance, the 3rd, the 4 two electric capacity; The grid of PMOS pipe M3 and PMOS pipe M4 all connects second bias voltage behind series resistance the 3rd resistance and the 4th resistance respectively; The grid of PMOS pipe M3 is connected and is connected the source electrode of PMOS pipe M4 behind the 3rd electric capacity and be connected with the negative terminal of difference radio-frequency input signals; The grid of PMOS pipe M4 is connected and is connected the source electrode of PMOS pipe M3 behind the 4th electric capacity and be connected with the anode of difference radio-frequency input signals; The substrate of PMOS pipe M3 connects the source electrode of PMOS pipe M4, and the substrate of PMOS pipe M4 connects the source electrode of PMOS pipe M3;
The drain electrode of NMOS pipe M1 connects the drain electrode of PMOS pipe M3 in second input unit through the 5th electric capacity in first input unit, and the drain electrode of NMOS pipe M2 connects the drain electrode of PMOS pipe M4 in second input unit in first input unit through the 6th electric capacity;
First isolated location comprises the 5th NMOS pipe M5 and the 6th NMOS pipe M6; The source electrode of the 5th NMOS pipe M5 and the 6th NMOS pipe M6 connects the drain electrode of NMOS pipe M1 and NMOS pipe M2 in first input unit respectively, and the grid of the 5th NMOS pipe M5 and the 6th NMOS pipe M6 all connects supply voltage VDD;
Second isolated location comprises the 5th, the 6 two resistance, and an end of the 5th, the 6th resistance connects the drain electrode of pipe M3 of PMOS in second input unit and PMOS pipe M4, the equal ground connection of the other end of the 5th, the 6th resistance respectively;
Load unit comprises the 7th, the 8 two resistance; Seven, an end of the 8th resistance connects the drain electrode of pipe M5 of NMOS in first isolated location and NMOS pipe M6 respectively; Seven, the other end of the 8th resistance all connects supply voltage VDD, and an end of the 8th, the 7th resistance is exported positive and negative difference radio frequency output signal respectively through the 7th electric capacity and the 8th electric capacity respectively.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011203960071U CN202282762U (en) | 2011-10-18 | 2011-10-18 | Low-power-consumption broadband low-noise amplifier |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011203960071U CN202282762U (en) | 2011-10-18 | 2011-10-18 | Low-power-consumption broadband low-noise amplifier |
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| CN202282762U true CN202282762U (en) | 2012-06-20 |
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| CN2011203960071U Withdrawn - After Issue CN202282762U (en) | 2011-10-18 | 2011-10-18 | Low-power-consumption broadband low-noise amplifier |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102332868A (en) * | 2011-10-18 | 2012-01-25 | 东南大学 | Low-power-consumption wideband low-noise amplifier |
| CN107493077A (en) * | 2017-09-01 | 2017-12-19 | 无锡泽太微电子有限公司 | A kind of wideband low noise amplifier circuit of Low-voltage Low-power |
-
2011
- 2011-10-18 CN CN2011203960071U patent/CN202282762U/en not_active Withdrawn - After Issue
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102332868A (en) * | 2011-10-18 | 2012-01-25 | 东南大学 | Low-power-consumption wideband low-noise amplifier |
| CN102332868B (en) * | 2011-10-18 | 2013-08-28 | 东南大学 | Low-power-consumption wideband low-noise amplifier |
| CN107493077A (en) * | 2017-09-01 | 2017-12-19 | 无锡泽太微电子有限公司 | A kind of wideband low noise amplifier circuit of Low-voltage Low-power |
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|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| AV01 | Patent right actively abandoned |
Granted publication date: 20120620 Effective date of abandoning: 20130828 |
|
| RGAV | Abandon patent right to avoid regrant |