CN202268868U - Spread-spectrum clock signal detecting system - Google Patents
Spread-spectrum clock signal detecting system Download PDFInfo
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- CN202268868U CN202268868U CN2011203956574U CN201120395657U CN202268868U CN 202268868 U CN202268868 U CN 202268868U CN 2011203956574 U CN2011203956574 U CN 2011203956574U CN 201120395657 U CN201120395657 U CN 201120395657U CN 202268868 U CN202268868 U CN 202268868U
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Abstract
A spread-spectrum clock signal detecting system comprises a spread-spectrum clock circuit, a phase-locked loop circuit, an analog-digital conversion circuit and a digital process circuit, wherein the spread-spectrum clock circuit is used for reducing EMI (electro-magnetic interference) radiation in a high-speed serial-data transmission system, the phase-locked loop circuit is connected with the spread-spectrum clock circuit and used for receiving spread-spectrum clock signals, the analog-digital conversion circuit is connected with the phase-locked loop circuit, and the digital process circuit is connected with the analog-digital conversion circuit. The phase-locked loop circuit generates a control voltage according to the spread-spectrum clock signals and is subjected to analog-to-digital conversion by the analog-digital conversion circuit in a sampling manner, the digital process circuit processes signals output by the analog-digital conversion circuit and judges whether the spread-spectrum clock signals exist in the high-speed serial-data transmission system or not according to the signals output by the analog-digital conversion circuit. The spread-spectrum clock signal detecting system is simple in structure and convenient in use.
Description
Technical field
The utility model relates to a kind of signal detection system, refers to a kind of frequency-spreading clock signal detection system whether the high-speed serial data transmission system exists frequency-spreading clock signal that is used for detecting especially.
Background technology
Electromagnetic interference (EMI, Electromagnetic Interference) has two kinds of conducted interference and radiated interference.Conducted interference is meant through conducting medium and arrives another electric network to the coupling of the signal on the electric network (interference).Radiated interference is meant that interference source passes through the space and arrives another electric network to its signal coupling (interference).In high speed circuit board and system design, the pin of high-frequency signal line, integrated circuit, all kinds of connectors etc. all possibly become the radiated interference source with antenna performance, and the ability launching electromagnetic wave also influences other system or the operate as normal of interior other subsystems of native system.Therefore, reducing electromagnetic interference is the key factor that the electronic system design personnel need consider.
In the high-speed serial data transmission system,, tend to use the spread spectrum clock circuit to reduce the EMI radiation in order effectively to reduce the EMI radiation.But, when using the spread spectrum clock circuit to reduce the EMI radiation,, increased the difficulty of receiving terminal reception data greatly, so receiving terminal is necessary the data that transmitting terminal sends are verified because the high-speed serial data transmission system works in the frequency of variation.And the spread spectrum clock circuit can verify accurately and rapidly data that transmitting terminal sends whether correctly, whether meet data and send agreement; Be convenient to location of mistake; And can be according to the reasonable Adjustment System parameter of frequency-spreading clock signal of spread spectrum clock circuit output; Under various data transmit-receive agreements, work in optimum state all the time, regulate clock data recovery circuit and work in optimal parameter.Therefore be necessary to provide a kind of frequency-spreading clock signal detection system whether the high-speed serial data transmission system exists frequency-spreading clock signal that is used for detecting.
Summary of the invention
In view of above content, be necessary to provide a kind of frequency-spreading clock signal detection system whether the high-speed serial data transmission system exists frequency-spreading clock signal that is used for detecting.
A kind of frequency-spreading clock signal detection system; Be used for detecting a high-speed serial data transmission system and whether have a frequency-spreading clock signal; Said frequency-spreading clock signal detection system comprise one be used for reducing said high-speed serial data transmission system EMI radiation spread spectrum clock circuit, a digital processing circuit that analog to digital conversion circuit and that the phase-locked loop circuit, that is used to receive said frequency-spreading clock signal links to each other with said phase-locked loop circuit links to each other with analog-digital conversion circuit as described that links to each other with said spread spectrum clock circuit; Said phase-locked loop circuit produces a control voltage according to said frequency-spreading clock signal; Analog-digital conversion circuit as described carries out analog-to-digital conversion through sample mode to said control voltage; Said digital processing circuit is handled the signal of analog-digital conversion circuit as described output, and judges in the said high-speed serial data transmission system whether have said frequency-spreading clock signal according to the signal of analog-digital conversion circuit as described output.
Preferably, said phase-locked loop circuit comprises the frequency divider that voltage controlled oscillator and that the low pass filter that is used for the filtering high-frequency signal, that charge pump, that a phase frequency detector, links to each other with said phase frequency detector links to each other with said charge pump links to each other with said low pass filter links to each other with said voltage controlled oscillator and said phase frequency detector.
Preferably, said phase frequency detector detects the difference on the frequency and the phase difference of said frequency-spreading clock signal and said output signal of frequency divider, and produces a voltage signal to said charge pump.
Preferably, said charge pump discharges and recharges a drive capacitor in the said phase-locked loop circuit, and the voltage at said drive capacitor two ends changes along with the variation of detected difference on the frequency of said phase frequency detector and phase difference.
Preferably, the voltage at said drive capacitor two ends carries out producing said control voltage after the filtering through said low pass filter, and said low pass filter inputs to analog-digital conversion circuit as described with said control voltage.
Preferably, whether the data that a transmitting terminal sends in the said high-speed serial data transmission system of said spread spectrum clock Circuit verification are correct, and adjust a clock data recovery circuit and work in optimal parameter.
Preferably, said frequency-spreading clock signal is exported an input signal by said spread spectrum clock circuit through after the band spectrum modulation.
Relative prior art; The utility model frequency-spreading clock signal detection system can fast detecting go out whether there is frequency-spreading clock signal in the high-speed serial data transmission system; Whether the data of further verifying the transmitting terminal transmission accurately and rapidly are correct, regulate clock data recovery circuit and work in optimal parameter, thereby effectively reduce the EMI radiation; The utility model is simple in structure, and easy to use.
Description of drawings
Fig. 1 is the system block diagram of the utility model frequency-spreading clock signal detection system preferred embodiments.
Fig. 2 is the system block diagram of phase-locked loop in the utility model frequency-spreading clock signal detection system preferred embodiments.
Fig. 3 is the operation principle flow chart of the utility model frequency-spreading clock signal detection system preferred embodiments.
Embodiment
See also Fig. 1, the utility model frequency-spreading clock signal detection system preferred embodiments comprises the digital processing circuit that analog to digital conversion circuit and that phase-locked loop circuit, that a spread spectrum clock circuit, links to each other with this spread spectrum clock circuit links to each other with this phase-locked loop circuit links to each other with this analog to digital conversion circuit.This spread spectrum clock circuit is used for reducing the EMI radiation of high-speed serial data transmission system, and can verify accurately and rapidly whether the data of transmitting terminal transmission are correct, regulates clock data recovery circuit and works in optimal parameter.This phase-locked loop circuit is used to receive the frequency-spreading clock signal after process the band spectrum modulation of this spread spectrum clock circuit output, and the frequency of following the tracks of this frequency-spreading clock signal, controls voltage thereby produce one according to this frequency-spreading clock signal.The control voltage that this analog to digital conversion circuit is exported this phase-locked loop circuit through sample mode carries out analog-to-digital conversion.This digital processing circuit is handled the signal of this analog to digital conversion circuit output, and judges whether there is frequency-spreading clock signal in the high-speed serial data transmission system according to the signal of this analog to digital conversion circuit output.
See also Fig. 2, phase-locked loop circuit comprises the frequency divider that voltage controlled oscillator and that low pass filter, that charge pump, that a phase frequency detector, links to each other with this phase frequency detector links to each other with this charge pump links to each other with this low pass filter links to each other with this voltage controlled oscillator and this phase frequency detector in the utility model frequency-spreading clock signal detection system preferred embodiments.This phase frequency detector is used to detect difference on the frequency and the phase difference between this frequency-spreading clock signal and the output signal of frequency divider; And produce a voltage signal to this charge pump; This charge pump discharges and recharges drive capacitor in this phase-locked loop circuit, and the voltage at these drive capacitor two ends changes along with the variation of detected difference on the frequency of this phase frequency detector and phase difference.This low pass filter allows that the signal that is lower than required cut-off frequency passes through, and filtering is higher than the signal of required cut-off frequency.The frequency of this voltage controlled oscillator output signal is by the control voltage decision of this low pass filter output; The output signal of this voltage controlled oscillator compares through frequency divider and frequency-spreading clock signal; Remain unchanged up to difference on the frequency and phase difference, thereby make the control voltage of this low pass filter output remain unchanged.
The operation principle of the utility model frequency-spreading clock signal detection system preferred embodiments is following: this spread spectrum clock circuit carries out an input signal to import this phase-locked loop circuit after the band spectrum modulation; Phase frequency detector in this phase-locked loop circuit detects the frequency-spreading clock signal of this spread spectrum clock circuit output and the difference on the frequency and the phase difference of output signal of frequency divider; And produce a voltage signal to this charge pump; This charge pump discharges and recharges a drive capacitor in this phase-locked loop circuit, makes the voltage at these drive capacitor two ends change along with the variation of detected difference on the frequency of this phase frequency detector and phase difference.The voltage at these drive capacitor two ends carries out producing a control voltage after the filtering through this low pass filter; This low pass filter should be controlled voltage and be sent to this analog to digital conversion circuit; The stable clock signal that an outside provides in this analog to digital conversion circuit is sampled to this control voltage, through the mode of sampling this control voltage is carried out analog-to-digital conversion.Signal after this analog to digital conversion circuit will be sampled is sent to this digital processing circuit; This digital processing circuit is handled the signal of this analog to digital conversion circuit output, and judges whether there is frequency-spreading clock signal in the high-speed serial data transmission system according to the signal of this analog to digital conversion circuit output.
See also Fig. 3, the workflow of the utility model frequency-spreading clock signal detection system preferred embodiments may further comprise the steps:
Step 1, the spread spectrum clock circuit carries out input signal to import phase-locked loop circuit after the band spectrum modulation.
Step 2, the phase frequency detector in the phase-locked loop circuit detect the frequency-spreading clock signal of spread spectrum clock circuit output and the difference on the frequency and the phase difference of output signal of frequency divider, and produce voltage signal to charge pump.
Step 3, charge pump discharges and recharges drive capacitor in the phase-locked loop circuit, makes the voltage at drive capacitor two ends change along with the variation of detected difference on the frequency of phase frequency detector and phase difference.
Step 4, the voltage at drive capacitor two ends carries out producing control voltage after the filtering through low pass filter, and low pass filter will be controlled voltage and be sent to analog to digital conversion circuit.
Step 5, analog to digital conversion circuit is sampled to control voltage through the stable clock signal that the outside provides, and through the mode of sampling control voltage is carried out analog-to-digital conversion.
Step 6, the signal after analog to digital conversion circuit will be sampled is sent to digital processing circuit.
Step 7, digital processing circuit is handled the signal of this analog to digital conversion circuit output, and judges whether there is frequency-spreading clock signal in the high-speed serial data transmission system according to the signal of analog to digital conversion circuit output.
The utility model frequency-spreading clock signal detection system can fast detecting go out whether there is frequency-spreading clock signal in the high-speed serial data transmission system; Whether the data of further verifying the transmitting terminal transmission accurately and rapidly are correct; Regulate clock data recovery circuit and work in optimal parameter; Thereby effectively reduce the EMI radiation, the utility model is simple in structure, and easy to use.
Claims (7)
1. frequency-spreading clock signal detection system; Be used for detecting a high-speed serial data transmission system and whether have a frequency-spreading clock signal; It is characterized in that: said frequency-spreading clock signal detection system comprise one be used for reducing said high-speed serial data transmission system EMI radiation spread spectrum clock circuit, a digital processing circuit that analog to digital conversion circuit and that the phase-locked loop circuit, that is used to receive said frequency-spreading clock signal links to each other with said phase-locked loop circuit links to each other with analog-digital conversion circuit as described that links to each other with said spread spectrum clock circuit; Said phase-locked loop circuit produces a control voltage according to said frequency-spreading clock signal; Analog-digital conversion circuit as described carries out analog-to-digital conversion through sample mode to said control voltage; Said digital processing circuit is handled the signal of analog-digital conversion circuit as described output, and judges in the said high-speed serial data transmission system whether have said frequency-spreading clock signal according to the signal of analog-digital conversion circuit as described output.
2. frequency-spreading clock signal detection system as claimed in claim 1 is characterized in that: said phase-locked loop circuit comprises the frequency divider that voltage controlled oscillator and that the low pass filter that is used for the filtering high-frequency signal, that charge pump, that a phase frequency detector, links to each other with said phase frequency detector links to each other with said charge pump links to each other with said low pass filter links to each other with said voltage controlled oscillator and said phase frequency detector.
3. frequency-spreading clock signal detection system as claimed in claim 2 is characterized in that: said phase frequency detector detects the difference on the frequency and the phase difference of said frequency-spreading clock signal and said output signal of frequency divider, and produces a voltage signal to said charge pump.
4. frequency-spreading clock signal detection system as claimed in claim 3; It is characterized in that: said charge pump discharges and recharges a drive capacitor in the said phase-locked loop circuit, and the voltage at said drive capacitor two ends changes along with the variation of detected difference on the frequency of said phase frequency detector and phase difference.
5. frequency-spreading clock signal detection system as claimed in claim 4; It is characterized in that: the voltage at said drive capacitor two ends carries out producing said control voltage after the filtering through said low pass filter, and said low pass filter inputs to analog-digital conversion circuit as described with said control voltage.
6. frequency-spreading clock signal detection system as claimed in claim 1; It is characterized in that: whether the data that a transmitting terminal sends in the said high-speed serial data transmission system of said spread spectrum clock Circuit verification are correct, and adjust a clock data recovery circuit and work in optimal parameter.
7. frequency-spreading clock signal detection system as claimed in claim 1 is characterized in that: said frequency-spreading clock signal is exported an input signal by said spread spectrum clock circuit through after the band spectrum modulation.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011203956574U CN202268868U (en) | 2011-10-18 | 2011-10-18 | Spread-spectrum clock signal detecting system |
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| CN2011203956574U CN202268868U (en) | 2011-10-18 | 2011-10-18 | Spread-spectrum clock signal detecting system |
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Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102361454A (en) * | 2011-10-18 | 2012-02-22 | 四川和芯微电子股份有限公司 | System and method for detecting spread spectrum clock signals |
| CN105372512A (en) * | 2014-08-26 | 2016-03-02 | 苏州普源精电科技有限公司 | RF measuring device with phase fixation function |
| CN107612306A (en) * | 2017-08-25 | 2018-01-19 | 惠科股份有限公司 | Eliminate electromagnetic interference devices and methods therefor |
| CN107689727A (en) * | 2017-08-25 | 2018-02-13 | 惠科股份有限公司 | Eliminate electromagnetic interference devices and methods therefor |
| CN108337403A (en) * | 2018-02-08 | 2018-07-27 | 青岛海信电器股份有限公司 | It is a kind of applied to the signal transmitting apparatus of TV, system and TV |
| US10367488B2 (en) | 2017-08-25 | 2019-07-30 | HKC Corporation Limited | Device and method for eliminating electromagnetic interference |
| CN110806689A (en) * | 2019-11-09 | 2020-02-18 | 苏州浪潮智能科技有限公司 | Closed-loop negative feedback control system based on SSC |
| CN117353765A (en) * | 2023-12-06 | 2024-01-05 | 杭州长川科技股份有限公司 | Signal transmitting device, tester and signal output method of tester |
-
2011
- 2011-10-18 CN CN2011203956574U patent/CN202268868U/en not_active Expired - Fee Related
Cited By (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102361454A (en) * | 2011-10-18 | 2012-02-22 | 四川和芯微电子股份有限公司 | System and method for detecting spread spectrum clock signals |
| CN102361454B (en) * | 2011-10-18 | 2013-04-24 | 四川和芯微电子股份有限公司 | System and method for detecting spread spectrum clock signals |
| CN105372512A (en) * | 2014-08-26 | 2016-03-02 | 苏州普源精电科技有限公司 | RF measuring device with phase fixation function |
| CN105372512B (en) * | 2014-08-26 | 2019-06-18 | 苏州普源精电科技有限公司 | Radio-frequency measurement device with phase fixed function |
| WO2019037180A1 (en) * | 2017-08-25 | 2019-02-28 | 惠科股份有限公司 | Device for eliminating electromagnetic interference and method therefor |
| CN107689727A (en) * | 2017-08-25 | 2018-02-13 | 惠科股份有限公司 | Eliminate electromagnetic interference devices and methods therefor |
| CN107612306A (en) * | 2017-08-25 | 2018-01-19 | 惠科股份有限公司 | Eliminate electromagnetic interference devices and methods therefor |
| US10367488B2 (en) | 2017-08-25 | 2019-07-30 | HKC Corporation Limited | Device and method for eliminating electromagnetic interference |
| CN108337403A (en) * | 2018-02-08 | 2018-07-27 | 青岛海信电器股份有限公司 | It is a kind of applied to the signal transmitting apparatus of TV, system and TV |
| CN108337403B (en) * | 2018-02-08 | 2020-09-25 | 海信视像科技股份有限公司 | Signal transmission device and system applied to television and television |
| CN110806689A (en) * | 2019-11-09 | 2020-02-18 | 苏州浪潮智能科技有限公司 | Closed-loop negative feedback control system based on SSC |
| CN110806689B (en) * | 2019-11-09 | 2022-11-25 | 苏州浪潮智能科技有限公司 | Closed loop negative feedback control system based on SSC |
| CN117353765A (en) * | 2023-12-06 | 2024-01-05 | 杭州长川科技股份有限公司 | Signal transmitting device, tester and signal output method of tester |
| CN117353765B (en) * | 2023-12-06 | 2024-04-02 | 杭州长川科技股份有限公司 | Signal transmitting device, tester and signal output method of tester |
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Address after: 610041 Sichuan city of Chengdu province high tech Zone Kyrgyzstan Road 33 block A No. 9 Patentee after: IPGoal Microelectronics (Sichuan) Co., Ltd. Address before: 402 room 7, building 610041, incubator Park, hi tech Zone, Sichuan, Chengdu Patentee before: IPGoal Microelectronics (Sichuan) Co., Ltd. |
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