CN202261345U - Ethernet switch chip port loopback detection device - Google Patents

Ethernet switch chip port loopback detection device Download PDF

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Publication number
CN202261345U
CN202261345U CN2011203511161U CN201120351116U CN202261345U CN 202261345 U CN202261345 U CN 202261345U CN 2011203511161 U CN2011203511161 U CN 2011203511161U CN 201120351116 U CN201120351116 U CN 201120351116U CN 202261345 U CN202261345 U CN 202261345U
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China
Prior art keywords
port
loopback
switch chip
frame
interface
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Expired - Fee Related
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CN2011203511161U
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Chinese (zh)
Inventor
彭海帆
雍峰
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Opzoon Technology Co Ltd
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Opzoon Technology Co Ltd
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Priority to CN2011203511161U priority Critical patent/CN202261345U/en
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Abstract

The utility model provides an Ethernet switch chip port loopback detection device, and belongs to the technical field of data communication. The problem that due to misconnected external cables or other reasons, communication failure is caused when an Ethernet switch chip port is looped back is solved. The technical scheme is that: a loopback detection circuit is designed outside the switch chip; one interface of a control circuit is connected to a management interface of the switch chip, and the other interface of the control circuit is connected to a communication port of the switch chip; and the loopback detection circuit transmits a data frame with specified contents to the communication port at fixed time; meanwhile, the frame contents are received and analyzed at the port, and when the transmitted frame with the specified contents is received, the switch chip port loopback is determined, a loopback path is analyzed according to the frame contents by utilizing switch configuration, and an inevitable circuit for switch chip loopback is closed. Because related ports subjected to loopback can be judged, the communication failure is avoided.

Description

A kind of chips of Ethernet exchange loop back detection device
Technical field
The utility model relates to the data communication technology field, is to judge whether each port of chips of Ethernet exchange loopback takes place, and solves a kind of method that causes communication failure owing to the exchanger chip port loopback.
Background technology
Along with networks development, and Ethernet switch (hereinafter to be referred as: switch) application is very general.Switch not only is applied in office, family lan, and the broadband access of Ethernet form also becomes one of internet broadband access economic way.
Switch is to be made up of exchanger chip (or exchanger chip group) and accessory circuit, and there is detailed circuit data in each chip manufacturer.Under the port normal use situation of exchanger chip loopback can not take place, but external cable wrong or other special reasons, in case port generation loopback will cause extremely serious consequence probably.Loopback occurs in following three kinds of situation:
1, between two ports of exchanger chip oneself loopback takes place.With reference to figure 1; The change planes PO mouth of chip (2) of 5 oral sexes has been communicated with by netting twine (1) with the P1 mouth; If exchanger chip port (2) does not have automatic reverse rotation function; Netting twine (1) just can form path when being cross spider, if exchanger chip port has automatic turn over function, netting twine (1) is that parallel lines or cross spider all can successful connections.
2, between two above chips of Ethernet exchange loopback takes place, see Fig. 2: the P0 mouth of exchanger chip (2) and P2 mouth have been connected respectively to the P0 mouth and the P2 mouth of switch (3).
3, loopback to taking place in the own TX line of switch port pair and RX line.See Fig. 3: the TX+TX-line pair of supposing the P0 port and own RX+RX-line are to linking to each other.The data that P0 mouth oneself sends will oneself be received, influence the switch operate as normal.If be a broadcast frame, this frame will be forwarded to other port, if loopback has also taken place other port (for example P1), then this frame can be forwarded to P0 once more by P1.If circulation goes down just to cause the exchanger chip can't operate as normal always.
4, when the exchanger chip special applications, when perhaps utilizing the exchanger chip design to derive application product, for example exchanger chip port directly or indirectly is connected with " 4 lines change 2 line circuits ", also loopback possibly take place.The port (Media Connection Pins) that Fig. 4 has enumerated exchanger chip (2) directly or indirectly is connected with two kinds of forms of " 4 lines change 2 line circuits ".When the impedance matching of " 4 lines change 2 line circuits " (4); P0 port TX line can be from the RX line to not sending back to the P0 mouth after the signal that sends out is got into 4 lines and changes 2 line circuits (4); Or the signal that reflects very a little less than, Frame that can not cause the P0 mouth to receive oneself to send or online signal.But when 2 line system ports (6) took place unsettled or certain reason circuit impedance does not match, the RX line was stronger to the signal that sends back to the P0 mouth, the Frame or the online signal that can cause the P0 mouth to receive oneself to send, and this has just caused the actual from loopback of P0 mouth.
The utility model content
In the utility model content part, introduced the notion of a series of reduced forms, this will further explain in the embodiment part.The utility model content part of the utility model does not also mean that key feature and the essential features that will attempt to limit technical scheme required for protection, does not more mean that the protection range of attempting to confirm technical scheme required for protection.
The utility model provides a kind of chips of Ethernet exchange loop back detection device; It is characterized in that; Loopback detection circuit of exchanger chip external Design; An interface of control circuit is connected to the management interface PHY Serial Management Interface of exchanger chip, and another interface is connected to a PORT COM of exchanger chip.
An interface of said control circuit is connected to the MII interface of a PORT COM of exchanger chip.
Regularly send the Frame of certain content to this PORT COM by the loopback detection control circuit; Receive and the analysis frame content at this port simultaneously, when receiving the frame of the certain content that oneself sends, both judged the exchanger chip ports having loopback has taken place; And utilization analyzes loop-back path to the configuration of switch with according to content frame; That closes the exchanger chip loopback must be through circuit, or sets the port vlan configuration that produces loopback, and this port is no longer exerted an influence to whole exchanger chip.
The frame format of the utility model is confirmed by the designer of product; Continue to receive and the analysis frame content by the PORT COM of loopback detection control circuit at exchanger chip; If the content frame judged result that receives is thought the Frame that oneself sends, explain that then loopback has taken place in this exchanger chip ports having.Judge the related port that loopback takes place simultaneously, that closes loop-back path must cut off loop-back path through port circuit.Also can use the method for the related port vlan state of this loopback of configuration to solve loopback; For example the loopback port is divided among the VLAN who does not influence the exchanger chip communication; This port is in fact left unused; Therefore, the utility model has been avoided because the generation of the communication failure that chips of Ethernet exchange port loopback brings.
Description of drawings
The attached drawings of the utility model is used to understand the utility model in this part as the utility model.The embodiment and the description thereof of the utility model have been shown in the accompanying drawing, have been used for explaining the principle of the utility model.In the accompanying drawings,
Fig. 1, Fig. 2, Fig. 3, Fig. 4 are the various ways of switch generation loopback.
Fig. 5 is a kind of execution mode sketch map of the utility model.
Embodiment
In the description hereinafter, provided a large amount of concrete details and the utility model has been understood more completely so that provide.Yet, it will be apparent to one skilled in the art that the utility model can need not one or more these details and be able to enforcement.In other example,, describe for technical characterictics more well known in the art for fear of obscuring with the utility model.
Loopback detection circuit 7 in the utility model can or utilize programmable logic device to realize with single-chip microcomputer.Be the explanation embodiment, Fig. 5 is to be a kind of circuit schematic block diagram of realizing the utility model of example with the 5 oral sexes chip of changing planes.An interface of loopback detection control circuit 7 links to each other with the MII interface (Media Independent Interface Media Independent Interface) of a PORT COM P4 mouth of exchanger chip 9; With the communication of MII interface specification, can be to the P4 of exchanger chip 9 port transmit frame with from P4 port received frame.Another interface of loopback detection circuit 7 is connected with the management interface SMI port (Serial Management Interface serial management interface) of exchanger chip 9 simultaneously, is used for configuration switch chip 9 inner parameters and reads inner parameter.Connect the P4 mouth though this execution mode is a loopback detection control circuit 7, and with MII interface communication transceive data frame, the utility model is not limited to only connect the P4 mouth, also is not limited to and only uses MII mouth transceive data frame.Exchanger chip also is not limited to the 5 oral sexes chip of changing planes.
During software programming, there is several different methods to judge the concrete port whether this exchanger chip 9 loopback and loopback take place.First method for example: loopback detection control circuit 7 writes configuration information through the SMI mouth to exchanger chip 9, the information that the frame affix that lets other port of exchanger chip 9 transmit to the P4 mouth comes source port.To receive that any frame can identify be that which port of exchanger chip 9 sends to loopback detection control circuit 7 so.7 timed sending of loopback detection control circuit return the detection frame for switch P4 choma, and (for example destination address is 16 system FFFFFFFFFFFF; Source address is a particular address); If received the specific loopback detection frame that oneself sent in the certain hour; Just can judge is that exchanger chip 9 which port send, and then through SMI port arrangement exchanger chip, lets this port shutdown (letting this port receiving circuit close at least).So just cut off the return path of switch loopback.Solved sn wrap-around issue.Second method: write configuration information to exchanger chip 9 through the SMI port; Let P4 only with to the P0 transmit frame; But can receive the frame that any port returns; Explain then that loopback has taken place in exchanger chip 9 ports havings, return that the transtation mission circuit that can confirm the P0 mouth at least is the necessary path that produces loopback no matter whether judge by which port.Close the P0 port or close the transtation mission circuit of P0 port at least, just solved sn wrap-around issue.If do not receive the detection frame of oneself in loopback detection control circuit 7 certain hours, explain that then loopback does not take place the P0 mouth.Test other port of exchanger chip 9 successively with the method, just can find out the port that loopbacks take place for all, and close.The method of cutting off loop-back path also can be utilized the function of switch VLAN, is divided into separately among the VLAN like certain port that loopback will take place, and this port is in fact left unused.
Top software judges that loop-back path is the method that two kinds of softwares are differentiated, but is not limited to this two kinds of methods.Loopback detection can regularly be carried out.Find to close the corresponding port behind the loopback, avoid influencing the operate as normal of the exchanger chip port that does not send loopback.Behind the certain interval of time port of closing is opened detection once more temporarily, just recover operate as normal if no longer include the loopback situation.If still be that wrapped state just continues to close.
The utility model is illustrated through the foregoing description, but should be understood that, the foregoing description just is used for for example and illustrative purposes, but not is intended to the utility model is limited in the described scope of embodiments.It will be understood by those skilled in the art that in addition; The utility model is not limited to the foregoing description; Instruction according to the utility model can also be made more kinds of variants and modifications, and these variants and modifications all drop in the utility model scope required for protection.The protection range of the utility model is defined by appended claims book and equivalent scope thereof.

Claims (2)

1. chips of Ethernet exchange loop back detection device; It is characterized in that; Loopback detection circuit of exchanger chip external Design; An interface of control circuit is connected to the management interface PHY Serial Management Interface of exchanger chip, and another interface is connected to a PORT COM of exchanger chip.
2. device as claimed in claim 1 is characterized in that, an interface of said control circuit is connected to the MII interface of a PORT COM of exchanger chip.
CN2011203511161U 2011-09-20 2011-09-20 Ethernet switch chip port loopback detection device Expired - Fee Related CN202261345U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN2011203511161U CN202261345U (en) 2011-09-20 2011-09-20 Ethernet switch chip port loopback detection device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN2011203511161U CN202261345U (en) 2011-09-20 2011-09-20 Ethernet switch chip port loopback detection device

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CN202261345U true CN202261345U (en) 2012-05-30

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103139012A (en) * 2012-12-03 2013-06-05 深圳市共进电子股份有限公司 Ethernet port test method and network devices

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103139012A (en) * 2012-12-03 2013-06-05 深圳市共进电子股份有限公司 Ethernet port test method and network devices
CN103139012B (en) * 2012-12-03 2016-06-08 深圳市共进电子股份有限公司 A kind of Ethernet interface method of testing and the network equipment

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CF01 Termination of patent right due to non-payment of annual fee
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Granted publication date: 20120530

Termination date: 20170920