CN202906941U - Ethernet switch chip port loopback detection device - Google Patents

Ethernet switch chip port loopback detection device Download PDF

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Publication number
CN202906941U
CN202906941U CN201220586830.3U CN201220586830U CN202906941U CN 202906941 U CN202906941 U CN 202906941U CN 201220586830 U CN201220586830 U CN 201220586830U CN 202906941 U CN202906941 U CN 202906941U
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loopback
port
switch chip
utility
frame
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CN201220586830.3U
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高志民
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Abstract

The utility model provides an Ethernet switch chip port loopback detection device, belonging to the technical field of data communication. An object of the utility model is to solve the problem that, because of the misconnection of external cables or other reasons, the communication is broken down as ports of an Ethernet switch chip are looped back. The technical scheme of the utility model is that: a loopback detection circuit is designed outside the switch chip; an interface of a control circuit is connected to a management interface of the switch chip, and another interface of the control circuit is connected to a communication port of the switch chip; the loopback detection circuit transmits a data frame with specified content to the communication port at regular times, and receives a frame at the port and analyzed; and when the frame transmitted by the loopback detection circuit with the specified content is received, it is determined that ports of the switch chip are looped back, a loopback path is analyzed according to the content of the frame and the configuration of the switch, and an inevitable circuit for the loopback of the switch chip is broken. With the Ethernet switch chip port loopback detection device, the ports related to the loopback can be found out, thereby preventing the communication failure.

Description

A kind of chips of Ethernet exchange loop back detection device
Technical field
The utility model relates to the data communication technology field, is to judge whether each port of chips of Ethernet exchange loopback occurs, and solves a kind of method that causes communication failure owing to the exchanger chip port loopback.
Background technology
Along with the development of network, and Ethernet switch (hereinafter to be referred as: switch) application is very general.Switch not only is applied in office, family lan, and the broadband access of Ethernet form also becomes one of most economical mode of the Internet broadband access.
Switch is to be made of exchanger chip (or exchanger chip group) and accessory circuit, and there is detailed circuit data in each chip manufacturer.In the port normal use situation of exchanger chip loopback can not occur, but external cable wrong or other special reason, in case port generation loopback will probably cause extremely serious consequence.Loopback occurs in following three kinds of situations:
1, between two ports of exchanger chip oneself loopback occurs.With reference to figure 1, the PO mouth of 5 mouth switch chips (2) has been communicated with by netting twine (1) with the P1 mouth, if exchanger chip port (2) does not have automatic reverse rotation function, netting twine (1) just can form path when being cross spider, if exchanger chip port has self-turnover, netting twine (1) is that parallel lines or cross spider all can successful connections.
2, between two above chips of Ethernet exchange loopback occurs, see Fig. 2: the P0 mouth of exchanger chip (2) and P2 mouth have been connected respectively to P0 mouth and the P2 mouth of switch (3).
3, loopback to occuring in the own TX line of switch port pair and RX line.See Fig. 3: the TX+TX-line pair of supposing the P0 port and own RX+RX-line are to linking to each other.The data that P0 mouth oneself sends will oneself be received, affect the switch normal operation.If be a broadcast frame, this frame will be forwarded to other port, if loopback has also occured other port (for example P1), then this frame can be forwarded to P0 again by P1.If circulation goes down just to cause exchanger chip to work always.
4, when the exchanger chip special applications, when perhaps utilizing the exchanger chip design to derive application product, for example exchanger chip port directly or indirectly is connected with " 4 lines turn 2 line circuits ", also loopback may occur.The port (Media Connection Pins) that Fig. 4 has enumerated exchanger chip (2) directly or indirectly is connected with two kinds of forms of " 4 lines turn 2 line circuits ".When the impedance matching of " 4 lines turn 2 line circuits " (4), P0 port TX line can be from the RX line to not sending back to the P0 mouth after the signal that sends out is entered 4 lines and turns 2 line circuits (4), or the signal that reflects is very weak, Frame or the online signal that can not cause the P0 mouth to receive oneself to send.But 2 lines port processed (6) occurs unsettled or certain reason circuit impedance when not mating, the RX line is stronger to the signal that sends back to the P0 mouth, Frame or the online signal that can cause the P0 mouth to receive oneself to send, this has just caused the actual from loopback of P0 mouth.
The utility model content
Introduced the concept of a series of reduced forms in the utility model content part, this will further describe in the embodiment part.Utility model content part of the present utility model does not also mean that key feature and the essential features that will attempt to limit technical scheme required for protection, does not more mean that the protection range of attempting to determine technical scheme required for protection.
The utility model provides a kind of chips of Ethernet exchange loop back detection device, it is characterized in that, loopback detection circuit of the outside design of exchanger chip, an interface of control circuit is connected to the management interface PHY Serial Management Interface of exchanger chip, and another interface is connected to a PORT COM of exchanger chip.
An interface of described control circuit is connected to the MII interface of a PORT COM of exchanger chip.
Regularly sent the Frame of certain content to this PORT COM by the loopback detection control circuit, receive and the analysis frame content at this port simultaneously, when receiving the frame of the certain content that oneself sends, both judged the exchanger chip ports having loopback had occured, and utilization analyzes loop-back path to the configuration of switch with according to content frame, that closes the exchanger chip loopback must be through circuit, or sets the port vlan configuration that produces loopback, and this port is no longer exerted an influence to whole exchanger chip.
Frame format of the present utility model is determined by the designer of product, continued to receive and the analysis frame content by the PORT COM of loopback detection control circuit at exchanger chip, if the content frame judged result that receives is thought the Frame that oneself sends to illustrate that then loopback has occured in this exchanger chip ports having.Judge simultaneously the related port that loopback occurs, that closes loop-back path must through port circuit, cut off loop-back path.Also can solve loopback with the method for the related port vlan state that disposes this loopback, for example the loopback port is divided among the VLAN who does not affect the exchanger chip communication, this port is in fact left unused, therefore, the utility model has been avoided because the generation of the communication failure that chips of Ethernet exchange port loopback brings.
Description of drawings
Following accompanying drawing of the present utility model is used for understanding the utility model at this as a part of the present utility model.Shown in the drawings of embodiment of the present utility model and description thereof, be used for explaining principle of the present utility model.In the accompanying drawings,
Fig. 1, Fig. 2, Fig. 3, Fig. 4 are the various ways of switch generation loopback.
Fig. 5 is a kind of execution mode schematic diagram of the present utility model.
Embodiment
In the following description, having provided a large amount of concrete details understands the utility model more thoroughly in order to provide.Yet, it will be apparent to one skilled in the art that the utility model can need not one or more these details and implemented.In other example, for fear of obscuring with the utility model, be not described for technical characterictics more well known in the art.
Loopback detection circuit 7 in the utility model can or utilize programmable logic device to realize with single-chip microcomputer.Be the explanation embodiment, Fig. 5 is a kind of realization circuit schematic block diagram of the present utility model as an example of 5 mouth switch chips example.An interface of loopback detection control circuit 7 links to each other with the MII interface (Media Independent Interface Media Independent Interface) of a PORT COM P4 mouth of exchanger chip 9, with the communication of MII interface specification, can be to the P4 port transmission frame of exchanger chip 9 with from P4 port received frame.Another interface of loopback detection circuit 7 is connected with the management interface SMI port (Serial Management Interface serial management interface) of exchanger chip 9 simultaneously, is used for configuration switch chip 9 inner parameters and reads inner parameter.Connect the P4 mouth although this execution mode is loopback detection control circuit 7, and with MII interface communication transceiving data frame, the utility model is not limited to and only connects the P4 mouth, also is not limited to and only uses MII mouth transceiving data frame.Exchanger chip also is not limited to 5 mouth switch chips.
During software programming, there is several different methods to judge the concrete port whether this exchanger chip 9 loopback and loopback occur.First method for example: loopback detection control circuit 7 writes configuration information by the SMI mouth to exchanger chip 9, and the frame affix that allows other port of exchanger chip 9 transmit to the P4 mouth comes the information of source port.To receive that any frame can identify be which port of exchanger chip 9 sends to loopback detection control circuit 7 so.7 timed sending of loopback detection control circuit are returned the detection frame to switch P4 choma, and (for example destination address is 16 system FFFFFFFFFFFF, source address is particular address), if received the specific loopback detection frame that oneself sent in the certain hour, just can judge is that exchanger chip 9 which port send, then by SMI port arrangement exchanger chip, allow this port shutdown (allowing at least this port receiving circuit close).So just cut off the return path of switch loopback.Solved sn wrap-around issue.Second method: write configuration information to exchanger chip 9 by the SMI port, allow P4 only to send frame to P0, but can receive the frame that any port returns, illustrate that then loopback has occured in exchanger chip 9 ports havings, whether no matter judge by which port return, the transtation mission circuit that can determine at least the P0 mouth is the necessary path that produces loopback.Close the P0 port or close at least the transtation mission circuit of P0 port, just solved sn wrap-around issue.If do not receive the detection frame of oneself in loopback detection control circuit 7 certain hours, illustrate that then loopback does not occur the P0 mouth.Test successively other port of exchanger chip 9 with the method, just can find out the port that loopbacks occur for all, and close.The method of cutting off loop-back path also can be utilized the function of switch VLAN, is divided into separately among the VLAN such as certain port that loopback will occur, and this port is in fact left unused.
Top software judges that loop-back path is the method that two kinds of softwares are differentiated, but is not limited to this two kinds of methods.Loopback detection can regularly be carried out.Find to close the corresponding port behind the loopback, avoid affecting the normal operation of the exchanger chip port that does not send loopback.Behind the certain interval of time port of closing is opened again detection temporarily, just recover normal operation if no longer include the loopback situation.If still be that wrapped state just continues to close.
The utility model is illustrated by above-described embodiment, but should be understood that, above-described embodiment just is used for for example and the purpose of explanation, but not is intended to the utility model is limited in the described scope of embodiments.It will be understood by those skilled in the art that in addition; the utility model is not limited to above-described embodiment; can also make more kinds of variants and modifications according to instruction of the present utility model, these variants and modifications all drop in the utility model scope required for protection.Protection range of the present utility model is defined by the appended claims and equivalent scope thereof.

Claims (2)

1. chips of Ethernet exchange loop back detection device, it is characterized in that, loopback detection circuit of the outside design of exchanger chip, an interface of control circuit is connected to the management interface PHY Serial Management Interface of exchanger chip, and another interface is connected to a PORT COM of exchanger chip.
2. device as claimed in claim 1 is characterized in that, an interface of described control circuit is connected to the MII interface of a PORT COM of exchanger chip.
CN201220586830.3U 2012-11-09 2012-11-09 Ethernet switch chip port loopback detection device Expired - Fee Related CN202906941U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201220586830.3U CN202906941U (en) 2012-11-09 2012-11-09 Ethernet switch chip port loopback detection device

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Application Number Priority Date Filing Date Title
CN201220586830.3U CN202906941U (en) 2012-11-09 2012-11-09 Ethernet switch chip port loopback detection device

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110278126A (en) * 2019-06-28 2019-09-24 苏州浪潮智能科技有限公司 A kind of switch port self checking method, system, terminal and storage medium

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110278126A (en) * 2019-06-28 2019-09-24 苏州浪潮智能科技有限公司 A kind of switch port self checking method, system, terminal and storage medium

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Granted publication date: 20130424

Termination date: 20131109