CN202261200U - Pulse width modulation circuit used for direct-current (DC) circuit breaking - Google Patents
Pulse width modulation circuit used for direct-current (DC) circuit breaking Download PDFInfo
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- CN202261200U CN202261200U CN2011203049045U CN201120304904U CN202261200U CN 202261200 U CN202261200 U CN 202261200U CN 2011203049045 U CN2011203049045 U CN 2011203049045U CN 201120304904 U CN201120304904 U CN 201120304904U CN 202261200 U CN202261200 U CN 202261200U
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Abstract
The utility model discloses a pulse width modulation circuit used for direct-current (DC) circuit breaking which comprises a first pulse generating circuit, a second pulse generating circuit, a first drive generating circuit, a second drive generating circuit and an output circuit, wherein the first pulse generating circuit is used for converting DC input voltage into pulse voltage with pulse width of T1, the second pulse generating circuit is used for converting the pulse voltage with the pulse width of T1 into pulse voltage with the pulse width of T2, the first drive generating circuit is used for conducting frequency division processing on the pulse voltage with the pulse width of T1 and outputting pulse voltage DRIVER1 after frequency division to the output circuit, the second drive generating circuit is used for conducting the frequency division processing on the pulse voltage with the pulse width of T2 and outputting pulse voltage DRIVER2 after frequency division to the output circuit, and the output circuit is used for conducting output processing on the pulse voltage DRIVER1 output by the first drive generating circuit and the pulse voltage DRIVER2 output by the second drive generating circuit, and outputting total drive pulse voltage DRIVER.
Description
Technical field
The utility model relates to electric and electronic technical field, relates in particular to a kind of pulse-width modulation circuit that is used for direct current interruption.
Background technology
Along with the continuous development of science and technology, green energy resource constantly enters among the daily productive life.Yet luminous energy, wind energy transformation are that electric energy becomes the current research focus.Could use to load and generally need be transformed to alternating current through inverter for the direct voltage that obtains through photovoltaic battery array, wind power generation or other the whole bag of tricks in the prior art.Be usually less than the electrical network crest voltage, can't directly be linked among the electrical network, supply the user to use.Therefore, need direct voltage be boosted to usually and can realize that voltage-type generates electricity by way of merging two or more grid systems after being higher than the electrical network crest voltage.Usually the method that adopts has: the single-stage buck type generates electricity by way of merging two or more grid systems; To organize generator unit series connection back is connected to the grid through inverter more; This method system topological is simple, and the one-level energy conversion just can realize generating electricity by way of merging two or more grid systems, but when output dc voltage is lower than the electrical network crest voltage; The inverter cisco unity malfunction reduces system's generating efficiency; Two Stages is generated electricity by way of merging two or more grid systems, and prime DC/DC converter is realized boost function, and a back level DC/AC inverter is realized generating electricity by way of merging two or more grid systems, though the method can be under lower VD normal power generation; The transformer booster type generates electricity by way of merging two or more grid systems, and realizes being incorporated into the power networks feed after combining inverter is boosted through transformer.
In the process that realizes the utility model, the inventor finds to exist at least in the prior art following problem:
The high direct voltage part of photovoltaic DC-to-AC converter of the prior art breaks down or other emergencies need turn-off the time at circuit, is easy to generate high pressure arcing phenomenon, thereby causes fire or dangerously can't in time realize direct current interruption.
The utility model content
The embodiment of the utility model provides a kind of pulse-width modulation circuit that is used for direct current interruption, cooperates hardware circuit, arc extinguishing when realizing the HVDC disconnection.For achieving the above object, the embodiment of the utility model adopts following technical scheme:
A kind of pulse-width modulation circuit that is used for direct current interruption that the utility model provides comprises: first pulse generating circuit, second pulse generating circuit, first drive circuit, second driving generation circuit and the output circuit take place;
Wherein, said first pulse generating circuit is used for DC input voitage is converted into the pulse voltage that pulse duration is T1;
Said second pulse generating circuit, being used for pulse duration is that the pulse voltage of T1 is converted into the pulse voltage that pulse duration is T2;
Said first circuit drive to take place, and being used for said pulsewidth is that the pulse voltage of T1 is carried out frequency division and handled, and the pulse voltage DRIVER1 behind the frequency division exports to output circuit;
Said second circuit drive to take place, and being used for said pulsewidth is that the pulse voltage of T2 is carried out frequency division and handled, and the pulse voltage DRIVER2 behind the frequency division exports to output circuit;
Said output circuit is used for the pulse voltage DRIVER2 that the pulse voltage DRIVER1 and the said second driving generation circuit of the said first driving generation circuit output are exported is exported processing, exports total driving pulse voltage DRIVER.
A kind of pulse-width modulation circuit that is used for direct current interruption that the utility model embodiment provides drives generation circuit, second through first pulse generating circuit, second pulse generating circuit, first and drives generation circuit and output circuit; Wherein, said first pulse generating circuit is used for DC input voitage is converted into the pulse voltage that pulse duration is T1; Said second pulse generating circuit, being used for pulse duration is that the pulse voltage of T1 is converted into the pulse voltage that pulse duration is T2; Said first circuit drive to take place, and being used for said pulsewidth is that the pulse voltage of T1 is carried out frequency division and handled, and the pulse voltage DRIVER1 behind the frequency division exports to output circuit; Said second circuit drive to take place, and being used for said pulsewidth is that the pulse voltage of T2 is carried out frequency division and handled, and the pulse voltage DRIVER2 behind the frequency division exports to output circuit; Said output circuit; Be used for the pulse voltage DRIVER2 that the pulse voltage DRIVER1 and the said second driving generation circuit of the said first driving generation circuit output are exported is exported processing; Export total driving pulse voltage DRIVER; When input INPUT was HVDC, conducting and shutoff through DRIVERK control IGBT switching tube made the copped wave of output voltage OUTPUT high pressure; The high direct voltage part that prevents photovoltaic DC-to-AC converter breaks down or other emergencies produce high pressure arcing phenomenon need turn-off the time at circuit, realizes timely direct current interruption.
Description of drawings
A kind of pulse-width modulation circuit figure that is used for direct current interruption that Fig. 1 provides for the utility model embodiment;
A kind of circuit diagram that is used for the pulse-width modulation circuit of direct current interruption that Fig. 2 provides for the utility model embodiment;
A kind of pulse-width modulation circuit sequential chart that is used for direct current interruption that Fig. 3 provides for the utility model embodiment.
Embodiment
Below in conjunction with accompanying drawing a kind of pulse-width modulation circuit that is used for direct current interruption that the utility model embodiment provides is described in detail.
A kind of pulse-width modulation circuit figure that is used for direct current interruption as shown in Figure 1, as to provide for the utility model embodiment; This circuit comprises: first pulse generating circuit 101, second pulse generating circuit 102, first drive and circuit 103, second takes place drive circuit 104 and output circuit 105 take place;
Wherein, said first pulse generating circuit 101 is used for DC input voitage is converted into the pulse voltage that pulse duration is T1;
Said second pulse generating circuit 102, being used for pulse duration is that the pulse voltage of T1 is converted into the pulse voltage that pulse duration is T2;
Said first circuit 103 drive to take place, and being used for said pulsewidth is that the pulse voltage of T1 is carried out frequency division and handled, and the pulse voltage DRIVER1 behind the frequency division exports to output circuit;
Said second circuit 104 drive to take place, and being used for said pulsewidth is that the pulse voltage of T2 is carried out frequency division and handled, and the pulse voltage DRIVER2 behind the frequency division exports to output circuit;
Said output circuit 105 is used for the pulse voltage DRIVER2 that the pulse voltage DRIVER1 and the said second driving generation circuit of the said first driving generation circuit output are exported is exported processing, exports total driving pulse voltage DRIVER.
A kind of circuit diagram that is used for the pulse-width modulation circuit of direct current interruption as shown in Figure 2, as to provide for the utility model embodiment; This circuit comprises: first pulse generating circuit 101, second pulse generating circuit 102, first drive and circuit 103, second takes place drive circuit 104 and output circuit 105 take place;
Wherein, said first pulse generating circuit comprises: the 3rd resistance R 3, the six resistance R 6, the ten resistance R 10, the 14 resistance R 14, the 15 resistance R 15, the 17 resistance R 17, the 50 resistance R 50, the three capacitor C, 3, the first amplifier N1 and the first diode V10;
Said the 14 resistance R 14 1 termination DC input voitage V1, the other end links to each other with said the 15 resistance R 15; The positive input terminal of the said first amplifier N1 of said the 15 resistance R 15 another terminations;
Said the 50 resistance R 50 1 termination DC input voitages, the other end links to each other with said the 17 resistance R 17; The negative input end of the said first amplifier N1 of said the 17 resistance R 17 another terminations;
Said the tenth resistance R 10 1 ends link to each other other end ground connection with said the 14 resistance R 14 other ends;
Said the 3rd capacitor C 3 one ends link to each other other end ground connection with said the 50 resistance R 50 other ends;
Said the 3rd resistance R 3 one ends link to each other the positive input terminal of the said first amplifier N1 of another termination with the first diode V10 is anodal; The said first diode V10 negative pole links to each other with the output of the said first amplifier N1;
Between the positive input terminal and output of 6 parallel connections of said the 6th resistance R and the said first amplifier N1;
The power access end of the said first amplifier N1 and said DC input voitage V1 join.
Wherein, said second pulse generating circuit comprises: the 16 resistance R 16, the second triode Q2, the 8th resistance R the 8, the 12 resistance R 12, first capacitor C 1, the first triode Q1, the 19 resistance R the 19, the 20 resistance R the 20, the 21 resistance R 21, the 4th capacitor C 4, the 5th capacitor C 5, the 4th voltage-stabiliser tube V40, the 23 resistance R the 23, the 22 resistance R the 22, the 24 resistance R the 24, the 25 resistance R 25, the second amplifier N2;
Said the 16 resistance R 16 1 ends link to each other with the output of the said first amplifier N1, and the other end links to each other with the base stage of the said second triode Q2;
The grounded emitter of the said second triode Q2, collector electrode link to each other with an end of said the 8th resistance R 8 and said the 12 resistance R 12 respectively;
Between the emitter and collector electrode of 1 parallel connection of said first capacitor C and the said second triode Q2;
The other end of said the 8th resistance R 8 links to each other with the emitter of said first triode;
The other end of said the 12 resistance R 12 links to each other with the base stage of said first triode;
The collector electrode of said first triode links to each other with an end of said the 19 resistance;
The other end of said the 19 resistance respectively with said the 21 resistance R 21, said the 4th capacitor C 4, the negative pole of said the 4th voltage-stabiliser tube V40 links to each other with an end of said the 23 resistance R 23;
The other end of said the 21 resistance R 21 respectively with said the 5th capacitor C 5, an end of said the 25 resistance R 25 links to each other; The other end ground connection of said the 5th capacitor C 5; The negative input end of the said second amplifier N2 of another termination of said the 25 resistance R 25 links to each other;
Said the 4th capacitor C 4 other end ground connection;
The plus earth of said the 4th voltage-stabiliser tube V40;
The other end of said the 23 resistance R 23 links to each other with an end of said the 22 resistance R 22 and said the 24 resistance R 24 respectively;
The other end ground connection of said the 22 resistance R 22;
The other end of said the 24 resistance R 24 links to each other with the positive input terminal of the said second amplifier N2;
Said the 20 resistance R 20 is connected in parallel between the positive input terminal and output of the said second amplifier N2.
Wherein, said first circuit drive to take place comprises: the 4th resistance R the 4, the 11 resistance R 11, first resistance R 1, the 5th resistance R 5, second resistance R 2, the 9th resistance R 9, four high guaily unit N4, second capacitor C 2, the second diode V20, the 13 resistance R 13, the 3rd diode V30, the 18 resistance R 18 and the 7th resistance R 7;
One end of said the 4th resistance R 4 links to each other with second source V2, and the other end links to each other with said the 11 resistance R 11, said first resistance R 1, said second capacitor C 2 respectively;
Said the 11 resistance R 11 other end ground connection;
Said first resistance R, 1 other end links to each other with said second resistance R 2, said the 5th resistance R 5 respectively; Said the 5th resistance R 5 other ends link to each other with the positive input terminal of said four high guaily unit N4; Said second resistance R, 2 other ends link to each other with said the 7th resistance R 7 one ends; Said the 7th resistance R 7 other ends of stating link to each other with said four high guaily unit N4 output;
Said second capacitor C, 2 other ends are anodal with said the 9th resistance R 9, the said second diode V20 respectively, said the 18 resistance R 18 links to each other; The other end of said the 9th resistance R 9 links to each other with said four high guaily unit N4 negative input end; The said second diode V20 negative pole links to each other with said the 13 resistance R 13 1 ends; The other end of said the 18 resistance R 18 links to each other with said the 3rd diode V30 negative pole; The other end of said the 13 resistance R 13 is anodal with said the 3rd diode V30, an end of said the 7th resistance R 7 links to each other, and the pulse voltage DRIVER1 behind the output frequency division.
Wherein, said second circuit drive to take place comprises: the 32 resistance R the 32, the 36 resistance R the 36, the 30 resistance R the 30, the 33 resistance R the 33, the 31 resistance R the 31, the 35 resistance R 35, the 3rd amplifier N3, the 8th capacitor C 8, the 8th diode V80, the 37 resistance R 37, the 9th diode V90, the 38 resistance R 38 and the 34 resistance R 34;
One end of said the 32 resistance R 32 links to each other with second source V2, and the other end links to each other with said the 36 resistance R 36, said the 30 resistance R 30, said the 8th capacitor C 8 respectively;
Institute's the 36 resistance R 36 other end ground connection;
Said the 30 resistance R 30 other ends link to each other with said the 31 resistance R 31, said the 33 resistance R 33 respectively; Said the 33 resistance R 33 other ends link to each other with the positive input terminal of said the 3rd amplifier N3; Said the 31 resistance R 31 other ends link to each other with said the 34 resistance R 34 1 ends; Said the 34 resistance R 34 other ends of stating link to each other with said the 3rd amplifier N3 output;
Said the 8th capacitor C 8 other ends are anodal with said the 35 resistance R 35, said the 8th diode V80 respectively, said the 38 resistance R 38 links to each other; The other end of said the 35 resistance R 35 links to each other with said the 3rd amplifier N3 negative input end; Said the 8th diode V80 negative pole links to each other with said the 37 resistance R 37 1 ends; The other end of said the 38 resistance R 38 links to each other with said the 9th diode V90 negative pole; The other end of said the 37 resistance R 37 is anodal with said the 9th diode V90, an end of said the 34 resistance R 34 links to each other, and the pulse voltage DRIVER2 behind the output frequency division.
Further, said second circuit drive to take place also comprises: the 26 resistance R the 26, the 27 resistance R the 27, the 28 resistance R the 28, the 29 resistance R 29, the 3rd triode Q3, the 4th triode Q4, the 6th capacitor C 6, the 7th capacitor C 7 and the 7th diode V70;
Said the 28 resistance R 28 resistance link to each other with the output of the said second amplifier N2, and the other end links to each other with said the 4th triode Q4 base stage;
Said the 4th triode Q4 collector electrode links to each other with an end of said the 26 resistance R 26, said the 27 resistance R 27 respectively; Grounded emitter;
Said the 26 resistance R 26 another termination power VCC;
Said the 3rd triode Q3 base stage of said the 27 resistance R 27 another terminations;
Said the 3rd triode Q3 emitter meets said power supply VCC, and collector electrode links to each other with an end of said the 29 resistance R 29; The other end of said the 29 resistance R 29 links to each other with said the 3rd amplifier N3 power access end;
An end links to each other with the other end of said the 29 resistance R 29 after said the 6th capacitor C 6, the 7th capacitor C 7 and the 7th diode V70 parallel connection; Other end ground connection.
Wherein, said output circuit comprises: the 5th diode V50 and the 6th diode V60;
Pulse voltage DRIVER1 behind the anodal input of said the 5th diode V50 frequency division;
Pulse voltage DRIVER2 behind the anodal input of said the 6th diode V60 frequency division;
Said the 5th diode V50 negative pole is exported total driving pulse voltage DRIVER with after said the 6th diode V60 negative pole is parallelly connected.
Concrete realization principle below in conjunction with the realization circuit of 2 pairs of the utility model of accompanying drawing is carried out detailed elaboration:
At first provide one to add positive voltage V1 to circuit, the just above-described DC input voitage of said positive voltage V1, V1 get into the positive input terminal of amplifier N1 through resistance R 14 after R10 dividing potential drop and the R15 current limliting; V1 is through the negative input end of a RC charging circuit entering N1, resistance R 15, R17; R6, R3, V1 and amplifier N1 have formed a basic comparison circuit; Promptly when positive input voltage during greater than the negative input voltage, amplifier output high level, otherwise output low level then.When circuit is started working, because this moment, positive input terminal was higher than negative input end voltage, amplifier output this moment high level; Then V1 is through R50; The RC charging circuit charging that C3 forms, the negative input voltage raises gradually, when being charged to negative voltage and equaling positive phase voltage; Amplifier output low level, i.e. the circuit impulse wave T1 that to be output as a high level lasting time be t1.Wherein t1 can pass through divider resistance R14, and R10 and RC charging circuit parameter are regulated; When T1 was high level, NPN managed the base voltage of Q2 greater than emitter voltage, the Q2 conducting; The base voltage of PNP pipe Q1 is less than emitter voltage; The Q1 conducting, this moment, external input voltage VCC produced V2 through divider resistance R19, and V2 is as the supply power voltage of amplifier N2 and N4.Need to prove that amplifier N2 described herein and N4 can be integrated on the chip, like this, the feeder ear of said amplifier N2 and N4 and earth terminal can adopt same feeder ear and the earth terminal on the said chip.
V2 after R23 dividing potential drop and the R24 current limliting, is input to the positive input terminal of amplifier N2 through divider resistance R22; V2 is through R21, and the charging circuit that C5 forms gets into the negative input end of N2, resistance R 24; R25; R20 and amplifier N2 form a typical comparison circuit, and the principle that produces with T1 is identical, and this moment, amplifier N2 produced the impulse wave T2 that high level lasting time is t2; V2 is through divider resistance R4, and R11 gets into by R1, R5,, R2, R9, R7, C2, V2, R13, R18, V30, the square wave generation circuit of N4 composition, promptly get into amplifier N4 positive input terminal.When amplifier N4 output voltage greater than through the partial pressure value of R4, two resistance of R11 the time; V30 conducting and V20 ends; The reverse charging time constant is the product of R18 and C2; When output voltage less than V30 during through the partial pressure value of R4, two resistance of R11, V20 conducting and V30 ends, the reverse charging time constant is the product of R13 and C2.Choose the different duty ratios that drive DRIVER1 that just can change with the ratio of R18 of R13, through changing resistance R 13, the value of R18 and capacitor C 2 can change the cycle that drives DRIVER1; When T2 was high level, NPN managed the base voltage of Q4 greater than emitter voltage in addition, the Q4 conducting, and PNP manages the base voltage of Q3 less than emitter voltage, the Q3 conducting; This moment, external input voltage VCC produced V3 through divider resistance R29, and V3 is as the supply power voltage of amplifier N3, and V3 is through divider resistance R32 in addition, and R36 gets into by R30, R35; R33, R31, R37, C8, V80; R38, the square wave generation circuit that V90, N3 form promptly enters into the positive input terminal of said amplifier N3.When amplifier N3 output voltage greater than through the partial pressure value of R32, two resistance of R36 the time, V90 conducting and V80 ends, the reverse charging time constant is the product of R38 and C8; When output voltage less than V3 during through the partial pressure value of R324, two resistance of R36, V80 conducting and V90 ends, the reverse charging time constant is the different duty ratios that just can change driving DRIVER2 of ratio that R37 and the product of C8 are chosen R37 and R 38; Through changing resistance R 37, the value of R38 and capacitor C 8 can change the cycle that drives DRIVER2, and DRIVER1 and DRIVER2 are through two diode V50; V60 produces and drives DRIVER, when DRIVER1 is high level, and diode V50 conducting; When DRIVER2 is high level; The V60 conducting, promptly as long as there is one to be high level among DRIVER1 and the DRIVER2, DRIVER promptly exports high level.
When input direct voltage INPUT; Through a switching tube S1; DRIVER is as the drive control signal of this switching tube, and this moment, output voltage OUTPUT was the waveform after the copped wave of INPUT process, and is as shown in Figure 3; The arcing phenomenon that has produced when promptly having realized preventing direct current interruption has very large practicality so this circuit is used in the direct current interruption of photovoltaic DC-to-AC converter.
A kind of pulse-width modulation circuit that is used for direct current interruption that the utility model embodiment provides drives generation circuit, second through first pulse generating circuit, second pulse generating circuit, first and drives generation circuit and output circuit; Wherein, said first pulse generating circuit is used for DC input voitage is converted into the pulse voltage that pulse duration is T1; Said second pulse generating circuit, being used for pulse duration is that the pulse voltage of T1 is converted into the pulse voltage that pulse duration is T2; Said first circuit drive to take place, and being used for said pulsewidth is that the pulse voltage of T1 is carried out frequency division and handled, and the pulse voltage DRIVER1 behind the frequency division exports to output circuit; Said second circuit drive to take place, and being used for said pulsewidth is that the pulse voltage of T2 is carried out frequency division and handled, and the pulse voltage DRIVER2 behind the frequency division exports to output circuit; Said output circuit; Be used for the pulse voltage DRIVER2 that the pulse voltage DRIVER1 and the said second driving generation circuit of the said first driving generation circuit output are exported is exported processing; Export total driving pulse voltage DRIVER; The high direct voltage part that prevents photovoltaic DC-to-AC converter breaks down or other emergencies produce high pressure arcing phenomenon need turn-off the time at circuit, realizes timely direct current interruption.
The above; Be merely the embodiment of the utility model; But the protection range of the utility model is not limited thereto; Any technical staff who is familiar with the present technique field can expect changing or replacement in the technical scope that the utility model discloses easily, all should be encompassed within the protection range of the utility model.Therefore, the protection range of the utility model should be as the criterion by said protection range with claim.
Claims (7)
1. a pulse-width modulation circuit that is used for direct current interruption is characterized in that, comprising: first pulse generating circuit, second pulse generating circuit, first drive circuit, second driving generation circuit and the output circuit take place;
Wherein, said first pulse generating circuit is used for DC input voitage is converted into the pulse voltage that pulse duration is T1;
Said second pulse generating circuit, being used for pulse duration is that the pulse voltage of T1 is converted into the pulse voltage that pulse duration is T2;
Said first circuit drive to take place, and being used for said pulsewidth is that the pulse voltage of T1 is carried out frequency division and handled, and the pulse voltage DRIVER1 behind the frequency division exports to output circuit;
Said second circuit drive to take place, and being used for said pulsewidth is that the pulse voltage of T2 is carried out frequency division and handled, and the pulse voltage DRIVER2 behind the frequency division exports to output circuit;
Said output circuit is used for the pulse voltage DRIVER2 that the pulse voltage DRIVER1 and the said second driving generation circuit of the said first driving generation circuit output are exported is exported processing, exports total driving pulse voltage DRIVER.
2. the pulse-width modulation circuit that is used for direct current interruption according to claim 1 is characterized in that, said first pulse generating circuit comprises: the 3rd resistance R 3; The 6th resistance R 6, the ten resistance R 10, the 14 resistance R 14; The 15 resistance R 15, the 17 resistance R 17, the 50 resistance R 50; The 3rd capacitor C 3, the first amplifier N1 and the first diode V10;
Said the 14 resistance R 14 1 termination DC input voitage V1, the other end links to each other with said the 15 resistance R 15; The positive input terminal of the said first amplifier N1 of said the 15 resistance R 15 another terminations;
Said the 50 resistance R 50 1 termination DC input voitages, the other end links to each other with said the 17 resistance R 17; The negative input end of the said first amplifier N1 of said the 17 resistance R 17 another terminations;
Said the tenth resistance R 10 1 ends link to each other other end ground connection with said the 14 resistance R 14 other ends;
Said the 3rd capacitor C 3 one ends link to each other other end ground connection with said the 50 resistance R 50 other ends;
Said the 3rd resistance R 3 one ends link to each other the positive input terminal of the said first amplifier N1 of another termination with the first diode V10 is anodal; The said first diode V10 negative pole links to each other with the output of the said first amplifier N1;
Between the positive input terminal and output of 6 parallel connections of said the 6th resistance R and the said first amplifier N1;
The power access end of the said first amplifier N1 and said DC input voitage V1 join.
3. the pulse-width modulation circuit that is used for direct current interruption according to claim 2; It is characterized in that said second pulse generating circuit comprises: the 16 resistance R 16, the second triode Q2, the 8th resistance R the 8, the 12 resistance R 12, first capacitor C 1, the first triode Q1, the 19 resistance R the 19, the 20 resistance R the 20, the 21 resistance R 21, the 4th capacitor C 4, the 5th capacitor C 5, the 4th voltage-stabiliser tube V40, the 23 resistance R the 23, the 22 resistance R the 22, the 24 resistance R the 24, the 25 resistance R 25, the second amplifier N2;
Said the 16 resistance R 16 1 ends link to each other with the output of the said first amplifier N1, and the other end links to each other with the base stage of the said second triode Q2;
The grounded emitter of the said second triode Q2, collector electrode link to each other with an end of said the 8th resistance R 8 and said the 12 resistance R 12 respectively;
Between the emitter and collector electrode of 1 parallel connection of said first capacitor C and the said second triode Q2;
The other end of said the 8th resistance R 8 links to each other with the emitter of said first triode;
The other end of said the 12 resistance R 12 links to each other with the base stage of said first triode;
The collector electrode of said first triode links to each other with an end of said the 19 resistance;
The other end of said the 19 resistance respectively with said the 21 resistance R 21, said the 4th capacitor C 4, the negative pole of said the 4th voltage-stabiliser tube V40 links to each other with an end of said the 23 resistance R 23;
The other end of said the 21 resistance R 21 respectively with said the 5th capacitor C 5, an end of said the 25 resistance R 25 links to each other; The other end ground connection of said the 5th capacitor C 5; The negative input end of the said second amplifier N2 of another termination of said the 25 resistance R 25 links to each other;
Said the 4th capacitor C 4 other end ground connection;
The plus earth of said the 4th voltage-stabiliser tube V40;
The other end of said the 23 resistance R 23 links to each other with an end of said the 22 resistance R 22 and said the 24 resistance R 24 respectively;
The other end ground connection of said the 22 resistance R 22;
The other end of said the 24 resistance R 24 links to each other with the positive input terminal of the said second amplifier N2;
Said the 20 resistance R 20 is connected in parallel between the positive input terminal and output of the said second amplifier N2.
4. the pulse-width modulation circuit that is used for direct current interruption according to claim 3; It is characterized in that said first circuit drive to take place comprises: the 4th resistance R the 4, the 11 resistance R 11, first resistance R 1, the 5th resistance R 5, second resistance R 2, the 9th resistance R 9, four high guaily unit N4, second capacitor C 2, the second diode V20, the 13 resistance R 13, the 3rd diode V30, the 18 resistance R 18 and the 7th resistance R 7;
One end of said the 4th resistance R 4 links to each other with second source V2, and the other end links to each other with said the 11 resistance R 11, said first resistance R 1, said second capacitor C 2 respectively;
Said the 11 resistance R 11 other end ground connection;
Said first resistance R, 1 other end links to each other with said second resistance R 2, said the 5th resistance R 5 respectively; Said the 5th resistance R 5 other ends link to each other with the positive input terminal of said four high guaily unit N4; Said second resistance R, 2 other ends link to each other with said the 7th resistance R 7 one ends; Said the 7th resistance R 7 other ends of stating link to each other with said four high guaily unit N4 output;
Said second capacitor C, 2 other ends are anodal with said the 9th resistance R 9, the said second diode V20 respectively, said the 18 resistance R 18 links to each other; The other end of said the 9th resistance R 9 links to each other with said four high guaily unit N4 negative input end; The said second diode V20 negative pole links to each other with said the 13 resistance R 13 1 ends; The other end of said the 18 resistance R 18 links to each other with said the 3rd diode V30 negative pole; The other end of said the 13 resistance R 13 is anodal with said the 3rd diode V30, an end of said the 7th resistance R 7 links to each other, and the pulse voltage DRIVER1 behind the output frequency division.
5. the pulse-width modulation circuit that is used for direct current interruption according to claim 4; It is characterized in that said second circuit drive to take place comprises: the 32 resistance R the 32, the 36 resistance R the 36, the 30 resistance R the 30, the 33 resistance R the 33, the 31 resistance R the 31, the 35 resistance R 35, the 3rd amplifier N3, the 8th capacitor C 8, the 8th diode V80, the 37 resistance R 37, the 9th diode V90, the 38 resistance R 38 and the 34 resistance R 34;
One end of said the 32 resistance R 32 links to each other with second source V2, and the other end links to each other with said the 36 resistance R 36, said the 30 resistance R 30, said the 8th capacitor C 8 respectively;
Institute's the 36 resistance R 36 other end ground connection;
Said the 30 resistance R 30 other ends link to each other with said the 31 resistance R 31, said the 33 resistance R 33 respectively; Said the 33 resistance R 33 other ends link to each other with the positive input terminal of said the 3rd amplifier N3; Said the 31 resistance R 31 other ends link to each other with said the 34 resistance R 34 1 ends; Said the 34 resistance R 34 other ends of stating link to each other with said the 3rd amplifier N3 output;
Said the 8th capacitor C 8 other ends are anodal with said the 35 resistance R 35, said the 8th diode V80 respectively, said the 38 resistance R 38 links to each other; The other end of said the 35 resistance R 35 links to each other with said the 3rd amplifier N3 negative input end; Said the 8th diode V80 negative pole links to each other with said the 37 resistance R 37 1 ends; The other end of said the 38 resistance R 38 links to each other with said the 9th diode V90 negative pole; The other end of said the 37 resistance R 37 is anodal with said the 9th diode V90, an end of said the 34 resistance R 34 links to each other, and the pulse voltage DRIVER2 behind the output frequency division.
6. the pulse-width modulation circuit that is used for direct current interruption according to claim 5; It is characterized in that said second circuit drive to take place also comprises: the 26 resistance R the 26, the 27 resistance R the 27, the 28 resistance R the 28, the 29 resistance R 29, the 3rd triode Q3, the 4th triode Q4, the 6th capacitor C 6, the 7th capacitor C 7 and the 7th voltage-stabiliser tube V70;
Said the 28 resistance R 28 resistance link to each other with the output of the said second amplifier N2, and the other end links to each other with said the 4th triode Q4 base stage;
Said the 4th triode Q4 collector electrode links to each other with an end of said the 26 resistance R 26, said the 27 resistance R 27 respectively; Grounded emitter;
Said the 26 resistance R 26 another termination power VCC;
Said the 3rd triode Q3 base stage of said the 27 resistance R 27 another terminations;
Said the 3rd triode Q3 emitter meets said power supply VCC, and collector electrode links to each other with an end of said the 29 resistance R 29; The other end of said the 29 resistance R 29 links to each other with said the 3rd amplifier N3 power access end;
An end links to each other with the other end of said the 29 resistance R 29 after said the 6th capacitor C 6, the 7th capacitor C 7 and the 7th voltage-stabiliser tube V70 parallel connection; Other end ground connection.
7. according to any described pulse-width modulation circuit that is used for direct current interruption in the claim 1 to 6, it is characterized in that said output circuit comprises: the 5th diode V50 and the 6th diode V60;
Pulse voltage DRIVER1 behind the anodal input of said the 5th diode V50 frequency division;
Pulse voltage DRIVER2 behind the anodal input of said the 6th diode V60 frequency division;
Said the 5th diode V50 negative pole is exported total driving pulse voltage DRIVER with after said the 6th diode V60 negative pole is parallelly connected.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011203049045U CN202261200U (en) | 2011-08-19 | 2011-08-19 | Pulse width modulation circuit used for direct-current (DC) circuit breaking |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011203049045U CN202261200U (en) | 2011-08-19 | 2011-08-19 | Pulse width modulation circuit used for direct-current (DC) circuit breaking |
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| Publication Number | Publication Date |
|---|---|
| CN202261200U true CN202261200U (en) | 2012-05-30 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2011203049045U Expired - Lifetime CN202261200U (en) | 2011-08-19 | 2011-08-19 | Pulse width modulation circuit used for direct-current (DC) circuit breaking |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102957336A (en) * | 2011-08-19 | 2013-03-06 | 北京动力源科技股份有限公司 | Pulse width modulation circuit for direct-current broken circuit |
-
2011
- 2011-08-19 CN CN2011203049045U patent/CN202261200U/en not_active Expired - Lifetime
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102957336A (en) * | 2011-08-19 | 2013-03-06 | 北京动力源科技股份有限公司 | Pulse width modulation circuit for direct-current broken circuit |
| CN102957336B (en) * | 2011-08-19 | 2015-01-21 | 北京动力源科技股份有限公司 | Pulse width modulation circuit for direct-current broken circuit |
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