CN202197268U - Counter based on USB (universal serial bus) interface - Google Patents
Counter based on USB (universal serial bus) interface Download PDFInfo
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- CN202197268U CN202197268U CN2011203064346U CN201120306434U CN202197268U CN 202197268 U CN202197268 U CN 202197268U CN 2011203064346 U CN2011203064346 U CN 2011203064346U CN 201120306434 U CN201120306434 U CN 201120306434U CN 202197268 U CN202197268 U CN 202197268U
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Abstract
The utility model relates to the technical field of electronic measurement, in particular to the field of pulse signal measurement. The utility model adopts the following technical scheme: aiming at the problem, a pulse counter with a USB (universal serial bus) interface is provided and is used for carrying out statistics on the number of target pulse signals within the appointed time interval. The pulse counter comprises a signal processing circuit and a USB interface circuit, and is characterized by further comprising a counting circuit; after being processed, the input pulse signals are sent to the counting circuit by the signal processing circuit; and after the signals which are output by the signal processing circuit and received by the counting circuit are processed, counting signals are output through the USB interface circuit. The pulse counter is mainly applied to the field of pulse signal measurement.
Description
Technical field
The utility model relates to electronic measuring technology field, especially relates to the pulse signal field of measurement.
Background technology
In the electronic measuring technology field, the testing requirement of step-by-step counting is more and more, and especially in the system sensitivity parameter testing in communication system, step-by-step counting is a main field tests.
In the modern testing equipment, the desk-top instrument that is used for the step-by-step counting test is considerably less, has only the integrated circuit board quasi-instrument of a few money PCI/CPCI/PXI platforms seldom.These instruments all have problems such as the instrument volume is big, use inconvenience in use.
The utility model content
The technical scheme that the utility model adopts is the pulse counter that a kind of USB interface is provided to the problems referred to above, be used at the appointed time at interval in, target pulse signal number is added up.
For achieving the above object, the technical scheme that the utility model adopts is:
A kind of USB interface-based counter; Comprise signal processing circuit, usb circuit; Also comprise counting circuit, said signal processing circuit sends to counting circuit with the pulse signal of importing after treatment; Counting circuit receives signal processing circuit output signal after treatment, again through usb circuit output count signal.
Said counting circuit comprises threshold circuit, control circuit, clock circuit, technical finesse circuit, serial port circuit; The output signal of said signal processing circuit and control circuit one tunnel output signal are respectively as threshold circuit two-way input signal; Another road output signal of threshold circuit output signal and control circuit is as the two-way input signal of counting treatment circuit; Counting treatment circuit output signal is connected with serial port circuit through universal serial bus; Serial port circuit output signal is through usb circuit output, and the control circuit clock signal provides through clock circuit.
Can find out that from the architectural feature of above-mentioned the utility model its advantage is:
In communication system, need to investigate sensitivity and these two important parameters of dynamic range; And device is counted through the pulse number to marking signal exactly; And count results carried out analyzing and processing, thereby reflect the sensitivity and the dynamic range index of communication system.
Description of drawings
The utility model will explain through example and with reference to the mode of accompanying drawing, wherein:
Fig. 1 is this schematic diagram of device.
Embodiment
For the purpose, technical scheme and the advantage that make the utility model is clearer,, the utility model is further elaborated below in conjunction with accompanying drawing and embodiment.Should be appreciated that specific embodiment described herein only in order to explanation the utility model, and be not used in qualification the utility model.
Schematic diagram as shown in Figure 1; Comprise signal processing circuit, usb circuit; It is characterized in that also comprising counting circuit, said signal processing circuit sends to counting circuit with the pulse signal of importing after treatment; Counting circuit receives signal processing circuit output signal after treatment, again through usb circuit output count signal.
1, signal processing circuit
Comprise circuit such as decay, amplification and shaping, make input signal become the pulse signal that coincidence measurement requires.
2, counting circuit
Realize through the FPGA treatment circuit.FPGA has selected the XC3S400 series of XILINX company, and cost is very low.The FPGA integrated circuit is realized the step-by-step counting function to input signal under the cooperation of peripheral circuit, and test result is communicated by letter with computer realization through USB interface.
The USB interface control chip that this counter uses is the CP2102 of Silicon company.This integrated circuit is realized the USB-UART bridging functionality, and peripheral circuit is very simple.
Counting circuit comprises threshold circuit, control circuit, clock circuit, counting treatment circuit, serial port circuit; The output signal of said signal processing circuit and control circuit one tunnel output signal are respectively as threshold circuit two-way input signal; Another road output signal of threshold circuit output signal and control circuit is as the two-way input signal of counting treatment circuit; Counting treatment circuit output signal is connected with serial port circuit through universal serial bus; Serial port circuit output signal is through usb circuit output, and the control circuit clock signal provides through clock circuit.
When the threshold signal that threshold circuit produces is effective, begin to calculate the pulse signal number.
The counting treatment circuit is counted for correct pulse number and is added up, and the result is sent to serial port circuit.
Clock circuit is used to produce the required clock pulse of control circuit.
Control circuit is used for producing control and systematic reset signal etc.
Serial port circuit communicates with usb circuit, with count results go here and there and transform after send Computer Processing.
Disclosed all characteristics in this specification except mutually exclusive characteristic, all can make up by any way.
Disclosed arbitrary characteristic in this specification (comprising any accessory claim, summary and accompanying drawing) is only if special narration all can be replaced by other equivalences or the alternative features with similar purpose.That is, only if special narration, each characteristic is an example in a series of equivalences or the similar characteristics.
Claims (2)
1. USB interface-based counter; Comprise signal processing circuit, usb circuit; It is characterized in that also comprising counting circuit, said signal processing circuit sends to counting circuit with the pulse signal of importing after treatment; Counting circuit receives signal processing circuit output signal after treatment, again through usb circuit output count signal.
2. according to the said a kind of USB interface-based counter of claim 1; It is characterized in that said counting circuit comprises threshold circuit, control circuit, clock circuit, technical finesse circuit, serial port circuit; The output signal of said signal processing circuit and control circuit one tunnel output signal are respectively as threshold circuit two-way input signal; Another road output signal of threshold circuit output signal and control circuit is as the two-way input signal of counting treatment circuit; Counting treatment circuit output signal is connected with serial port circuit through universal serial bus, and serial port circuit output signal is through usb circuit output, and the control circuit clock signal provides through clock circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011203064346U CN202197268U (en) | 2011-08-22 | 2011-08-22 | Counter based on USB (universal serial bus) interface |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011203064346U CN202197268U (en) | 2011-08-22 | 2011-08-22 | Counter based on USB (universal serial bus) interface |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN202197268U true CN202197268U (en) | 2012-04-18 |
Family
ID=45952167
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2011203064346U Expired - Fee Related CN202197268U (en) | 2011-08-22 | 2011-08-22 | Counter based on USB (universal serial bus) interface |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN202197268U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103312315A (en) * | 2013-06-05 | 2013-09-18 | 复旦大学 | Method and circuit for removing burrs of output end of counter synchronizing circuit |
-
2011
- 2011-08-22 CN CN2011203064346U patent/CN202197268U/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103312315A (en) * | 2013-06-05 | 2013-09-18 | 复旦大学 | Method and circuit for removing burrs of output end of counter synchronizing circuit |
| CN103312315B (en) * | 2013-06-05 | 2016-01-20 | 复旦大学 | A kind of removing method of counter synchronisation circuit output end burr and circuit |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20120418 Termination date: 20180822 |