CN202167833U - Latch-up phenomenon overcurrent protection circuit at level of chip independent of power supply module - Google Patents
Latch-up phenomenon overcurrent protection circuit at level of chip independent of power supply module Download PDFInfo
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- CN202167833U CN202167833U CN2011200477309U CN201120047730U CN202167833U CN 202167833 U CN202167833 U CN 202167833U CN 2011200477309 U CN2011200477309 U CN 2011200477309U CN 201120047730 U CN201120047730 U CN 201120047730U CN 202167833 U CN202167833 U CN 202167833U
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Abstract
A latch-up phenomenon overcurrent protection circuit at the level of a chip independent of a power supply module relates to the field of an integrated circuit. The latch-up phenomenon overcurrent protection circuit comprises a heavy-current switch module, an equal-proportion current detection module, a decision module and a self-starting module. A power supply PAD is connected with a chip power supply management module via the heavy-current switch module and then connected with a core circuit, the power supply PAD is connected with the heavy-current switch module via the equal-proportion current detection module, the decision module and the self-starting module in order, and the chip power supply management module is connected with the self-starting module. The latch-up phenomenon overcurrent protection circuit can be conveniently used in the chip independent of the power supply module, makes a circuit more secure and reliable, and has the characteristics of high versatility and low power consumption.
Description
Technical field
The utility model relates to integrated circuit fields, particularly is independent of chip-scale latch phenomenon (Latch-up) current foldback circuit of power module.
Background technology
Because the difficulty on making, initial several generations MOS technology only provides nmos device.In fact, many early stage microprocessors and analog circuit all are to adopt NMOS technology to make, but their power consumption is quite big.Although cmos device needs a large amount of mask plate and manufacturing process, the zero quiescent dissipation of CMOS logic has still impelled the arrival of CMOS Age of Technology.Yet, in cmos circuit, can produce a serious problem, be exactly latch phenomenon.
Latch phenomenon is meant in CMOS technology; Parasitic pnp and npn bipolar transistor form a regenerative feedback loop; Add in the electric process when transient high-current at chip and to flow through substrate, perhaps when the external voltage of loading has surpassed normal operating voltage range, the complete conducting of parasitic diode; Have very low equivalent resistance, extract very big electric current from power line.Because the existence of positive feedback, if can not eliminate latch phenomenon timely, lasting big electric current can burn out entire chip.Prevent that latch-up from can consider from two aspects of technology and circuit design: for foundries can the suitable choice impurity concentration and distribution and layout design rules guarantee that the current gain value of dead resistance and bipolar transistor is all very little; Can in domain, add guard ring (guard ring) for circuit designers makes contact resistance minimum.But, after selected a kind of technology, have no idea to change the foundries condition of production for chip design company, and in order to save the area cost, a lot of Chevron Research Company (CRC)s can not guarantee the abundant ground connection of chip layout.Like this, a latch phenomenon current foldback circuit that is independent of integrated circuit fabrication process of design is necessary.
In the prior art, the method that much prevents latch phenomenon is arranged.For example, U.S. Pat 5,212; The output mos pipe of the sampling power source regulating circuit that power sense circuit of use of 616 propositions is real-time, when latch phenomenon took place, power sense circuit sent control signal; The output mos pipe of power cutoff regulating circuit is removed latch phenomenon.The deficiency of this method is that testing circuit is made in the inside of power source regulating circuit and the structure of power source regulating circuit employing has direct relation, and versatility is not strong, and can not realize for the designer of use third party power supply stone.
Summary of the invention
In order to solve the problem that exists in the above-mentioned prior art, the purpose of the utility model provides a kind of chip-scale latch phenomenon current foldback circuit that is independent of power module.It can be used on the chip that is independent of power module easily, makes circuit more safe and reliable, originally has highly versatile, characteristics low in energy consumption.
In order to reach the foregoing invention purpose, the technical scheme of the utility model realizes as follows:
Be independent of the chip-scale latch phenomenon current foldback circuit of power module, its design feature is that it comprises:
A high-current switch module is in order to the total current of control input chip;
An equal proportion current detection module is in order to detect the size that flows into chip current;
A judging module is in order to send into the break-make of size of current control high-current switch module according to the equal proportion current module;
A self-starting module in order to beginning most to power at circuit and latch phenomenon is opened the high-current switch module after removing again, and is the chip normal power supply;
Power supply PAD is connected to the chip power administration module to core circuit through the high-current switch module; Power supply PAD is connected to the high-current switch module through equal proportion current detection module, judging module and self-starting module in addition successively, and the chip power administration module is connected with self-starting module.
In above-mentioned current foldback circuit, the high-current switch pipe that said high-current switch module is PMOS, the source electrode of high-current switch pipe is connected with power supply PAD, and the drain electrode of high-current switch pipe connects the input of chip power administration module.
In above-mentioned current foldback circuit, said equal proportion current detection module comprises:
A little current switch adopts the effective equal proportion that detects big electric current of PMOS;
An operational amplifier that is connected into negative feedback type is used for guaranteeing that the drain potential of high-current switch Guan Yuxiao current switch is identical;
A PMOS transistor that is used for adjusting feedback voltage;
The drain electrode of the positive input termination high-current switch module of said operational amplifier; The negative input end of operational amplifier connects the drain electrode of little current switch; The transistorized grid of output termination of operational amplifier; The source electrode of little current switch meets power supply PAD, and transistorized source electrode takes back the negative input end of operational amplifier, and transistor drain output equal proportion output current is to judging module.
In above-mentioned current foldback circuit, said judging module comprises:
A resistance, joining with transistor drain is used for the equal proportion output current is converted into voltage;
A comparator, positive input terminal and transistor drain are joined, and negative input end connects reference voltage, is used for judging whether output current surpasses setting threshold.
In above-mentioned current foldback circuit, said self-start circuit comprises: a low-voltage that links to each other successively is to high-tension conversion circuit, a delay circuit, one and gate logic; With the output of comparator in another input termination judging module of gate logic, connect the grid of high-current switch pipe with the output of gate logic, in order to the break-make of control high-current switch pipe.
The utility model is owing to adopted said structure; Detection and releasing to latch phenomenon all are independent of power module; Have very strong versatility, can guarantee that entire circuit can effectively detect and remove latch phenomenon when the power supply stone that uses the third party to provide; And can after removing latch phenomenon, restart chip power automatically, guarantee the chip operate as normal.
Below in conjunction with accompanying drawing and embodiment the utility model is further specified.
Description of drawings
Fig. 1 is that the module of the utility model is formed graph of a relation;
Fig. 2 is the circuit diagram of the utility model.
Embodiment
Referring to Fig. 1 and Fig. 2, the utility model comprises: a high-current switch module, in order to the total current of control input chip; An equal proportion current detection module detects the size that flows into chip current in order to the ratio according to design; A judging module is in order to send into the break-make of size of current control high-current switch module according to the equal proportion current module; A self-starting module in order to beginning most to power at circuit and latch phenomenon is opened the high-current switch module after removing again, and is the chip normal power supply.Power supply PAD is connected to the chip power administration module to core circuit through the high-current switch module; Power supply PAD is connected to the high-current switch module through equal proportion current detection module, judging module and self-starting module in addition successively, and the chip power administration module is connected with self-starting module.The high-current switch module is the high-current switch pipe Mp1 of PMOS, and the source electrode of high-current switch pipe Mp1 is connected with power supply PAD, and the drain electrode of high-current switch pipe Mp1 connects the input of chip power administration module.The equal proportion current detection module includes: a little current switch Mp2, adopt the effective equal proportion that detects big electric current of PMOS; An operational amplifier A mp who is connected into negative feedback type is used for guaranteeing that the drain potential of high-current switch Guan Yuxiao current switch is identical; A PMOS transistor Mp3 who is used for adjusting feedback voltage.The drain electrode of the positive input termination high-current switch pipe high-current switch pipe Mp1 of operational amplifier A mp; The negative input end of operational amplifier A mp connects the drain electrode of little current switch Mp2; The output of operational amplifier A mp connects the grid of transistor Mp3; The source electrode of little current switch Mp2 meets power supply PAD, and the source electrode of transistor Mp3 takes back the negative input end of operational amplifier A mp, and the drain electrode output equal proportion output current of transistor Mp3 is to judging module.
Judging module comprises: a resistance R 1, and joining with the drain electrode of transistor Mp3 is used for the equal proportion output current is converted into voltage; A comparator C omp, the drain electrode of positive input terminal and transistor Mp3 is joined, and negative input end connects reference voltage, is used for judging whether output current surpasses setting threshold.Self-start circuit comprises continuous successively: a low-voltage is to high-tension conversion circuit L2H, a delay circuit Delay, one and gate logic; With the output of comparator C omp in another input termination judging module of gate logic, connect the grid of high-current switch pipe Mp1 with the output of gate logic, in order to the break-make of control high-current switch pipe Mp1.
During the utility model operate as normal, equal proportion current detection module and the complete conducting of judging module control high-current switch pipe Mp1, chip is in normal operating conditions; When chip generation latch phenomenon, judging module is closed high-current switch pipe Mp1, stops the entire chip power supply, and then latch phenomenon is removed; After latch phenomenon was removed, self-starting module was opened high-current switch pipe Mp1 again, recovered the normal power supply to chip.。
The inner circuit structure of the equal proportion current detection module of the utility model has utilized " virtual earth " characteristic of operational amplifier A mp; Make that the drain terminal current potential of high-current switch pipe Mp1 and little current switch Mp2 is identical; Source electrode owing to high-current switch pipe Mp1 and little current switch Mp2 is connected on the input power supply PAD simultaneously again; Make that the electric current that flows through two pipes is proportional, has accomplished the equal proportion current sense function when two metal-oxide-semiconductors are opened simultaneously.
In the judging module of the utility model, the grid of control high-current switch pipe Mp1 after the output of comparator C omp and the computing of the output of start-up circuit process simple logic.Under the normal condition, the output of equal proportion current detection module is converted into behind the voltage less than reference voltage, and comparator C omp is output as low level, guarantees high-current switch pipe Mp1 conducting; When latch phenomenon takes place when; It is big that the output current of equal proportion current detection module becomes step by step; Correspondent voltage also surpasses constant reference voltage level gradually, and comparator C omp output becomes high level, and high-current switch pipe Mp1 is turn-offed; Thereby stop to chip power supply, so just can eliminate latch phenomenon.
In the self-starting module of the utility model, conversion circuit L2H is used for the low-voltage of chip power administration module output is converted into the supply voltage that PAD imports, and uses the simplest source amplifier to realize.Delay circuit Delay is used for the output signal of chip power administration module is delayed time, and after guaranteeing initial startup and latch phenomenon taking place, the correct judgment of circuit and reliable is realized by chain of inverters.Be used for coordinating the priority of judging module and self-starting module with gate logic, provide the grid control signal of final high-current switch pipe Mp1.
The working condition of the utility model can be divided into four-stage according to the operating state of chip:
Phase I: initially power on.There is not power supply when initially powering in the chip; The chip power administration module is output as low level, and self-starting module is obtained initiative, through conversion circuit L2H, delay circuit Delay and and gate logic; Open high-current switch pipe Mp1, make chip get into normal operating conditions.
Second stage: operate as normal.During operate as normal, the chip power administration module has correct output voltage, and self-starting module is surrendered control, the working condition of equal proportion current detection module and the real-time detection chip of judging module.
Phase III: latch phenomenon takes place.After latch phenomenon took place, the output of equal proportion current detection module increased step by step, and respective output voltages surpasses preset reference voltage, and decision circuit produces the signal of closing high-current switch pipe Mp1.Cut off the supply access of entire chip, latch phenomenon is able to remove.
Stage: restart automatically.Self-start circuit detects chip power administration module output reduce to low level after, through delay circuit Delay, obtain the control of high-current switch pipe Mp1, high-current switch pipe Mp1 is opened, recover the chip operate as normal.
Need to prove that operational amplifier A mp in the utility model and comparator C omp can adopt various structures according to actual conditions.Increase the versatility of circuit like this, reduced design cost.
Claims (5)
1. be independent of the chip-scale latch phenomenon current foldback circuit of power module, it is characterized in that it comprises:
A high-current switch module is in order to the total current of control input chip;
An equal proportion current detection module detects the size that flows into chip current in order to the ratio according to design;
A judging module is in order to send into the break-make of size of current control high-current switch module according to the equal proportion current module;
A self-starting module in order to beginning most to power at circuit and latch phenomenon is opened the high-current switch module after removing again, and is the chip normal power supply;
Power supply PAD is connected to the chip power administration module to core circuit through the high-current switch module; Power supply PAD is connected to the high-current switch module through equal proportion current detection module, judging module and self-starting module in addition successively, and the chip power administration module is connected with self-starting module.
2. the chip-scale latch phenomenon current foldback circuit that is independent of power module as claimed in claim 1; It is characterized in that; The high-current switch pipe (Mp1) that said high-current switch module is PMOS; The source electrode of high-current switch pipe (Mp1) is connected with power supply PAD, and the drain electrode of high-current switch pipe (Mp1) connects the input of chip power administration module.
3. the chip-scale latch phenomenon current foldback circuit that is independent of power module as claimed in claim 2 is characterized in that said equal proportion current detection module comprises: a little current switch (Mp2), adopt the effective equal proportion that detects big electric current of PMOS; An operational amplifier (Amp) that is connected into negative feedback type is used for guaranteeing that the drain potential of high-current switch Guan Yuxiao current switch is identical;
A PMOS transistor (Mp3) that is used for adjusting feedback voltage;
The drain electrode of the positive input termination high-current switch pipe (Mp1) of said operational amplifier (Amp); The negative input end of operational amplifier (Amp) connects the drain electrode of little current switch (Mp2); The grid of the output termination transistor (Mp3) of operational amplifier (Amp); The source electrode of little current switch (Mp2) meets power supply PAD, and the source electrode of transistor (Mp3) takes back the negative input end of operational amplifier (Amp), and the drain electrode output equal proportion output current of transistor (Mp3) is to judging module.
4. the chip-scale latch phenomenon current foldback circuit that is independent of power module as claimed in claim 3 is characterized in that said judging module comprises:
A resistance (R1), joining with the drain electrode of transistor (Mp3) is used for the equal proportion output current is converted into voltage;
A comparator (Comp), the drain electrode of positive input terminal and transistor (Mp3) is joined, and negative input end connects reference voltage, is used for judging whether output current surpasses setting threshold.
5. the chip-scale latch phenomenon current foldback circuit that is independent of power module as claimed in claim 4; It is characterized in that; Said self-starting module comprises: a low-voltage that links to each other successively is to high-tension conversion circuit (L2H), a delay circuit (Delay), one and gate logic; With the output of comparator (Comp) in another input termination judging module of gate logic, connect the grid of high-current switch pipe (Mp1) with the output of gate logic, in order to the break-make of control high-current switch pipe (Mp1).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011200477309U CN202167833U (en) | 2011-02-25 | 2011-02-25 | Latch-up phenomenon overcurrent protection circuit at level of chip independent of power supply module |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011200477309U CN202167833U (en) | 2011-02-25 | 2011-02-25 | Latch-up phenomenon overcurrent protection circuit at level of chip independent of power supply module |
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| Publication Number | Publication Date |
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| CN202167833U true CN202167833U (en) | 2012-03-14 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2011200477309U Expired - Lifetime CN202167833U (en) | 2011-02-25 | 2011-02-25 | Latch-up phenomenon overcurrent protection circuit at level of chip independent of power supply module |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102651543A (en) * | 2011-02-25 | 2012-08-29 | 北京同方微电子有限公司 | Chip-scale latch-up over-current protection circuit independent of power supply module |
| CN110492431A (en) * | 2019-08-29 | 2019-11-22 | 中国科学院近代物理研究所 | The single event latch-up protective device and clear-latch method of charge measurement chip |
-
2011
- 2011-02-25 CN CN2011200477309U patent/CN202167833U/en not_active Expired - Lifetime
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102651543A (en) * | 2011-02-25 | 2012-08-29 | 北京同方微电子有限公司 | Chip-scale latch-up over-current protection circuit independent of power supply module |
| CN102651543B (en) * | 2011-02-25 | 2014-09-10 | 北京同方微电子有限公司 | Chip-scale latch-up over-current protection circuit independent of power supply module |
| CN110492431A (en) * | 2019-08-29 | 2019-11-22 | 中国科学院近代物理研究所 | The single event latch-up protective device and clear-latch method of charge measurement chip |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| AV01 | Patent right actively abandoned |
Granted publication date: 20120314 Effective date of abandoning: 20140910 |
|
| RGAV | Abandon patent right to avoid regrant |