CN202077004U - Hall switch temperature compensation circuit based on CMOS (complementary metal-oxide-semiconductor transistor) technology - Google Patents

Abstract

The utility model relates to a Hall switch temperature compensation circuit based on the CMOS (complementary metal-oxide-semiconductor transistor) technology, which comprises a Hall sheet, a voltage stabilizer, a signal processing unit, a hysteresis comparator, a clock signal and logic control unit and a voltage bias unit. The clock signal and logic control unit is used for providing clock signals and logic control signals for the signal processing unit and the hysteresis comparator, and the voltage bias unit is used for providing bias voltage for the signal processing unit and the hysteresis comparator, generating the bias voltage identical with Hall mobility of the Hall sheet in temperature coefficient and connecting the bias voltage to the signal processing unit and an input end of the hysteresis comparator to be used as threshold voltage of the hysteresis comparator. Compared with the prior art, the Hall switch temperature compensation circuit can use less components based on the CMOS technology, so that a Hall switch can be in normal operation within a wider temperature range.

Description

Hall switch temperature-compensation circuit based on CMOS technology

Technical field

The utility model relates to Hall switch circuit, particularly relates to a kind of Hall switch temperature-compensation circuit based on CMOS technology.

Background technology

Hall effect is a kind of of magnetoelectric effect, and this phenomenon is that (A.H.Hall 1855-1938) found when studying the conductive mechanism of metal in 1879 U.S. physicist Hall.When current vertical in external magnetic field when the conductor, electrical potential difference can appear between two end faces perpendicular to the magnetic field and the sense of current of conductor, this phenomenon is a Hall effect, this electrical potential difference also is called Hall voltage V _H, its size is:

$V_H=B{\mathrm{\μ}}_{H}I\frac{\mathrm{\ρ}}{t}\mathrm{\δ}\left(\frac{L}{W}\right)---\left(1\right)$

In the formula:

B is the magnetic field intensity on vertical and the Hall web direction;

μ _HBe hall mobility;

I is the electric current that flows through the Hall thin slice;

ρ is a resistivity;

T is the thickness of Hall thin slice;

σ (L/W) is the Hall thin slice geometric correction factor.

Hall element based on Hall effect has developed into a Magnetic Sensor Product Family numerous in variety, is applied to the every field of Industry Control more and more widely.Hall switch promptly is a kind of application wherein, and its utilizes the integrated Hall thin slice of energising to detect the external magnetic field, changes the variation parameter in magnetic field the form output of digital voltage into, makes it to possess the function of switch.

Conventional Hall switch circuit composition module comprises pressurizer 101 as shown in Figure 1, Hall thin slice 102, Hall voltage amplifier 103, hysteresis comparator 104 and latch output unit 105.The Hall thin slice is made by semi-conducting material (as silicon), its resistance presents bigger increase with the rising of temperature inevitably, and when the voltage on being applied to the Hall thin slice is changeless, the electric current that flows through the Hall thin slice will reduce gradually with the rising of temperature, by formula (1) as can be known, Hall voltage V _HAlso will raise and reduce gradually with temperature, thereby cause the Hall switch output error, this be unacceptable.In order in-40～150 ℃ even wideer temperature range, to use Hall switch (as automotive controls), must find a kind of temperature compensation of Hall switch so that it keeps the relative stability to temperature.

Chinese patent publication number CN101290233A has proposed a kind of Hall switch temperature compensation, and this method needs pressurizer 101 to provide temperature coefficient with hall mobility to be varied to positive temperature coefficient voltage that proportional relation follows the mutually bias voltage as the Hall thin slice.This method not only second-order effects is difficult to control, and does not consider that other parameter (as Hall voltage multiplication factor, hysteresis comparator threshold value) with variation of temperature, simultaneously, has increased the complexity of circuit and technology, is not easy to make under CMOS technology.

The utility model content

Technical problem to be solved in the utility model is to overcome existing defective in the above-mentioned prior art, and a kind of Hall switch circuit temperature-compensation circuit based on the CMOS technology is provided.

The temperature-compensation circuit of the Hall switch circuit that the utility model proposed comprises: the Hall thin slice, and the induced magnetism signal also is translated into the Hall voltage signal; Pressurizer is applied to the voltage after the voltage stabilizing on the described Hall thin slice; Signal processing unit is that single ended voltage and the elimination of carrying out offset voltage are to obtain voltage signal processed with described Hall voltage conversion of signals; Hysteresis comparator carries out sluggishness relatively with voltage signal processed and preset threshold voltage; Clock signal and logic control element are for signal processing unit, hysteresis comparator provide clock signal and logic control signal; The voltage bias unit is for signal processing unit and hysteresis comparator provide bias voltage; Described voltage bias unit produces the bias voltage that equates with the temperature coefficient of the hall mobility of Hall thin slice, and this bias voltage is connected to the input of signal processing unit and hysteresis comparator, is used as the threshold voltage of hysteresis comparator.

The temperature-compensation circuit of Hall switch circuit also comprise receive described Hall voltage signal and amplify after output to the operational amplification circuit of described signal processing unit input.

Described operational amplification circuit comprises first, second operational amplifier of two symmetries, the 7th resistance that connects the inverting input of first, second operational amplifier, connect the inverting input of first operational amplifier and the 8th resistance of output, and connect the inverting input of second operational amplifier and the 9th resistance of output; Described the 7th, the 8th, the 9th resistance adopts identical materials to make, and the normal phase input end of first, second operational amplifier is linked two outputs of Hall thin slice respectively.

Described voltage bias unit comprises the first, the 6th resistance with Hall thin slice same material, opposite second, third of the temperature coefficient of resistance identical with the Hall sheeting, the 4th, the 5th resistance; Described the first, second, third, fourth, the 5th, the 6th resistance is connected successively, and the end that described first resistance is not connected with second resistance connects the output of pressurizer, the end ground connection that described the 6th resistance is not connected with the 5th resistance; The common port of described second, third resistance forms first output, and the common port of described the 3rd, the 4th resistance forms second output, and the common port of described the 4th, the 5th resistance forms the 3rd output.

Described signal processing unit comprises seven switches and two electric capacity, wherein the common port of first switch and the 3rd switch is linked the top crown of first electric capacity, the common port of second switch and the 4th switch is linked the bottom crown of first electric capacity, the other end of first switch connects the output of first operational amplifier, the other end of second switch connects the output of second operational amplifier, the other end of the 3rd switch is linked the top crown of second electric capacity, and link to each other with first output of the end of oppisite phase of hysteresis comparator and voltage bias unit, the 4th, the 5th, the 6th, the common port that minion is closed links to each other with the bottom crown of second electric capacity, the other end of the 5th switch links to each other with the forward end of hysteresis comparator, the other end of the 6th switch links to each other with second output of voltage bias unit, and the other end that minion is closed links to each other with the 3rd output of voltage bias unit.

Compared with prior art, the utility model only need be introduced the resistance with Hall thin slice same material on biasing circuit, suitably choose the resistance ratio, just can obtain hysteresis comparator threshold voltage with Hall electron mobility uniform temp coefficient, avoided the narrower problem of existing Hall switch operating temperature range, the designer can be used in the less components and parts on CMOS technology basis, reach the performance requirement of Hall switch wide temperature range work.

Description of drawings

Fig. 1 is the structural representation of conventional Hall switch circuit in the prior art;

Fig. 2 is the Hall switch circuit block diagram with temperature-compensating shown in the utility model embodiment;

Fig. 3 is the schematic diagram of a preferred embodiment of the utility model Hall switch temperature-compensation circuit;

Fig. 4 is a kind of embodiment schematic diagram of voltage offset electric circuit among Fig. 2 and Fig. 3.

Embodiment

The utility model is described in further detail below in conjunction with accompanying drawing:

Fig. 2 has provided an embodiment of the utility model Hall switch temperature compensation, is made up of pressurizer 201, Hall thin slice 202, voltage bias 207, Hall voltage amplifier 203, signal processing unit 208, hysteresis comparator 204, output latch 205 and clock signal and logic control 206.

Pressurizer 201 provides stable voltage and current biasing for other electric current, voltage bias 207 provides bias voltage for signal processing unit 208 and hysteresis comparator 204, Hall thin slice 202 induced magnetism signals also are translated into voltage signal, the Hall voltage signal that 203 pairs in voltage amplifier collects amplifies, differential voltage signal after the amplification is converted to single ended voltage through signal processing unit 208, and carry out the elimination of offset voltage, voltage signal processed and preset threshold voltage compare in hysteresis comparator 204, output correspondent voltage signal is to output latch 205, and clock signal and logic control 206 are signal processing unit 208, hysteresis comparator 204 and output latch 205 provide clock signal and logic control signal.

In formula (1), the electric current I that flows through Hall thin slice 202 can be expressed as:

$I=\frac{V_{\mathrm{REF}}}{R_H}=\frac{V_{\mathrm{REF}}}{\frac{\mathrm{\ρ}}{t}\×\frac{L}{W}}---\left(2\right)$

In the formula,

V _REFExpression is added in the voltage on the Hall thin slice, is produced by pressurizer 201, and is relatively stable to supply voltage and temperature;

R _HThe resistance of expression Hall thin slice;

ρ represents the Hall sheet resistivity;

T represents the thickness of Hall thin slice;

L and W represent the length of Hall thin slice and wide respectively.

Bring formula (2) into formula (1), can get:

$V_H=B{\mathrm{\μ}}_H{V}_{\mathrm{REF}}\frac{W}{L}\mathrm{\δ}\left(\frac{L}{W}\right)---\left(3\right)$

If the gain of voltage amplifier is A _V, the high threshold voltage of hysteresis comparator is V _{TH_H}, then work as magnetic field intensity and increase to B _OPThe time, output switching activity is a low level, by A _V* V _H1=V _{TH_H}Obtain:

$B_{\mathrm{OP}}=\frac{V_{\mathrm{TH}\_H}}{A_V{\mathrm{\μ}}_H{V}_{\mathrm{REF}}\frac{W}{L}\mathrm{\δ}\left(\frac{L}{W}\right)}---\left(4\right)$

If the low threshold voltage of hysteresis comparator is V _{TH_L}, then ought then work as magnetic field intensity and be reduced to B _RPThe time, output switching activity is a high level, by A _V* V _H2=V _{TH_L}Obtain:

$B_{\mathrm{RP}}=\frac{V_{\mathrm{TH}\_L}}{A_V{\mathrm{\μ}}_H{V}_{\mathrm{REF}}\frac{W}{L}\mathrm{\δ}\left(\frac{L}{W}\right)}---\left(5\right)$

From formula (4)～formula (5) as can be seen, if A _VAnd V _REFDo not vary with temperature, ignore the temperature effect of σ (L/W), can draw B _OPAnd B _RPTemperature coefficient be:

$\frac{1}{B_{\mathrm{OP}}}\frac{{\∂B}_{\mathrm{OP}}}{\∂T}=\frac{1}{V_{\mathrm{TH}\_H}}\frac{{\∂V}_{\mathrm{TH}\_H}}{\∂T}-\frac{1}{{\mathrm{\μ}}_H}\frac{{\∂\mathrm{\μ}}_H}{\∂T}---\left(6\right)$

$\frac{1}{B_{\mathrm{RP}}}\frac{{\∂B}_{\mathrm{RP}}}{\∂T}=\frac{1}{V_{\mathrm{TH}\_L}}\frac{{\∂V}_{\mathrm{TH}\_L}}{\∂T}-\frac{1}{{\mathrm{\μ}}_H}\frac{{\∂\mathrm{\μ}}_H}{\∂T}---\left(7\right)$

Therefore, only V need be set _{TH_H}And V _{TH_L}Temperature coefficient and μ _HTemperature coefficient equate, can obtain not temperature variant B _OPAnd B _RP, magnetic hysteresis width (B _OP-B _RP) also no longer vary with temperature.

More one go on foot ground, Fig. 3 has provided the preferred embodiment of Hall switch temperature compensation of the present utility model, and voltage amplifier 303 adopts the fully differential structures, and R7, R8, R9 adopt the resistance of same kind, and R8 equates with the R9 impedance.The multiplication factor A of voltage amplifier 303 _V:

$A_V=\frac{V_O}{V_I}=1+\frac{2R8}{R7}---\left(8\right)$

A _VOnly depend on the ratio of R8 and R7, temperature independent.

Signal processing unit adopts capacitor C 1, C2 and switch k1～k7 to form, and the control signal clk0 of switch k1～k7～clk2 is the clock signal of three-phase non-overlapping copies, and voltage bias V is provided by clock signal and logic control 306 _HALF, V _H, V _LProvide by voltage bias 307.

If magnetic field intensity is B, direction is that straight vertical is towards the lining.At clk0 is between high period, if magnetic field intensity B is less, then exporting out is high level, switch k7 conducting, voltage V _HALF-V ₁To capacitor C 2 charging, on negative just down; Clk1 is between high period, voltage A _V* V _HTo capacitor C 1 charging, just going up negative down; Clk2 is between high period, and the electric charge on capacitor C 1 and the C2 neutralizes, and final electric charge is (V _HALF-V ₁) * C2-A _V* V _HThe current potential of * C1, so capacitor C 2 bottom crowns equals V _HALF-((V _HALF-V ₁) * C2-A _V* V _H* C1)/(C1+C2), this voltage is linked the normal phase input end of hysteresis comparator 304 by k5, with the negative-phase input V of hysteresis comparator 304 _HALFCompare,, make V if magnetic field intensity B increases _HALF-((V _HALF-V ₁) * C2-A _V* V _H1* C1)/(C1+C2)＞V _HALF, i.e. A _V* V _H1* C1/C2＞V _HALF-V ₁, the output switching activity of hysteresis comparator 304 is a high level, makes the output of Hall switch be locked as low level, the magnetic field intensity of this moment is B _OPIf C1=C2, then following formula can be written as:

A _V×V _H1＝V _HALF-V ₁ (9)

With A _V* V _H=V _{TH_H}Compare as can be known V _HALF-V ₁Be V _{TH_H}

After the output of Hall switch became low level, clk0 was between high period, switch k7 conducting, voltage V _HALF-V ₂To capacitor C 2 charging, on negative just down; Clk1 is between high period, voltage A _V* V _HTo capacitor C 1 charging, just going up negative down; Clk2 is between high period, and the electric charge on capacitor C 1 and the C2 neutralizes, and final electric charge is (V _HALF-V ₂) * C2-A _V* V _HThe current potential of * C1, so capacitor C 2 bottom crowns equals V _HALF-((V _HALF-V ₂) * C2-A _V* V _H* C1)/(C1+C2), this voltage is linked the normal phase input end of hysteresis comparator 304 by k5, with the negative-phase input V of hysteresis comparator 304 _HALFCompare,, make V if magnetic field intensity weakens _HALF-((V _HALF-V ₂) * C2-A _V* V _H2* C1)/(C1+C2)＜V _HALF, i.e. A _V* V _H2* C1/C2＜V _HALF-V ₂, the output switching activity of hysteresis comparator 304 is a low level, makes the output of Hall switch be locked as high level, the magnetic field intensity of this moment is B _RPIf C1=C2, then following formula can be written as:

A _V×V _H2＝V _HALF-V ₂ (10)

With A _V* V _H2=V _{TH_L}Compare as can be known V _HALF-V ₂Be V _{TH_L}

Fig. 4 has provided a kind of voltage bias schematic diagram, V _REFFrom pressurizer 301, its size is not with supply voltage and variations in temperature.Resistance R 1 and R6 adopt and equate with the resistance and the impedance of Hall thin slice same kind, the resistance of R2～R5 employing and Hall thin slice opposite temperature coefficients (being negative temperature coefficient here), and the impedance of R2 equals the impedance sum of R3～R5, so V _HALF=V _REF/ 2, not with supply voltage and variations in temperature.Can get thus:

$V_{\mathrm{TH}\_H}=\frac{R3+R4}{2(R1+R2)}\×V_{\mathrm{REF}}---\left(11\right)$

$V_{\mathrm{TH}\_L}=\frac{\mathrm{<figure-callout\; id="3"\; label="R"\; filenames="HDA0000056966330000021.png"\; state="\{\{state\}\}">R</figure-callout>}3}{2(R1+R2)}{V}_{\mathrm{REF}}---\left(12\right)$

Temperature coefficient is asked in formula (11)～(12):

$\frac{1}{V_{\mathrm{TH}\_H}}\frac{{\&PartialD;V}_{\mathrm{TH}\_H}}{\&PartialD;T}=\frac{R1}{R1+\mathrm{<figure-callout\; id="2"\; label="R"\; filenames="HDA0000056966330000021.png"\; state="\{\{state\}\}">R</figure-callout>}2}\&times;(\frac{1}{{\mathrm{\&mu;}}_N}\frac{{\&PartialD;\mathrm{\&mu;}}_N}{\&PartialD;T}-\frac{1}{{\mathrm{\&mu;}}_{\mathrm{<figure-callout\; id="2"\; label="N"\; filenames="HDA0000056966330000021.png"\; state="\{\{state\}\}">N</figure-callout>}2}}\frac{{\&PartialD;\mathrm{\&mu;}}_{\mathrm{<figure-callout\; id="2"\; label="N"\; filenames="HDA0000056966330000021.png"\; state="\{\{state\}\}">N</figure-callout>}2}}{\&PartialD;T})---\left(13\right)$

$\frac{1}{V_{\mathrm{TH}\_L}}\frac{{\&PartialD;V}_{\mathrm{TH}\_L}}{\&PartialD;T}=\frac{R1}{R1+\mathrm{<figure-callout\; id="2"\; label="R"\; filenames="HDA0000056966330000021.png"\; state="\{\{state\}\}">R</figure-callout>}2}\&times;(\frac{1}{{\mathrm{\&mu;}}_N}\frac{{\&PartialD;\mathrm{\&mu;}}_N}{\&PartialD;T}-\frac{1}{{\mathrm{\&mu;}}_{\mathrm{<figure-callout\; id="2"\; label="N"\; filenames="HDA0000056966330000021.png"\; state="\{\{state\}\}">N</figure-callout>}2}}\frac{{\&PartialD;\mathrm{\&mu;}}_{\mathrm{<figure-callout\; id="2"\; label="N"\; filenames="HDA0000056966330000021.png"\; state="\{\{state\}\}">N</figure-callout>}2}}{\&PartialD;T})---\left(14\right)$

In the formula,

μ _NElectron mobility for positive temperature coefficient resistor R1;

μ _N2Electron mobility for negative temperature coefficient resister R2.

By formula (13)～(14) as can be seen, R1 and R2 are satisfied

$\frac{R2}{R1}=\frac{-\frac{1}{{\mathrm{\&mu;}}_{\mathrm{<figure-callout\; id="2"\; label="N"\; filenames="HDA0000056966330000021.png"\; state="\{\{state\}\}">N</figure-callout>}2}}\frac{{\&PartialD;\mathrm{\&mu;}}_{\mathrm{<figure-callout\; id="2"\; label="N"\; filenames="HDA0000056966330000021.png"\; state="\{\{state\}\}">N</figure-callout>}2}}{\&PartialD;T}}{\frac{1}{{\mathrm{\&mu;}}_N}\frac{{\&PartialD;\mathrm{\&mu;}}_N}{\&PartialD;T}}---\left(15\right)$

Can obtain:

$\frac{1}{V_{\mathrm{TH}\_H}}\frac{{\&PartialD;V}_{\mathrm{TH}\_H}}{\&PartialD;T}=\frac{1}{{\mathrm{\&mu;}}_N}\frac{{\&PartialD;\mathrm{\&mu;}}_N}{\&PartialD;T}---\left(16\right)$

$\frac{1}{V_{\mathrm{TH}\_L}}\frac{{\&PartialD;V}_{\mathrm{TH}\_L}}{\&PartialD;T}=\frac{1}{{\mathrm{\&mu;}}_N}\frac{{\&PartialD;\mathrm{\&mu;}}_N}{\&PartialD;T}---\left(17\right)$

With difference substitution formula (6)～(7), formula (16)～(17), can obtain:

$\frac{1}{B_{\mathrm{OP}}}\frac{{\&PartialD;B}_{\mathrm{OP}}}{\&PartialD;T}=\frac{1}{{\mathrm{\&mu;}}_N}\frac{{\&PartialD;\mathrm{\&mu;}}_N}{\&PartialD;T}-\frac{1}{{\mathrm{\&mu;}}_H}\frac{{\&PartialD;\mathrm{\&mu;}}_H}{\&PartialD;T}---\left(18\right)$

$\frac{1}{B_{\mathrm{RP}}}\frac{{\&PartialD;B}_{\mathrm{RP}}}{\&PartialD;T}=\frac{1}{{\mathrm{\&mu;}}_N}\frac{{\&PartialD;\mathrm{\&mu;}}_N}{\&PartialD;T}-\frac{1}{{\mathrm{\&mu;}}_H}\frac{{\&PartialD;\mathrm{\&mu;}}_H}{\&PartialD;T}---\left(19\right)$

Because R1 is identical with the material of Hall thin slice, so formula (18)～(19) represented B _OPAnd B _RPTemperature coefficient equal temperature coefficient poor of the temperature coefficient of electron mobility of same semiconductor material and hall mobility, and the temperature coefficient of the temperature coefficient of the electron mobility of same material and hall mobility equates, so B _OPAnd B _RPTemperature coefficient be zero.

The core of the utility model design philosophy is the temperature coefficient of design hysteresis comparator threshold voltage, make it to equal the temperature coefficient of the electron mobility of Hall thin slice material therefor, thereby offset with the temperature coefficient of hall mobility, and the temperature coefficient that finally makes BOP and BRP is zero, satisfies the performance requirement that Hall switch is worked in wide temperature range.Among the embodiment shown in Figure 3, obtaining of hysteresis comparator threshold voltage temperature coefficient, be based on resistance identical and the another kind of resistance opposite with this temperature coefficient of resistance with the Hall sheeting, suitably choose the ratio of these two kinds of resistance, make it meet formula (15), the temperature coefficient of hysteresis comparator threshold voltage can be equaled the temperature coefficient of the electron mobility of Hall thin slice material therefor.

Above-described embodiment only is explanation technological thought of the present utility model and characteristics; its purpose is to make those skilled in the art can understand content of the present utility model and implements according to this; can not limit protection range of the present utility model according to this; promptly the equalization of being done with the spirit that the utility model was disclosed changes or derives, and must be encompassed in the protection range of the present utility model.

Claims (5)

1. the Hall switch temperature-compensation circuit based on CMOS technology is characterized in that, comprising:

The Hall thin slice, the induced magnetism signal also is translated into the Hall voltage signal;

Pressurizer is applied to the voltage after the voltage stabilizing on the described Hall thin slice;

Signal processing unit is that single ended voltage and the elimination of carrying out offset voltage are to obtain voltage signal processed with described Hall voltage conversion of signals;

Hysteresis comparator carries out sluggishness relatively with voltage signal processed and preset threshold voltage;

Clock signal and logic control element are for signal processing unit, hysteresis comparator provide clock signal and logic control signal;

The voltage bias unit is for signal processing unit and hysteresis comparator provide bias voltage;

Described voltage bias unit produces the bias voltage that equates with the temperature coefficient of the hall mobility of Hall thin slice, and this bias voltage is connected to the input of signal processing unit and hysteresis comparator, is used as the threshold voltage of hysteresis comparator.

2. the Hall switch temperature-compensation circuit based on CMOS technology as claimed in claim 1 is characterized in that, also comprise receive described Hall voltage signal and amplify after output to the operational amplification circuit of described signal processing unit input.

3. the Hall switch temperature-compensation circuit based on CMOS technology as claimed in claim 2, it is characterized in that, described operational amplification circuit comprises first, second operational amplifier of two symmetries, the 7th resistance that connects the inverting input of first, second operational amplifier, connect the inverting input of first operational amplifier and the 8th resistance of output, and connect the inverting input of second operational amplifier and the 9th resistance of output; Described the 7th, the 8th, the 9th resistance adopts identical materials to make, and the normal phase input end of first, second operational amplifier is linked two outputs of Hall thin slice respectively.

4. as claim 1 or 2 or 3 described Hall switch temperature-compensation circuits based on CMOS technology, it is characterized in that, described voltage bias unit comprises the first, the 6th resistance with Hall thin slice same material, opposite second, third of the temperature coefficient of resistance identical with the Hall sheeting, the 4th, the 5th resistance; Described the first, second, third, fourth, the 5th, the 6th resistance is connected successively, and the end that described first resistance is not connected with second resistance connects the output of pressurizer, the end ground connection that described the 6th resistance is not connected with the 5th resistance; The common port of described second, third resistance forms first output, and the common port of described the 3rd, the 4th resistance forms second output, and the common port of described the 4th, the 5th resistance forms the 3rd output.

5. the Hall switch temperature-compensation circuit based on CMOS technology as claimed in claim 4, it is characterized in that, described signal processing unit comprises seven switches and two electric capacity, wherein the common port of first switch and the 3rd switch is linked the top crown of first electric capacity, the common port of second switch and the 4th switch is linked the bottom crown of first electric capacity, the other end of first switch connects the output of first operational amplifier, the other end of second switch connects the output of second operational amplifier, the other end of the 3rd switch is linked the top crown of second electric capacity, and link to each other with first output of the end of oppisite phase of hysteresis comparator and voltage bias unit, the 4th, the 5th, the 6th, the common port that minion is closed links to each other with the bottom crown of second electric capacity, the other end of the 5th switch links to each other with the forward end of hysteresis comparator, the other end of the 6th switch links to each other with second output of voltage bias unit, and the other end that minion is closed links to each other with the 3rd output of voltage bias unit.

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