CN202035007U - MVB-HDLC gateway based on ARM7 - Google Patents
MVB-HDLC gateway based on ARM7 Download PDFInfo
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- CN202035007U CN202035007U CN2011200926045U CN201120092604U CN202035007U CN 202035007 U CN202035007 U CN 202035007U CN 2011200926045 U CN2011200926045 U CN 2011200926045U CN 201120092604 U CN201120092604 U CN 201120092604U CN 202035007 U CN202035007 U CN 202035007U
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Abstract
The utility model discloses an MVB-HDLC gateway based on an ARM7, which comprises a master control circuit, an MVB (Multifunctional Vehicle Bus) interface circuit and an HDLC (High-level Data Link Control) interface circuit; the master control circuit comprises a CPU (Central Processing Unit) and an RS232 interface circuit connected with the CPU; and the CPU is connected with the MVB interface circuit and the HDLC interface circuit respectively. The MVB and HDLC train buses conforming to the standards of IEC61375-1:2007 and ISO13239-2002 simultaneously have the MVB and HDLC communication functions, the MVB-HDLC gateway based on the ARM7 can realize the conversion of communication protocols of the MVB and HDLC train buses, and is widely applicable to the field of industrial control of inconsistent train buses such as subways, light rails, railroad locomotives, etc.
Description
Technical field
The utility model is specifically related to a kind of data transaction control system of computer network.
Background technology
Along with the high speed development of domestic railway, external a lot of advanced technology pour in the domestic market.The train communication bus of the present usefulness of China mainly contains MVB, HDLC and WORLDFIP etc.On a car, have only a kind of bus form to exist.This just relates to a problem, and the external interface of some product is fixed, thereby occurs interface disunity, the phenomenon that can't use on being applied to other bus trains the time.So the MVB-HDLC gateway just becomes two kinds of key equipments that bus interface is necessary, significance is arranged for the technology versatility of railway locomotive industry.
The MVB bus is a kind of train dedicated bus, follows IEC61375-1:2007 " TCN " (be called for short TCN standard) standard, and it is the communication system of an opening, is used for being connected between railway car and distinct device.The TCN standard comprises two kinds of bus forms: two kinds of wired train bus WTB and multifunction vehicle bus MVB.Former definition WTB is used for connecting between the compartment, and MVB is used in the compartment equipment and connects, but all adopts the MVB bus to be connected in producer compartment and the compartment mostly now, has simplified design process.The MVB bus communication speed is 1.5Mbit/s, and physical layer is divided into three kinds: (1) be used for short-distance transmission dielectric ESD (RS485,20.0m); (2) be used for middle distance transmission dielectric EMD (transformer coupled, 200.0m); (3) be used for long Distance Transmission the light medium (optical fiber, 2.0km).
Early seventies, IBM Corporation takes the lead in having proposed bit-oriented synchronous data link control SDLC (Synchronous Data Link Control).Subsequently, ANSI and ISO all adopt and have developed SDLC, have proposed the high-level data link control procedure HDLC (High-level Data Link Control) of high level communication control procedure ADCCP (Advanced Data Control Procedure), the ISO of the standard of oneself: ANSI respectively.HDLC is typical case's representative of bit-oriented data link control protocol, and this agreement does not rely on any character set; But the data message transparent transmission is used to realize that " the 0 bit insertion " of transparent transmission is easy to the hardware realization; Full-duplex communication has higher data link transmission efficient; All information frames adopt CRC check, information frame are carried out serial number, the transmission reliability height; The transmission controlled function is separated with processing capacity.
At present temporary transient this series products not also of China railways industry brings inconvenience for sub-supplier.When the interface of this product and train bus-line are not inconsistent, can only select to abandon.
The utility model content
The utility model provides a kind of MVB-HDLC gateway based on ARM7 for solving the problems of the technologies described above, it can realize the conversion of MVB and two kinds of train bus-line communication protocols of HDLC, be mainly used in subway, light rail train and City Rail Transit System, realize the interconnected of MVB network control system and HDLC network control system, have the MVB bus function of HDLC network of advocating peace from node.
For solving the problems of the technologies described above, the technical solution adopted in the utility model is as follows:
A kind of MVB-HDLC gateway based on ARM7, the MVB interface circuit and the HDLC interface circuit that comprise governor circuit, be connected respectively with described governor circuit; Described governor circuit comprises CPU and the RS232 interface circuit that is connected with described CPU; Described governor circuit is connected respectively with the HDLC interface circuit with described MVB interface circuit by described CPU.
Described MVB interface circuit comprises MVB codec, MVB bus driver and the isolating transformer that connects successively; Described MVB interface circuit is connected with described CPU by described MVB codec; Device data sends on the MVB bus by described MVB bus driver and isolating transformer after governor circuit CPU is sent to described MVB codec encodes; Described MVB interface circuit receives the data on the MVB bus equally, is sent to described governor circuit CPU after being sent to described MVB codec decoding behind described isolating transformer and the MVB bus driver.
Described HDLC interface circuit comprises HDLC protocol conversion chip, the RS485 isolating interface circuit that connects successively and is used for the disturbed generation of HDLC bus when fluctuating, absorbs the protection device of voltage than high impulse; Described HDLC interface circuit is connected with described CPU by described HDLC protocol conversion chip; Device data is sent on the HDLC bus by RS485 isolating interface circuit after governor circuit CPU is sent to HDLC protocol conversion chip; Described HDLC interface circuit receives the data on the HDLC bus equally, behind RS485 isolating interface circuit, delivers to the CPU of governor circuit through HDLC protocol conversion chip.
Carry out exchanges data by dual port RAM between described MVB codec and the CPU; Described MVB codec will be stored in after the data decode that described MVB interface circuit transmits in the dual port RAM and read for CPU; The storage that CPU will be sent to described MVB interface circuit reads for described MVB codec in dual port RAM.
The data conversion that described MVB codec will transmit from CPU is Manchester signal, is converted to differential signal after isolating transformer sends on the MVB bus by the MVB bus driver; After will being converted into the UART signal through the differential signal on the MVB bus that described isolating transformer transmits, described MVB bus driver is sent to the CPU that delivers to described governor circuit after described MVB codec carries out encoding and decoding.
The utility model adopts the plate card type design, can be used as stand-alone product and uses, and also can be used as parts and places other series products.Its interface meets MVB and two kinds of train bus-line interface standards of HDLC of IEC61375-1:2007, ISO13239-2002 standard, have MVB and HDLC communication function and the bus function of tonic chord simultaneously, novel in design, be convenient to install, have very high promotional value in railway, subway and light rail field.Its beneficial effect is as follows:
(1) meets IEC61375-1:2007 and ISO13239-2002 standard, filled up the blank of this technical field;
(2) adopted the plate card type design, minimizing takes up room, and can be used as accessory and is placed in other equipment and uses, and has increased the versatility of product;
(3) passed through the routine test of MVB and HDLC, and passed through the interface uniformity test with external like product;
(4) expanded the compatibility issue of network control system,, strengthened the compatibility of product for different manufacturers, distinct interface provide a solution easily.
MVB-HDLC gateway based on ARM7, it meets MVB and two kinds of train bus-lines of HDLC of IEC61375-1:2007, ISO13239-2002 standard, have MVB and HDLC communication function simultaneously, can realize the conversion of MVB and two kinds of train bus-line communication protocols of HDLC, the MVB-HDLC gateway can make the fusion of multiple train bus-line more go a step further, and a solution is provided for the Train Control of mixed type.Can be widely used in the skimble-scamble industrial control fields of train bus-line such as subway, light rail and railway locomotive.
Description of drawings
The structural representation of the MVB-HDLC gateway that Fig. 1 provides for the utility model embodiment;
The structural representation of the governor circuit that Fig. 2 provides for the utility model embodiment;
The structural representation of the MVB interface circuit that Fig. 3 provides for the utility model embodiment;
The structural representation of the HDLC interface circuit that Fig. 4 provides for the utility model embodiment;
The network topological diagram that Fig. 5 provides for the utility model embodiment.
Embodiment
In order to make the purpose of this utility model, technical scheme and advantage clearer,, the utility model is further elaborated below in conjunction with accompanying drawing.Should be appreciated that specific embodiment described herein only in order to explanation the utility model, and be not used in qualification the utility model.
Shown in Fig. 1,2, a kind of MVB-HDLC gateway based on ARM7 comprises governor circuit, MVB interface circuit and HDLC interface circuit; Described governor circuit comprises CPU and the RS232 interface circuit that is connected with described CPU; Described CPU is connected with the HDLC interface circuit with described MVB interface circuit respectively.Described CPU is the microprocessor of an ARM7 nuclear, and described RS232 interface circuit comprises RS232 protocol controller and the RS232 bus driver that is connected with described RS232 protocol controller.
Described MVB interface circuit is responsible for the encoding and decoding of MVB bus data and the input and output of data; Described HDLC interface circuit is responsible for the encoding and decoding of HDLC bus data and the input and output of data; Described governor circuit is the core of MVB-HDLC gateway, be responsible for the parsing and the processing of all upper layer communication agreements, comprise MVB data processing, HDLC data processing, protocol function conversion, realize that advocate peace HDLC bus master's function and central authorities of data of MVB bus handle.
The CPU of governor circuit is connected with the MVB interface circuit, realizes the transmitting-receiving of the data on the MVB bus and the work of encoding and decoding; Be connected with the HDLC interface circuit, realize that the application layer of HDLC data is resolved, resolve and receive and dispatch for data on the HDLC bus and message.The CPU of described governor circuit receives the data from HDLC interface circuit and MVB interface circuit, and data are handled, and also will resolve and handle the sync message of MVB bus and HDLC bus simultaneously.
Described governor circuit also includes power interface circuit, electric source monitoring circuit, clock circuit, reset circuit and the USB interface that is connected with described CPU respectively.
Data on the MVB bus that governor circuit CPU collects and the data on the HDLC bus all can be by RS232 interface and USB interface outputs, and application program also can be downloaded by the RS232 interface.
Referring to Fig. 3, described MVB interface circuit comprises MVB codec, MVB bus driver, isolating transformer and the MVB interface that connects successively; Described MVB interface circuit is connected with the CPU of described governor circuit by described MVB codec.
Described device data sends on the MVB bus through described MVB interface by MVB bus driver and isolating transformer after the CPU of governor circuit is sent to the MVB codec encodes; Described MVB interface circuit can receive the data on the MVB bus equally, is sent among the CPU of governor circuit by described MVB interface, isolating transformer, MVB bus driver, the decoding of MVB codec; Can send the MVB prime frame by the MVB interface circuit equally by governor circuit.
Carry out exchanges data by dual port RAM between MVB codec and the CPU, prevent loss of data.The MVB codec is Manchester signal with the data conversion that reads, and sends on the MVB bus by MVB bus driver and isolating transformer; The MVB codec also can read for CPU being stored in after the data decode in the dual port RAM simultaneously; The storage that CPU also can send reads for the MVB codec in dual port RAM, and the transmission of prime frame is independently finished by the MVB codec.
Referring to Fig. 4, described HDLC interface circuit comprises HDLC protocol conversion chip, the RS485 isolating interface circuit that connects successively and is used for the disturbed generation of HDLC bus when fluctuating, absorbs the protection device of voltage than high impulse; Described HDLC interface circuit is connected with the CPU of described governor circuit by described HDLC protocol conversion chip.
Wherein, be connected with address bus by data/address bus between described HDLC protocol conversion chip and the CPU.HDLC protocol conversion chip is resolved the HDLC data of receiving, the CPU of governor circuit is considered as a plug-in RAM with HDLC protocol conversion chip and reads and writes, thereby realizes the conversion of HDLC protocol data.
Described device data is sent to HDLC protocol conversion chip from governor circuit CPU, is sent on the HDLC bus by the RS485 interface circuit.Described HDLC interface circuit can receive the data on the HDLC bus equally, behind the RS485 interface circuit, delivers to governor circuit CPU through HDLC protocol conversion chip data are handled.All HDLC application layer protocols are all resolved in the HDLC of HDLC interface circuit protocol conversion chip.
Among the utility model embodiment; the CPU of governor circuit adopts the LPC2378 of NXP; the RS232 protocol controller adopts the SP202EEN of SIPEX; the MVB codec adopts the EP1K50TC144-3N of ALTERA; the MVB bus driver adopts the MA3292ESD of MAXIM; isolating transformer adopts the T60403-Y4021-X123 of VAC; HDLC protocol conversion chip adopts the PT7A6525 of PERICOM; the interface chip of RS485 isolating interface circuit adopts the MAX1480BEPI of MAXIM, and protection device adopts P6KE15CA.
The utility model MVB-HDLC gateway is furnished with the 5V power interface, is the corollary equipment of Related product, and general and miscellaneous equipment is used.Power input adopts the SUCS-1R50505C of Japanese COSEL to isolate, external power source and internal electric source are isolated, transfer 5V voltage to 3.3V, 2.5V and 1.8V voltage uses for governor circuit, MVB interface circuit and HDLC interface circuit by AMS1117-3.3, AMS1117-2.5 and AMS1117-1.8.
The gateway hardware that the utility model embodiment provides is responsible for the parsing of MVB, HDLC, RS232 and USB physical layer and link layer data, the data after resolving is sent to the CPU or the MVB codec of governor circuit; All software functions all are to resolve in governor circuit CPU and MVB codec, and the message after resolving is sent to interface circuit; HDLC protocol conversion chip is the core of HDLC interface circuit, is used to realize the parsing of HDLC agreement, finishes data transaction; RS485 isolating interface circuit is used to realize HDLC physical layer interface and electrical isolation, is sent to CPU and causes interruption when receiving new data; The MVB bus driver is the core of MVB interface circuit, the differential signal on the MVB bus is converted into the UART signal is sent to the MVB codec and carries out encoding and decoding.
The described MVB-HDLC gateway of the utility model embodiment can be connected with the HDLC network with the MVB on the train, realizes the conversion of two kinds of heterogeneous networks communication protocols.The equipment of every kind of different agreement interface all needs a this gateway.Be sent to governor circuit by the MVB interface circuit after with the packet parsing on the MVB bus, governor circuit is handled at this message, and the message that the HDLC circuit is needed is sent on the HDLC bus by the HDLC interface circuit.Equally, also handle in governor circuit at the message on the HDLC bus, the effective message after the processing is sent on the MVB bus.
If train bus-line is the HDLC network, the MVB-HDLC gateway can also carry out MVB with the equipment of needs conversion and communicate by letter as MVB bus master.If train bus-line is the MVB network, the MVB-HDLC gateway can also be as HDLC bus master, carries out HDLC with the equipment of needs conversion such as braking system, air-conditioning system etc. and communicates by letter, thereby realize the compatibility of these two kinds of buses.
The utility model meets MVB and two kinds of train bus-lines of HDLC of IEC61375-1:2007, ISO13239-2002 standard, have MVB and HDLC communication function simultaneously, can realize the conversion of MVB and two kinds of train bus-line communication protocols of HDLC, be widely used in the skimble-scamble industrial control fields of train bus-line such as subway, light rail and railway locomotive.
More than disclosed be specific embodiment of the utility model only, but this patent is not limited thereto, for the person of ordinary skill of the art, under the prerequisite that does not break away from the utility model principle, the distortion of making should be considered as belonging to the utility model protection range.
Claims (5)
1. the MVB-HDLC gateway based on ARM7 is characterized in that, the MVB interface circuit and the HDLC interface circuit that comprise governor circuit, be connected respectively with described governor circuit; Described governor circuit comprises CPU and the RS232 interface circuit that is connected with described CPU; Described governor circuit is connected respectively with the HDLC interface circuit with described MVB interface circuit by described CPU.
2. a kind of MVB-HDLC gateway based on ARM7 according to claim 1 is characterized in that, described MVB interface circuit comprises MVB codec, MVB bus driver and the isolating transformer that connects successively; Described MVB interface circuit is connected with described CPU by described MVB codec; Device data sends on the MVB bus by described MVB bus driver and isolating transformer after governor circuit CPU is sent to described MVB codec encodes; Described MVB interface circuit receives the data on the MVB bus equally, is sent to described governor circuit CPU after being sent to described MVB codec decoding behind described isolating transformer and the MVB bus driver.
3. a kind of MVB-HDLC gateway according to claim 1 based on ARM7, it is characterized in that, described HDLC interface circuit comprises HDLC protocol conversion chip, the RS485 isolating interface circuit that connects successively and is used for the disturbed generation of HDLC bus when fluctuating, absorbs the protection device of voltage than high impulse; Described HDLC interface circuit is connected with described CPU by described HDLC protocol conversion chip; Device data is sent on the HDLC bus by RS485 isolating interface circuit after governor circuit CPU is sent to HDLC protocol conversion chip; Described HDLC interface circuit receives the data on the HDLC bus equally, behind RS485 isolating interface circuit, delivers to the CPU of described governor circuit through HDLC protocol conversion chip.
4. a kind of MVB-HDLC gateway based on ARM7 according to claim 2 is characterized in that, carries out exchanges data by dual port RAM between described MVB codec and the CPU; Described MVB codec will be stored in after the data decode that described MVB interface circuit transmits in the dual port RAM and read for CPU; The storage that CPU will be sent to described MVB interface circuit reads for described MVB codec in dual port RAM.
5. a kind of MVB-HDLC gateway according to claim 2 based on ARM7, it is characterized in that, the data conversion that described MVB codec will transmit from CPU is Manchester signal, is converted to differential signal after isolating transformer sends on the MVB bus by the MVB bus driver; After will being converted into the UART signal through the differential signal on the MVB bus that described isolating transformer transmits, described MVB bus driver is sent to the CPU that delivers to described governor circuit after described MVB codec carries out encoding and decoding.
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| Application Number | Priority Date | Filing Date | Title |
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| CN2011200926045U CN202035007U (en) | 2011-03-31 | 2011-03-31 | MVB-HDLC gateway based on ARM7 |
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| Application Number | Priority Date | Filing Date | Title |
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| CN2011200926045U CN202035007U (en) | 2011-03-31 | 2011-03-31 | MVB-HDLC gateway based on ARM7 |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102546480A (en) * | 2012-02-24 | 2012-07-04 | 武汉正远铁路电气有限公司 | MVB (Multifunction Vehicle Bus)/HDLC (High-level Data Link Control) gateway device |
| CN103810769A (en) * | 2012-11-09 | 2014-05-21 | 中国北车股份有限公司 | Data recorder based on HDLC (high-level data link control) and recording method |
| CN109040021A (en) * | 2018-06-29 | 2018-12-18 | 中车大连电力牵引研发中心有限公司 | Gateway and light rail information monitoring device |
| CN113992456A (en) * | 2021-10-14 | 2022-01-28 | 西安铁路信号有限责任公司 | Railway real-time HDLC network card based on double-port RAM |
-
2011
- 2011-03-31 CN CN2011200926045U patent/CN202035007U/en not_active Expired - Fee Related
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102546480A (en) * | 2012-02-24 | 2012-07-04 | 武汉正远铁路电气有限公司 | MVB (Multifunction Vehicle Bus)/HDLC (High-level Data Link Control) gateway device |
| CN103810769A (en) * | 2012-11-09 | 2014-05-21 | 中国北车股份有限公司 | Data recorder based on HDLC (high-level data link control) and recording method |
| CN109040021A (en) * | 2018-06-29 | 2018-12-18 | 中车大连电力牵引研发中心有限公司 | Gateway and light rail information monitoring device |
| CN113992456A (en) * | 2021-10-14 | 2022-01-28 | 西安铁路信号有限责任公司 | Railway real-time HDLC network card based on double-port RAM |
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Granted publication date: 20111109 Termination date: 20180331 |
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| CF01 | Termination of patent right due to non-payment of annual fee |