CN202008528U - Online amplitude-phase detector - Google Patents
Online amplitude-phase detector Download PDFInfo
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- CN202008528U CN202008528U CN2011200483390U CN201120048339U CN202008528U CN 202008528 U CN202008528 U CN 202008528U CN 2011200483390 U CN2011200483390 U CN 2011200483390U CN 201120048339 U CN201120048339 U CN 201120048339U CN 202008528 U CN202008528 U CN 202008528U
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Abstract
The utility model relates to an online amplitude-phase detector belonging to the technical field of amplitude-phase detectors of phased array radar T/R (transmitting/receiving) assemblies. The amplitude-phase detector is composed of a T/R assembly control panel, a router, a computer, a vector network analyzer and a signal source to form a local area network. The router is connected with the vector network analyzer, the signal source and the computer by network cables, the computer is connected with the T/R assembly control panel consisting of an FPGA (field programmable gate array) programmable logic device, an RS232 serial port communication integrated package and a storage integrated package by serial port wires. The online amplitude-phase detector is not limited by the storage location of the T/R assemblies in the debugging process, can realize remote detection and automatically finishes multi-frequency detection, therefore, the debugging workload of the radar can be reduced. The T/R assembly control panel is provided with the storage integrated package, so that an error correction value can be directly stored inside the T/R assemblies, and the control of a radar wave control system is simplified, and the debugging workload of the radar is reduced, therefore, a system database is more convenient to maintain.
Description
Technical field
The utility model relates to a kind of at wire spoke phase pick-up unit, belongs to phased-array radar T/R assembly width of cloth phase pick-up unit technical field.
Background technology
The T/R assembly is the critical component of Multi-mode Solid-state Phased Array Radar radar, and a radar constitutes a complete active phased array by hundreds of or thousands of T/R assemblies usually.In numerous T/R assemblies, as long as one or several T/R component failures is arranged, perhaps its magnitude-phase characteristics distorts, and will influence the serviceability of entire antenna battle array, therefore high to the stability requirement of the reliability of T/R assembly and magnitude-phase characteristics thereof, detect most important in real time to the T/R assembly.There are some disadvantages in traditional width of cloth phase detection system, and the most of need of work manual control of first computing machine is finished, and the switching of a plurality of phase shifter multifrequency point will consume a large amount of running times; It two is that the width of cloth phase frequency characteristic data in enormous quantities that produces in testing process need deposit system database in, the lowest capacity of system database is determined by the T/R component count, when certain T/R assembly damages, behind the T/R assembly that more renews, also must detect its width of cloth phase frequency characteristic simultaneously, and the data of the T/R assembly that the new width of cloth phase frequency characteristic data that detects of usefulness has damaged before replacing in system database, operation repeats loaded down with trivial details, and very easily make mistakes, increased the workload of maintenance system database greatly.
Summary of the invention
The purpose of this utility model is, provides that a kind of to detect LAN (Local Area Network) mutually with the width of cloth be support, is unit with the phase shifter, detects the multifrequency point width of cloth phase data of a certain phase shifter of single T/R assembly automatically and calculates error correction values, and is easy to use, simple to operate; Testing result and error correction values can be stored in the T/R component internal, need not use the excessive data storehouse; Having overcome prior art, to take database volume big, substitutes loaded down with trivial details disadvantage, realizes detecting at a distance, uses manpower and material resources sparingly, and system database is safeguarded simply at wire spoke phase pick-up unit.
The utility model is to realize above-mentioned purpose by following technical solution:
A kind of at wire spoke phase pick-up unit, it is made up of T/R assembly control panel, router, computing machine, vector network analyzer and signal source, it is characterized in that: router is connected with vector network analyzer, signal source, computing machine respectively by netting twine, and computing machine connects T/R assembly control panel by Serial Port Line; Described T/R assembly control panel is made up of FPGA programmable logic device, RS232 serial communication integrated package, storage integrated package; The input end of FPGA programmable logic device connects 50M crystal oscillator and jtag interface respectively, and jtag interface is connected with USB and downloads line, and downloads line connection storage integrated package by USB; The FPGA programmable logic device connects RS232 serial communication integrated package by Serial Port Line.
The utility model beneficial effect compared with prior art is:
Should adopt T/R assembly control panel, computing machine, vector network analyzer, signal source, router to form LAN (Local Area Network) at wire spoke phase pick-up unit, debug process is not subjected to the restriction of T/R assembly deposit position, can realize remote detection, save the manpower and materials of radar debugging work; Automatically finish the detection of multifrequency point, reduced the debugging work load of radar; Install the storage integrated package additional on T/R assembly control panel, error correction values can directly leave the T/R component internal in, has simplified the control of radar beam controlling system, has reduced the debugging work load of radar, makes the maintenance of system database convenient.
Description of drawings:
Fig. 1 is a kind of structured flowchart at wire spoke phase pick-up unit;
Fig. 2 is the structured flowchart of T/R assembly control panel;
Fig. 3 is a T/R assembly control panel main program flow block diagram;
Fig. 4 is a kind of at wire spoke phase pick-up unit main program flow block diagram;
Fig. 5 is the serial ports interrupt function FB(flow block) in the T/R assembly control panel master routine.
Among the figure: 1, T/R assembly control panel, 2, router, 3, computing machine, 4, vector network analyzer, 5, signal source, 6, storage integrated package, 7, the FPGA programmable logic device, 8, RS232 serial communication integrated package, 9, Serial Port Line, 10,50M crystal oscillator, 11, jtag interface, 12, USB downloads line.
Embodiment:
Should constitute by T/R assembly control panel 1, router two, computing machine 3, vector network analyzer 4 and signal source 5 at wire spoke phase pick-up unit.Router two is connected with vector network analyzer 4, signal source 5, computing machine 3 respectively by common netting twine, and computing machine 3 connects T/R assembly control panel 1 by Serial Port Line 9.Described T/R assembly control panel 1 is made up of FPGA programmable logic device 7, RS232 serial communication integrated package 8, integrated 6 of storage; The input end of FPGA programmable logic device 7 connects 50M crystal oscillator 10 and jtag interface 11 respectively, and jtag interface 11 is connected with USB and downloads line 12, and downloads line 12 connection storage integrated packages 6 by USB; FPGA programmable logic device 7 connects RS232 serial communication integrated package 8(referring to accompanying drawing 1~2 by Serial Port Line 9).
The FPGA programmable logic device 7 of T/R assembly control panel 1 is used to handle the serial port command that receives, memory error modified value, power-up initializing T/R component states, the phase place of control phase shifter; The RS232 serial communication is responsible for conversion serial ports command signal with integrated package 8; The model of storage integrated package 6 is M25P64VMF6, is used to store the program and the error correction values of FPGA programmable logic device 7.50M crystal oscillator 10 is external clock input sources of FPGA programmable logic device 8.
The serial ports command information of " sending the instruction of control serial ports " in wire spoke phase pick-up unit master routine (referring to accompanying drawing 4) comprising: this T/R assembly is residing position in antenna, identifies the position of T/R assembly in this programme with the row, column address; The phase shifter sequence number of current detection, the just position number of this phase shifter in affiliated T/R assembly; Current frequency, phase shifter phase control code, promptly phase control code is 0, just phase shifter is put 0 degree position.
The serial ports command information of " the serial ports instruction is write in transmission " in wire spoke phase pick-up unit master routine comprising: the error correction values of this T/R assembly, this T/R assembly is residing position (at once, column address) in antenna, the sequence number of the phase shifter of current detection and frequency.
The serial port command of T/R assembly control panel 1 master routine (referring to accompanying drawing 3, accompanying drawing 5), adopt verification and method checking command data, distinguish different classes of instruction with the data head sign.After T/R assembly control panel 1 is received ripple control instruction (being the phase shift instruction of radar beam controlling system), the value of writing the phase shifter control port be beam controlling system phase control code and error correction values with, to reach the purpose of automatic correction magnitude-phase characteristics error.After T/R assembly control panel 1 is received write command (promptly receiving " the serial ports instruction is write in transmission " in wire spoke phase pick-up unit master routine), determine the memory location of error correction values according to T/R component rows column information, phase shifter sequence number, frequency that instruction provides, and error correction values is stored into the appointed area of storage integrated package 6EPCS; Behind the radar normal boot-strap, T/R assembly control panel 1 will read the error correction values of appointed area in the storage integrated package 6 immediately, according to the current working frequency that the radar beam controlling system provides phase shifter be carried out error correction.
Error correction values is write the T/R component internal deposit, simplified the control of radar beam controlling system, make the easier maintenance of system database; Width of cloth phase test section is built into small-sized LAN (Local Area Network), make debug process not be subjected to the restriction of T/R assembly deposit position, can finish the detection of multifrequency point at a distance, automatically, save the manpower and materials of radar debugging work greatly, effectively improve the efficient of radar debugging work.
Claims (1)
1. one kind at wire spoke phase pick-up unit, it is made up of T/R assembly control panel (1), router (2), computing machine (3), vector network analyzer (4) and signal source (5), it is characterized in that: router (2) is connected with vector network analyzer (4), signal source (5), computing machine (3) respectively by netting twine, and computing machine (3) connects T/R assembly control panel (1) by Serial Port Line (9); Described T/R assembly control panel (1) is made up of FPGA programmable logic device (7), RS232 serial communication integrated package (8), storage integrated package (6); The input end of FPGA programmable logic device (7) connects 50M crystal oscillator (10) and jtag interface (11) respectively, and jtag interface (11) is connected with USB and downloads line (12), and downloads line (12) connection storage integrated package (6) by USB; FPGA programmable logic device (7) connects RS232 serial communication integrated package (8) by Serial Port Line (9).
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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CN2011200483390U CN202008528U (en) | 2011-02-26 | 2011-02-26 | Online amplitude-phase detector |
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CN2011200483390U CN202008528U (en) | 2011-02-26 | 2011-02-26 | Online amplitude-phase detector |
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CN2011200483390U Expired - Fee Related CN202008528U (en) | 2011-02-26 | 2011-02-26 | Online amplitude-phase detector |
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104020457A (en) * | 2014-06-23 | 2014-09-03 | 哈尔滨工业大学 | Device for recording multipath data in radar test in real time and method for realizing real-time recording of data |
CN106020018A (en) * | 2016-05-17 | 2016-10-12 | 中国电子科技集团公司第四十研究所 | USB-based TR assembly programmable state controller and working method thereof |
CN106707863A (en) * | 2016-12-23 | 2017-05-24 | 安徽华东光电技术研究所 | Detection control system and method of TR module based on AVR single chip microcomputer |
-
2011
- 2011-02-26 CN CN2011200483390U patent/CN202008528U/en not_active Expired - Fee Related
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104020457A (en) * | 2014-06-23 | 2014-09-03 | 哈尔滨工业大学 | Device for recording multipath data in radar test in real time and method for realizing real-time recording of data |
CN106020018A (en) * | 2016-05-17 | 2016-10-12 | 中国电子科技集团公司第四十研究所 | USB-based TR assembly programmable state controller and working method thereof |
CN106020018B (en) * | 2016-05-17 | 2019-01-04 | 中国电子科技集团公司第四十一研究所 | TR component programmable state controller and working method based on USB |
CN106707863A (en) * | 2016-12-23 | 2017-05-24 | 安徽华东光电技术研究所 | Detection control system and method of TR module based on AVR single chip microcomputer |
CN106707863B (en) * | 2016-12-23 | 2019-05-03 | 安徽华东光电技术研究所 | Detection control system and method of TR module based on AVR single chip microcomputer |
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C14 | Grant of patent or utility model | ||
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CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20111012 Termination date: 20150226 |
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EXPY | Termination of patent right or utility model |