CN201985533U

CN201985533U - High-speed response reactive controller

Info

Publication number: CN201985533U
Application number: CN2011200908992U
Authority: CN
Inventors: 顾偲雯; 黄金寿; 顾恩远
Original assignee: SHANGHAI FULYIN POWER ELECTRONIC CO Ltd; LEQING DENGLI ELECTRIC METER AND INSTRUMENT RESEARCH INSTITUTE
Current assignee: SHANGHAI FULYIN POWER ELECTRONIC CO Ltd; LEQING DENGLI ELECTRIC METER AND INSTRUMENT RESEARCH INSTITUTE
Priority date: 2010-08-08
Filing date: 2011-03-25
Publication date: 2011-09-21
Anticipated expiration: 2021-03-25

Abstract

A high-speed response reactive controller used for power system reactive power compensation control belongs to the technical field of energy and electricity conservation and power quality control. The high-speed response reactive controller is characterized in that voltage and current information of a power supply system is collected and then sent to an FPGA (Field Programmable Gate Array) or a CPLD (Complex Programmable Logic Device) functional module for calculation and processing after passing various comparators. At last corresponding system parameters are displayed by an LED and are output through a multi-channel thyristor, so as to drive a reactive power compensation device to switch. Comparing units include a zero crossing comparator, a peak value comparator, an amplitude comparator and a phase-lock loop; all the comparators are connected to the FPGA functional module; and the FPGA functional module comprises a pulse generator, an XOR gate, a counter, a D trigger, a cosine function table, a phase compensator, and LED drive and D/A output. The utility model has the benefits of stability and reliability in running, strong anti-interference ability, accurate detection and judge, and high speed in sending out a switching instruction.

Description

A kind of high-speed response reactive controller

One, affiliated technical field

The utility model relates to a kind of high-speed response reactive controller, is used for power system reactive power compensation control, belongs to energy-conservation economize on electricity and power quality control technology field.

Two, technical background

The terminal use is the important channel of economizing on electricity and improving the quality of power supply to the compensation deals of electrical network.People realize this target by inserting equipment such as reactive power compensator, harmonic treating apparatus, and reactive controller is the critical component of these equipment, detect the variation of electric current, voltage and phase place thereof by it, and send instruction, the switching of control capacitor or reactor.

As is generally known in electricity supplying and using system, active power, reactive power, apparent power have following relation:

In the formula:

--power factor,

Be power-factor angle, the phase declinate

P--active power, KW

The Q--reactive power, Kvar

The S--apparent power, KVA

If U, I are the electric current and voltage effective value, then S=U.I and the instantaneous value of electric current and voltage can show be

From above as can be known various, differ one between electric current and voltage

Angle, using electricity system load are inductive load mostly, so the voltage leading current

The angle.Measure the time of any all wave voltage leading currents, can obtain power factor

By following the tracks of switching compensates inductive load at a high speed, make power factor near 1, just need a kind of high performance idle compensating control.

Existing reactive controller technology is made of as main part A/D converter and single-chip microcomputer usually, mainly there are two shortcomings in this quasi-controller: first, the single-chip microcomputer poor anti jamming capability, often there are drawbacks such as program mess code, flight distance preface to occur, cause problems such as test failure, error in judgement.The second, switching speed is slow, and the electric current, the voltage that need to measure 1-2 cycle carry out computing, sends the switching instruction, changes hysteresis 60-80ms than dynamic real-time.Frequent to load fluctuation especially, the load change amplitude is bigger, the serious unbalanced situation of three-phase load, for example spot welding, electric welding, automatically regulate etc., to the time of this class power consumption equipment (being the impact load of short time) needs compensation, if the controller response speed is slow, impact load has been resigned from office when it is filled, and just causes earlier for being the situation of overcompensation behind the undercompensation.This occurs following The apparent phenomenon often: voltmeter, power factor meter obviously wave, and show that the voltage dip that impact load causes does not obtain administering as yet.

Three, summary of the invention

The utility model provides a kind of high-speed response reactive controller, has stable and reliable operation, and antijamming capability is strong, detects accuracy of judgement, can send the characteristics of switching instruction fast, can overcome the shortcoming and defect of existing reactive controller.

The purpose of this utility model is implemented by following approach:

The utility model provides a kind of high speed reactive controller, comprises signal gathering unit, comparing unit, processing data information unit and demonstration and driving output unit.After it is characterized in that gathering the voltage, current information of electricity supplying and using system, through multiple comparator, information is given the functional module of FPGA or CPLD formation and carry out computing and processing, last LED shows corresponding system parameters and the output of multichannel thyristor is arranged, and drives reactive power compensator and carries out the switching operation.

Signal gathering unit of the present utility model comprises voltage changer and power pack, and its output links to each other with comparing unit.

Comparing unit of the present utility model comprises: voltage zero-crossing comparator, voltage peak comparator, voltage magnitude comparator, phase-locked loop; Also comprise current over-zero comparator, current peak comparator, current amplitude comparator; Various comparators are connected with the functional module that FPGA or CPLD constitute.

Processing data information of the present utility model unit is characterized in that being comprised by the functional module that FPGA or CPLD constitute: pulse generator, XOR gate, counter, current/voltage d type flip flop, table of natural cosines, phase compensator, LED drive, D/A output; Current/voltage d type flip flop wherein and XOR gate are formed phase discriminator, and the clock end of the d type flip flop that voltage, electric current rising edge trigger is connected to the output of voltage, current over-zero comparator respectively, from then on obtains the power-factor angle pulse duration.

The utility model adopts phase-locked loop to be connected with pulse generator, makes its real-time tracking system frequency change; Table of natural cosines in the function of use module is looked into and is got power factor value

The utility model adopts the phase declinate that the phase compensator in the functional module comes in calibration current, the voltage transformation process and corresponding parameter is introduced in comparator device.

Current amplitude comparator in the utility model comparing unit is according to being divided into several grades by the size of bucking-out system electric current; The voltage magnitude comparator is according to being divided into several grades by the size of bucking-out system voltage; Among both, have at least a magnitude comparator to be used to compensate switching output, and realize the multichannel switching.

Four, description of drawings

Fig. 1 the utility model theory diagram

Fig. 2 oscillogram.Wherein v, i--voltage, current waveform VO, IO-zero-crossing comparator waveform; Vm, Im-peak comparator waveform; T-power-factor angle pulse duration

Fig. 3 zero-crossing comparator schematic diagram

Fig. 4 zero-crossing comparator oscillogram

Fig. 5 peak comparator schematic diagram

Fig. 6 current amplitude comparator

The phase discriminator that Fig. 7 double D trigger and XOR gate constitute

Fig. 8 counter

Five, embodiment

The utility model is described in further detail below in conjunction with drawings and Examples.

The utility model provides a kind of high-speed response reactive controller, and Fig. 1 is the utility model theory diagram.Controller is made up of signal gathering unit, comparing unit, functional module elements and demonstration and driving output unit.The voltage of electricity supplying and using system, the instantaneous value of electric current by voltage changer (1) and power pack (2), are given comparator unit.The small-sized instrument transformer of converter is transformed into low-voltage (as 2.5V) to tested voltage, current signal.These voltage and current signals are through zero-crossing comparator (3,7), peak comparator (4,8), and magnitude comparator (5,9) forms serial matrix pulse through XOR gate (11) again; Simultaneously, writing down the wide time of accounting for of rectangular pulse through the counter (12) of the edge triggering that d type flip flop constitutes is corresponding power-factor angle

Check in power factor value through table of natural cosines (14) again

Fig. 2 has enumerated portion waveshape figure.Wherein, v, i system voltage, current waveform for gathering, VO, IO are the zero-crossing comparator waveform, and Vm, Im are the peak comparator waveform, and T is the power-factor angle pulse duration.In the capable rectangular pulse of T, 1,3 is the pulse that zero-crossing comparator passes through or exclusive-OR gate produces, and wherein 1 is the pulse duration of the phase angle generation of positive half cycle voltage leading current, the 3rd, and the pulse duration that the phase angle of negative half period voltage leading current produces.2,4 is the rectangular pulse that peak comparator passes through or exclusive-OR gate produces, and wherein 2 is pulse durations of the phase angle generation of positive half cycle voltage leading current, and 4 is the pulse duration of the phase angle generation of negative half period voltage leading current.Measuring any pulse duration of 1-4 through counter (12) promptly is power-factor angle

Fig. 3 is zero-crossing comparator (3, a 7) schematic diagram, and IC is an operational amplifier among the figure, and D is the diode flow restricter.When input was imported any ac electric, output was promptly exported corresponding square wave.Because of operational amplifier IC is connected into reverse input, its waveform as shown in Figure 4.

Fig. 5 is peak comparator (4,8).U is the instantaneous voltage or the magnitude of current among the figure, and when its zero passage progressively raise, C began charging, when u reaches peak value, C has been charged to ceiling voltage, and the input of IC1 input is positive and negative to equate the ICI output low level, diode is in partially anti-and ends, and IC2 is output as low level, and IC3 is output as high level through not gate.Because IC1, IC2 are high input impedance, C can only slowly discharge by R, makes IC3 output high level keep keeping the square wave in 1/4 cycle of exporting more than the 5ms.

Fig. 6 is current amplitude comparator (9), according to being divided into several grades by the size of current of bucking-out system, suitably disposes resistance value R ₁, R ₂R _2n-1, R _2nOutput is with regard to exportable n different current values.So just can according to size of current and

The height of power factor value is judged the size of no-power vacancy, and a switching just can be realized reasonable compensation as far as possible, and is promptly quick, can avoid overcompensation again.Another sign of no-power vacancy is that voltage reduces, and in like manner can make the accuracy that voltage magnitude comparator (5) improves controller.

Another feature of the present utility model is to be constructed as follows functional module with FPGA (field programmable gate array) or CPLD (CPLD): pulse generator (10), XOR gate (11), counter (12), d type flip flop (13), table of natural cosines (14), phase compensator (15) and LED drive (16) and D/A output (17).The anti-interference of FPGA/CPLD device and speed advantage are that other electronic devices and components are incomparable.

Wherein the double D trigger in the FPGA module (being voltage, current trigger device) (13) constitutes phase discriminator with XOR gate (11), referring to Fig. 7, the clock end of the d type flip flop (13) that voltage, electric current rising edge trigger is connected to the output of voltage, current over-zero comparator (3,7) respectively, obtain the pulse duration of power-factor angle thus, see the capable waveform of T among Fig. 2.

Pulse generator in the FPGA module (10) by with being used of phase-locked loop (6), come the frequency change of real-time tracking system, thereby accurately determine the pulse duration of power-factor angle, improve precision, and use table of natural cosines (14) to look into and get power factor

The phase angle difference that phase compensation block in the FPGA functional module (15) is used in calibration current, the voltage transformation process and corresponding parameter is introduced in comparator device is to improve the precision of controller.In addition, overvoltage, low-voltage, overcurrent, undercurrent and phase shortage all can be passed through magnitude comparator (5,9) and link to each other with the FPGA functional module, make controller possess many defencive functions, repeat no more.

LED drives (16) LED demonstration in the FPGA functional module, and D/A output (17) links to each other with the output of multichannel thyristor.

Owing to adopted FPGA functional module, zero-crossing comparator and technology such as peak comparator and table of natural cosines, make the utility model reach the purpose of quick response, generally can within 2～5ms, send the switching instruction.

Claims

1. high-speed response reactive controller, comprise signal gathering unit, comparing unit, processing data information unit and demonstration and driving output unit, after it is characterized in that gathering the voltage, current information of electricity supplying and using system, through multiple comparator, give FPGA information or the CPLD functional module is carried out computing and processing, last LED shows (18) corresponding system parameters and through multichannel thyristor output (17), drives reactive power compensator and carry out the switching operation.

2. high-speed response reactive controller according to claim 1 is characterized in that forming signal gathering unit by voltage changer (1) and power pack (2), and output links to each other with comparing unit.

3. high-speed response reactive controller according to claim 1 is characterized in that comparing unit comprises voltage zero-crossing comparator (3), voltage peak comparator (4), voltage amplitude comparator (5), reaches phase-locked loop (6); Also comprise current over-zero comparator (7), current peak comparator (8), current amplitude comparator (9); Various comparators are connected with the FPGA functional module.

4. high-speed response reactive controller according to claim 1, it is characterized in that the processing data information unit is comprised by the functional module that FPGA or CPLD constitute: pulse generator (10), XOR gate (11), counter (12), current/voltage d type flip flop (13), table of natural cosines (14), phase compensator (15), and LED drives (16) and D/A output (17).

5. high-speed response reactive controller according to claim 4, it is characterized in that the double D trigger (13) in FPGA or the CPLD functional module constitutes phase discriminator with XOR gate (11), the clock end of the d type flip flop (13) that voltage, electric current rising edge trigger is connected to the output of voltage, current over-zero comparator (3,7) respectively.

6. high-speed response reactive controller according to claim 3 is characterized in that adopting phase-locked loop (6) to make pulse generator (10) real-time tracking system frequency change.

7. high-speed response reactive controller according to claim 4 is characterized in that adopting the phase angle difference that phase compensator (15) comes in calibration current, the voltage transformation process and corresponding parameter is introduced in comparator device.

8. high-speed response reactive controller according to claim 3 is characterized in that described current amplitude comparator (9) is according to being divided into several grades by the size of bucking-out system electric current; Described voltage magnitude comparator (5) is divided into several grades according to the size of being landed by bucking-out system voltage; Among both, have at least a magnitude comparator to be used to compensate switching output, and realize the multichannel switching.