CN201876523U - Circuit board schematic diagram plotting device - Google Patents
Circuit board schematic diagram plotting device Download PDFInfo
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- CN201876523U CN201876523U CN 201020550393 CN201020550393U CN201876523U CN 201876523 U CN201876523 U CN 201876523U CN 201020550393 CN201020550393 CN 201020550393 CN 201020550393 U CN201020550393 U CN 201020550393U CN 201876523 U CN201876523 U CN 201876523U
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- adg732
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Abstract
The utility model discloses a circuit board schematic diagram plotting device comprising a numerical control host machine, a tester and a flexible needle bed. The circuit board schematic diagram plotting device has the design essential that the tester is connected with the flexible needle bed by a cable, and the tester comprises a back board, a channel board, a power supply module and a chassis, wherein a socket is arranged on the back board, and the channel board is vertically inserted in the back board through the socket; the back board is connected with the numerical control host machine through a USB (Universal Serial Bus) cable; and the channel board is connected with the flexible needle bed through the socket. The circuit board schematic diagram plotting device has the advantages of high testing speed, high accuracy rate, good generality, strong capacity of resisting disturbance and the like.
Description
Technical field
The utility model relates to electronic test equipment, specifically a kind of circuit board schematic diagram plotting board.
Background technology
At present, electronic equipment is widely used in many industries and department, is bringing into play crucial effects.Electronic equipment generally is made up of various circuit boards, and the content height that possesses skills, the characteristics that failure rate is high in case break down, will produce significant impact to the normal operation of equipment, place under repair in time.But owing to many equipment especially import equipment often lack the principle drawing, cause and can't repair equipment, equipment can't move, and causes very big loss, so acquisition cuicuit plate schematic diagram is used for instructing repair work very urgent and necessary.
At present, acquisition cuicuit plate schematic diagram mainly contains polishing method, observation, manual test method and fixing needle-bar method of testing.The polishing method is that circuit board element is pulled down, then circuit board is polished, every polishing one deck is just taken a picture, until all board layers of having polished, come the protracting circuit schematic diagram according to every layer imaging, this method need be damaged the circuit kit plate fully, and is with high costs, is difficult to carry out generally speaking; Observation is the cabling on the visual inspection circuit board, manual then the drafting, and this method often is applicable to not too complicated single sided board and doubling plate, can't be suitable for for now increasing multilayer board; The manual test method is to use the ohms range of multimeter that the resistance between all components and parts pins on the circuit-under-test plate is tested in twos, if resistance is less than a specific value between two pins, can think conducting between 2, otherwise be not conducting, this method is to not damage of circuit board, also be applicable to multilayer board, but workload is big, error rate is high; Fixedly the needle-bar method of testing is to use needle-bar that circuit board is fixed, utilize the optical imagery means to draw electronic devices and components pin distribution plan on the circuit-under-test plate then, and then make corresponding channel plate according to distribution plan, be used for the assignment test probe, last under the control of testing software, sending test instruction by Test Host tests, this method of testing test speed is fast, the accuracy rate height, but this method requires to make special channel plate and testing software for every tested electronics spare part, system is huge, the cost height, fabrication cycle is long, versatility is poor, can't apply on a large scale.CN200820227738.1 discloses a kind of circuit board schematic diagram mapping system, and this design especially highly has harsh requirement, system's poor anti jamming capability, job insecurity to the volume of used all kinds of bus interface components and parts and analog switch device.
The utility model content
It is fast that the purpose of this utility model just provides a kind of test speed, the accuracy rate height, and versatility is good, the circuit board schematic diagram plotting board that antijamming capability is strong.
The purpose of this utility model is achieved in that
Circuit board schematic diagram plotting board provided by the utility model, it includes numerical control main frame, tester, flexible needle-bar, and its design main points are that tester is connected by cable with flexible needle-bar; Tester is made up of backboard, channel plate, power module, cabinet, and backboard is provided with socket, and channel plate vertically is plugged on the backboard by this socket; Backboard is connected with the numerical control main frame by USB cable; Channel plate is connected with flexible needle-bar by socket.
In use, the numerical control main frame be used for sending controling instruction, receive image data and handle, finally draw circuit-under-test plate circuit theory diagrams according to result.Flexible needle-bar 2 is used for fixing, connects circuit-under-test plate 16, is connected with tester 1 by flat cable 9.Tester 1 is used for receiving the steering order that the numerical control main frame sends, to test little electric current by its inner passage switching and be loaded into circuit-under-test plate 16 corresponding pins, thereby realize the test in twos between circuit-under-test plate 16 all components and parts pins, and the test data that collects is sent to the numerical control main frame by USB interface.
The beneficial effect that the utility model had is
1, when test, need not the circuit-under-test plate is disassembled, and be applicable to the test of any specification circuit board schematic diagram.It is simple in structure, antijamming capability is strong, reliable operation, cost is low, versatility good, test speed is fast, and the accuracy rate height can communicate with computing machine easily.
2, the utility model is designed to two relatively independent mechanisms with tester and flexible needle-bar; connect by cable again; can make the various circuit board plates in the tester have enough spaces can install and use various filtering commonly used, rectification, isolation, protector on the one hand thus, thereby guarantee that whole device can stable operation.On the flexible on the other hand needle-bar channel plate is not set, thereby greatly facilitates installation, the debugging of circuit-under-test plate, saved the test duration.
3, it is more scientific and reasonable that the utility model makes the design of whole test circuit, thereby not only dwindled the volume of proving installation greatly, also improved test speed and accuracy rating of tests simultaneously.
Description of drawings
Fig. 1 one-piece construction synoptic diagram of the present utility model.
The longitudinal sectional drawing of press strip in Fig. 2 the utility model.
Fig. 3 back plane circuitry structured flowchart of the present utility model.
Fig. 4 channel plate circuit structure of the present utility model block diagram.
Fig. 5 back plane circuitry schematic diagram of the present utility model.
Fig. 6 channel plate circuit theory diagrams of the present utility model.
Fig. 7 is a four-wire system test resistance method schematic diagram.
Embodiment
The utility model includes numerical control main frame, tester 1, flexible needle-bar 2 as shown in Figure 1.Tester 1 is connected by cable 9 with flexible needle-bar 2; Tester 1 is made up of backboard 3, channel plate 4, power module 5, cabinet 6, and backboard 3 is provided with socket 8, and channel plate 4 vertically is plugged on the backboard 3 by this socket 8; Backboard 3 is connected with the numerical control main frame by USB cable; Channel plate 4 is connected with flexible needle-bar 2 by socket 7.Wherein power module 5 is connected with backboard 3, and toward back plate 3 provides working power and provides working power by backboard socket 8 to channel plate 4, and output voltage is monitored in real time, and the assurance system normally moves.Backboard 3, channel plate 4, power module 5 all place a cabinet 6.Backboard socket 8 optional usefulness have the standard connector of five jacks.Channel plate socket 7 optional usefulness have the two rows standard connector of totally 64 jacks.
In order further to strengthen job stability of the present utility model, the circuit (as shown in Figure 3) of designed backboard 3 is by usb circuit 3a, backboard I
2 C repeat circuit 3b, constant-current source circuit 3c, voltage comparator circuit 3d, core bus circuit 3e form; Usb circuit 3a receives the steering order that the numerical control main frame sends, and passes through backboard I after resolving
2 C repeat circuit 3b delivers to core bus circuit 3e; Constant-current source circuit 3c provides test circuit-under-test plate 16 required little electric current by core bus circuit 3e; Voltage comparator circuit 3d is sent to usb circuit 3a with comparative result with constant-current source circuit 3c output voltage and reference voltage after relatively, is transferred to the numerical control main frame again and carries out data processing;
Its more specifically be, the instruction of numerical control main frame sends to the usb circuit 3a of coupled backboard 3 by USB cable, this interface circuit is resolved steering order and is converted I to
2C bus data form is also delivered to I with it
2 C repeat circuit 3b, this repeat circuit has been broken through I
2In the C agreement defined be connected on the bus can not be from parts input capacitance sum greater than the limitation of 400pF, to connect thereon number of components without limits, for system provides good extensibility; Core bus circuit 3e is the bus circuit that comprises five leads that are parallel to each other, and evenly is provided with several backboard sockets 8 on it, I
2Steering order after C repeat circuit 3b will resolve is sent by two leads of backboard socket 8; Constant-current source circuit 3c is connected with another root lead of core bus circuit 3e, is used for producing little electric current of test usefulness, and for security consideration, this electric current is 1mA, under the situation of test fast, can not cause damage to circuit-under-test plate 16; Voltage comparator circuit 3d is sent to usb circuit 3a with comparative result with constant-current source circuit 3c output voltage and reference voltage after relatively, by the numerical control main frame test data is handled.Its circuit theory as shown in Figure 5, by internal USB interface and I
2The single-chip microcomputer U1 of C interface and peripheral circuit thereof are formed usb circuit 3a, by P82B96 type I
2C repeater U2 forms I
2 C repeat circuit 3b forms constant-current source circuit 3c by standard of precision voltage U5, operational amplifier U6 and precision resistance R1, forms voltage comparator circuit 3d by voltage comparator U3 and voltage reference U4; The D+ of U1, D-pin are connected with USB interface of computer, and SCL, SDA pin are connected with Sx, the Sy pin of U2 respectively, the pin Tx of U2 is connected with Rx, Ty with link to each other with SCL, sda line on the core bus circuit 3e respectively after Ry is connected; R1 one end links to each other with the output terminal pin OUT of U5, the other end links to each other with the out-phase input end of U6 and constitutes the output terminal of constant-current source circuit 3c, U6 is connected into voltage follower, be to link to each other with the ground end pin GND of U5 after its in-phase input end is connected with output terminal, be the reference voltage that the R1 both end voltage just equals U5 between U6 in-phase input end and the U5 output terminal, thereby export constant electric current, this current value
i=U5 reference voltage
u Out / R1, and be connected with Iout line on the core bus circuit 3e by resistance R 2; The U4 output terminal links to each other with the negative input pin IN-of U3, for U3 provides reference data voltage
u Ref , the electrode input end pin IN+ of U3 and the output terminal of constant-current source circuit 3c are that the out-phase input end of U6 is connected, U3 output terminal pin OUT is connected with the I/O mouth pin PA0 of U1; Core bus circuit 3e is the five-wire system bus circuit, comprises I
2C clock line SCL and data line SDA, power lead VCC and GND, constant current source electric current line Iout all are connected with backboard socket 8; If the resistance between the tested pin is Rx, the internal resistance of analog switch is Ri, is Rx+2Ri from the last constant current source electric current line Iout of core bus circuit 3e to the resistance between the ground wire GND then, so the voltage on the U3 electrode input end pin IN+
u i =
i(Rx+2Ri+R2), if
u i u Ref , U3 output terminal pin OUT goes up the output high level, otherwise output low level.In the present invention, the reference gate that whether conducting is set between two the tested pins resistance of rationing the power supply is 10 ohm, then
u Ref =
i(10+2Ri+R2), wherein
i, Ri, R2 be known, can calculate thus
u Ref Numerical value, thereby can select suitable voltage reference U4.
The circuit (as shown in Figure 4) of the channel plate 4 in the utility model is by channel plate I
2 C repeat circuit 4a, control circuit 4b, analog switch matrix circuit 4c) channel interface 4d composition; Channel plate I wherein
2 C repeat circuit 4a receives the steering order that core bus circuit 3e sends here, and this instruction is sent to control circuit 4b, and control circuit 4b carries out the address and relatively the success back resolved by instruction, the folding of control analog switch matrix circuit 4c respective switch; Analog switch matrix circuit 4c receives little electric current of sending here on the core bus circuit 3e, switch through closure is delivered to the components and parts pin that is connected with this switch on the circuit-under-test plate 16 with this little electric current, after testing the circuit on little electric current process circuit-under-test plate 16, go up another closed switch to ground by analog switch matrix circuit 4c.
Can calculate the voltage at circuit-under-test two ends by the output voltage of test constant-current source circuit 3c, size of current according to constant-current source circuit 3c output, the resistance at circuit-under-test two ends can be calculated, and then the resistance between two electronic devices and components pins can be calculated on the circuit-under-test plate 16.Each passage on the channel interface 4d is that each connection terminal all is assigned a unique address, and tester is realized being connected the sign of electronic devices and components pin on the circuit-under-test plate 16 on this passage by this address.
The circuit theory of the channel plate in the utility model, as shown in Figure 6, by P82B96 type I
2C repeater U7 forms channel plate I
2 C repeat circuit 4a forms control circuit 4b by CPLD U8 and active crystal oscillator X1, constitutes the analog switch matrix circuit by analog switch device ADG732; The pin Tx of U7 and Rx link to each other, Ty be connected with SCL, the sda line of core bus circuit 3e respectively after Ry links to each other, the Sx of U7, Sy pin link to each other with two I/O pins of U8 respectively; Two I/O pins of this of U8 are modeled to I
2C interface and U7 communicate, and the clock pin GCLK of X1 output terminal and U3 is connected to it provides clock signal.
Flexible needle-bar 2 in the utility model comprises crossbeam 12, press strip 14 and flexibility test pin 15; Be distributed with equally spaced row's screw 13 on the crossbeam 12, press strip 14 is fixed on relevant position on the crossbeam 12 by securing member; Press strip 14(is as shown in Figure 2) be provided with coaxial, top is divided into the solid metal body, the bottom is the connection terminal 17 of hollow structure; Flexibility test pin 15 upper ends place in the connection terminal 17 on the press strip 14, and the pin of electronic devices and components is connected on lower end and the circuit-under-test plate 16.
Flexible needle-bar 2 more detailed structures are that flexible needle-bar is made up of rectangular shaped rim 10, supporting leg 11, crossbeam 12, press strip 14 and flexibility test pin 15, is laterally zygomorphic tower structure; Rectangular shaped rim 10 is fixed on the middle part of its four supporting legs 11 of four jiaos, upper and lower surface in rectangular shaped rim 10 is provided with two crossbeams that are parallel to each other 12, crossbeam 12 is provided with equally spaced screw 13, and the spacing between two through holes 18 at press strip 14 two ends equates with two distances of arranging between the screws 13 on same two crossbeams 12 simultaneously; Circuit-under-test plate 16 is fixed on the middle part of rectangular shaped rim 10 vertical direction, press strip 14 is placed tested electronic devices and components pin top, use screw that press strip 14 is fixed on two crossbeams 12, then the press strip 14 of rectangular shaped rim 10 upper and lower surfaces equates with the spacing of circuit-under-test plate 16; Use flat cable 9 to connect tester 1 and flexible needle-bar 2, flat cable 9 one ends for the connector with 64 contact pins of channel plate socket 7 same specifications, can be inserted in the channel plate socket 7, every contact pin all is connected with a lead of flat cable 9, flat cable 9 other ends are connected with press strip 14, every lead all with press strip 14 on the welded top of connection terminal 17, thereby realize being connected of each connection terminal 17 on tester 1 each passage and the press strip 14; Flexibility test pin 15 tops are inserted the bottom of press strip 14 upper connecting terminals 17, the probe of bottom is pricked on the pin of tested components and parts, because connection terminal 17 has certain degree of depth, flexibility test pin 15 also can keep under the situation at certain angle of inclination being connected with the reliable of tested components and parts pin having; Use a press strip 14 and connected flexibility test pin 15, can cover the tested components and parts pin of a row of press strip 14 belows, by abundant press strip 14 and flexibility test pin 15 are set, can cover whole pins of circuit-under-test plate 16 all components and parts of upper and lower surface, thereby realize being connected between circuit-under-test plate 16 all pins and tester 1 passage.
Flat cable 9 is connected tester 1 with flexible needle-bar 2, the one end uses the standard connector to insert on the channel plate socket 7, the other end is connected with press strip 14, in the flat cable 9 every lead two ends respectively with press strip 14 on contact pin welding on corresponding each connection terminal 17 and the standard connector.
Press strip 14 as shown in Figure 2, press strip upper connecting terminal 17 is divided into coaxial two parts up and down, the bottom is divided into hollow structure, top is divided into the solid metal body, be connected with the conductive metallic material of lower part inwall, a wire bonds in top, top and the flat cable 9, flexibility test pin 15 tops place the inside of its underpart, guarantee that flexibility test pin 15 still can reliably be connected with circuit-under-test plate 16 under the situation of inclination certain angle; Every press strip 14 can cover its next row's components and parts pin, by upper and lower surface abundant press strip 14 is set at flexible needle-bar 2, then can cover all electronic devices and components pins on the circuit-under-test plate 16, thereby realize being connected of all pins and tester 1 respective channel; Because each pin of linking to each other with the tester passage all is assigned a unique address, whole pins are with after tester is connected, and tester can be realized the test between any two pins.
Analog switch matrix circuit 4c described in the utility model is made of analog switch device ADG732, specifically as shown in Figure 6, and the enable pin of ADG732-1, ADG732-2, ADG732-3, ADG732-4 device
, sheet selects pin
Link to each other the read-write pin respectively with eight I/O pins of U3
All be connected with the same I/O pin of U3, switch is connected with five I/O pins of U3 respectively after selecting pin A0 ~ A4 to connect by identical sequence number, realized control circuit 4b enabling to each analog switch device, the sheet choosing, read-write, control function such as switch selection, ADG732-1 and the common port pin D of ADG732-3 are connected with Iout line on the core bus circuit 3e, ADG732-2 and the common port pin D of ADG732-4 are connected with GND line on the core bus circuit 3e, ADG732-1 is connected to by identical order with switch terminals pin S1 ~ S32 of ADG732-2 and constitutes output channel K1 ~ K32 together, ADG732-3 is connected to by identical order with switch terminals pin S1 ~ S32 of ADG732-4 and constitutes output channel K33 ~ K64 together, and each passage links to each other with each terminal on the channel interface 4d that channel plate socket 7 is formed respectively.
In the method for the four-wire system measuring resistance of routine, (as shown in Figure 7) Rx is two resistance between the tested pin, and Rx one end is connected with analog switch K1, and the other end is connected with analog switch K2, and constant current source A is anodal to be connected with K1, and negative pole is connected with K2, and output current is
i, then flow through K1, Rx, K2 of electric current forms a close access, and this moment, constant current source A both end voltage was
u o , just equaling K1, Rx, K2 both end voltage, the internal resistance of analog switch K1, K2 is R
i, then the resistance at K1, Rx, K2 two ends is 2R
i+ Rx=
u o /
i, then can calculate Rx=
u o /
i-2R
iBut common analog switch device internal resistance is often bigger, be generally hundreds of ohm, and it is bigger to vary with temperature drift, the Rx result who calculates like this has very large deviation, do not conform to the actual conditions, so in the method for four-wire system test resistance again the end at Rx be provided with K switch 3, the other end is provided with K4, owing to do not have electric current to flow through on K3, the K4, so do not have pressure drop on these two switches, the therefore voltage between two switches
u' just equal the magnitude of voltage at Rx two ends so Rx=
u'/
i, this moment, the internal resistance of analog switch device just no longer exerted an influence to the result of calculation of Rx, thereby obtained result accurately; But this method has increased by one times with the quantity of analog switch device, and system scale enlarges greatly, and cost significantly improves.Therefore the utility model has selected for use analog switch device ADG732 to constitute analog switch matrix circuit 4c, this device internal resistance has only several ohm and very little with temperature drift, to the influence of Rx result of calculation within the acceptable scope, to not influence of final testing result, therefore K3, K4 can be cast out, then the Rx value is Rx=
u o /
i-2R
i
The concrete circuit of analog switch matrix circuit 4c connects following (with reference to shown in Figure 6): the enable pin of ADG732-1, ADG732-2, ADG732-3, ADG732-4 device
, sheet selects pin
Link to each other the read-write pin respectively with eight I/O pins of U3
All be connected with the same I/O pin of U3, switch is connected with five I/O pins of U3 respectively after selecting pin A0 ~ A4 to connect by identical sequence number, realized control circuit 4b enabling to each analog switch device, the sheet choosing, read-write, control function such as switch selection, ADG732-1 and the common port pin D of ADG732-3 are connected with Iout line on the core bus circuit 3e, ADG732-2 and the common port pin D of ADG732-4 are connected with GND line on the core bus circuit 3e, ADG732-1 is connected to by identical order with switch terminals pin S1 ~ S32 of ADG732-2 and constitutes output channel K1 ~ K32 together, ADG732-3 is connected to by identical order with switch terminals pin S1 ~ S32 of ADG732-4 and constitutes output channel K33 ~ K64 together, and each passage links to each other with each terminal on the channel interface 4d that channel plate socket 7 is formed respectively.
Comprehensive above analysis result, the voltage on the backboard 1 on the voltage comparator U3 electrode input end pin IN+
u i =
i(Rx+2Ri+R2)=
i(
u o /
i+ R2)=
u O+ i* R2,
iWith R2 be known, so by test constant current source both end voltage
u o , again through calculating the reference voltage of back and voltage reference U4
u Ref Compare and to judge between two tested pins whether conducting.The output terminal pin OUT of U3 sends to U1 by the PA0 pin of single-chip microcomputer U1 with comparative result, and send to computing machine by U1 by USB interface again and handle, and then the protracting circuit schematic diagram.
Claims (6)
1. circuit board schematic diagram plotting board, it includes numerical control main frame, tester (1), flexible needle-bar (2), it is characterized in that tester (1) is connected by cable (9) with flexible needle-bar (2); Tester (1) is made up of backboard (3), channel plate (4), power module (5), cabinet (6), and backboard (3) is provided with socket (8), and channel plate (4) vertically is plugged on the backboard (3) by this socket (8); Backboard (3) is connected with the numerical control main frame by USB cable; Channel plate (4) is connected with flexible needle-bar (2) by socket (7).
2. circuit board schematic diagram plotting board according to claim 1 is characterized in that described backboard (3) is by usb circuit (3a), backboard I
2C repeat circuit (3b), constant-current source circuit (3c), voltage comparator circuit (3d), core bus circuit (3e) are formed; Usb circuit (3a) receives the steering order that the numerical control main frame sends, and passes through backboard I after resolving
2C repeat circuit (3b) is delivered to core bus circuit (3e); Constant-current source circuit (3c) provides test required little electric current by core bus circuit (3e); Voltage comparator circuit (3d) is sent to usb circuit (3a) with comparative result with constant-current source circuit (3c) output voltage and reference voltage after relatively, is transferred to the numerical control main frame again.
3. circuit board schematic diagram plotting board according to claim 1 and 2 is characterized in that said channel plate (4) is by channel plate I
2C repeat circuit (4a), control circuit (4b), analog switch matrix circuit (4c), channel interface (4d) are formed; Channel plate I wherein
2C repeat circuit (4a) receives the steering order that core bus circuit (3e) is sent here, and this instruction sent to control circuit (4b), control circuit (4b) carries out the address relatively resolves instruction the success back, the folding of control analog switch matrix circuit (4c) respective switch; Analog switch matrix circuit (4c) receives little electric current of sending here on the core bus circuit (3e), switch through closure is delivered to the components and parts pin that circuit-under-test plate (16) upward is connected with this switch with this little electric current, after testing the circuit on little electric current process circuit-under-test plate (16), go up another closed switch to ground by analog switch matrix circuit (4c).
4. circuit board schematic diagram plotting board according to claim 1 and 2 is characterized in that described constant-current source circuit (3c) is made of standard of precision voltage U5, operational amplifier U6 and precision resistance R1.
5. circuit board schematic diagram plotting board according to claim 1 and 2 is characterized in that described flexible needle-bar (2) comprises crossbeam (12), press strip (14) and flexibility test pin (15); Be distributed with equally spaced row's screw (13) on the crossbeam (12), press strip (14) is fixed on crossbeam (12) by securing member and goes up the relevant position; That press strip (14) is provided with is coaxial, top is divided into the solid metal body, the bottom is the connection terminal (17) of hollow structure; Flexibility test pin (15) upper end places in the connection terminal (17) on the press strip (14), and the pin of the electronic devices and components on lower end and the circuit-under-test plate (16) is connected.
6. circuit board schematic diagram plotting board according to claim 3, it is characterized in that described analog switch matrix circuit (4c) is made of four ADG732 analog switch devices, wherein the enable pin of ADG732-1, ADG732-2, ADG732-3, ADG732-4 device
, sheet selects pin
Link to each other the read-write pin respectively with eight I/O pins of voltage comparator U3
All be connected with the same I/O pin of U3, switch is connected with five I/O pins of U3 respectively after selecting pin A0 ~ A4 to connect by identical sequence number, ADG732-1 and the common port pin D of ADG732-3 are connected with Iout line on the core bus circuit (3e), ADG732-2 and the common port pin D of ADG732-4 are connected with GND line on the core bus circuit (3e), ADG732-1 is connected to by identical order with switch terminals pin S1 ~ S32 of ADG732-2 and constitutes output channel K1 ~ K32 together, ADG732-3 is connected to by identical order with switch terminals pin S1 ~ S32 of ADG732-4 and constitutes output channel K33 ~ K64 together, and each passage links to each other with each terminal on the channel interface (4d) that channel plate socket 7 is formed respectively.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201020550393 CN201876523U (en) | 2010-09-30 | 2010-09-30 | Circuit board schematic diagram plotting device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201020550393 CN201876523U (en) | 2010-09-30 | 2010-09-30 | Circuit board schematic diagram plotting device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN201876523U true CN201876523U (en) | 2011-06-22 |
Family
ID=44164439
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 201020550393 Expired - Fee Related CN201876523U (en) | 2010-09-30 | 2010-09-30 | Circuit board schematic diagram plotting device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN201876523U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102393504A (en) * | 2010-09-30 | 2012-03-28 | 中国人民解放军总装备部军械技术研究所 | Plotting device of schematic diagram of circuit board |
| CN102736019A (en) * | 2012-07-17 | 2012-10-17 | 宁波工程学院 | Flexibility detection system and method of circuit board |
-
2010
- 2010-09-30 CN CN 201020550393 patent/CN201876523U/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102393504A (en) * | 2010-09-30 | 2012-03-28 | 中国人民解放军总装备部军械技术研究所 | Plotting device of schematic diagram of circuit board |
| CN102736019A (en) * | 2012-07-17 | 2012-10-17 | 宁波工程学院 | Flexibility detection system and method of circuit board |
| CN102736019B (en) * | 2012-07-17 | 2014-11-05 | 宁波工程学院 | Flexibility detection system and method of circuit board |
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