CN201854504U - Embedded-capacitor circuit board - Google Patents

Embedded-capacitor circuit board Download PDF

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Publication number
CN201854504U
CN201854504U CN201020539684XU CN201020539684U CN201854504U CN 201854504 U CN201854504 U CN 201854504U CN 201020539684X U CN201020539684X U CN 201020539684XU CN 201020539684 U CN201020539684 U CN 201020539684U CN 201854504 U CN201854504 U CN 201854504U
Authority
CN
China
Prior art keywords
copper foil
capacitor
base material
circuit board
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201020539684XU
Other languages
Chinese (zh)
Inventor
李鹏路
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SUZHOU SANSN ELECTRONIC CO Ltd
Original Assignee
SUZHOU SANSN ELECTRONIC CO Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SUZHOU SANSN ELECTRONIC CO Ltd filed Critical SUZHOU SANSN ELECTRONIC CO Ltd
Priority to CN201020539684XU priority Critical patent/CN201854504U/en
Application granted granted Critical
Publication of CN201854504U publication Critical patent/CN201854504U/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

The utility model relates to an embedded capacitor circuit board. The embedded capacitor circuit board comprises a substrate, ordinary copper foil layers and capacitor copper foil layers, wherein the ordinary copper foil layers are arranged on the upper and lower surfaces, two groups of capacitor copper foil layers are arranged inside the substrate at intervals, through holes are arranged on the substrate at intervals, and conductive copper is arranged in the through holes. As two groups of capacitor copper foil layers are arranged inside the substrate, the capacitor can be arranged in the substrate; meanwhile, the through holes are arranged on the substrate at intervals, and the conductive copper is arranged in the through holes, thereby forming the capacitor; the capacitor parts are not required to be attached to the client side, thereby reducing the labor, the soldering tin and the cost; in addition, the parts density of PCB (printed circuit board) is reduced, thereby being convenient for the customers to design.

Description

A kind of capacitive circuit plate that buries
Technical field
The utility model relates to a kind of circuit board, and particularly a kind of electric capacity is arranged on and buries the capacitive circuit plate in the base material, belongs to electronic technology field.
Background technology
In the prior art, circuit board as shown in Figure 1 comprises base material 1, electric capacity 2; Described electric capacity 2 is fixed on the base material 1 by scolding tin 3; Sort circuit plate, electric capacity are arranged on the outside of base material, are hit easily to come off, thereby make the circuit board cisco unity malfunction, damage circuit board, and fixing needs of electric capacity used scolding tin simultaneously, increased cost.
The utility model content
The utility model purpose be proposed in order to overcome the deficiencies in the prior art that a kind of cost is low, electric capacity is arranged on and buries the capacitive circuit plate in the base material.
For achieving the above object, the technical solution adopted in the utility model is: a kind of capacitive circuit plate that buries comprises base material, common copper foil layer, electric capacity copper foil layer; Described common copper foil layer is arranged on the upper and lower surface of base material; Described electric capacity copper foil layer has 2 groups, is spaced apart and arranged in the inside of base material.
Preferably, be arranged at intervals with through hole on the described base material; Be provided with conducting copper in the described through hole.
Because the utilization of technique scheme, the utility model compared with prior art has following advantage:
The capacitive circuit plate that buries of the present utility model by two groups of electric capacity copper foil layers being set in base material inside, has been realized electric capacity is arranged on base material inside, simultaneously, at interval through hole is set on base material, is provided with conducting copper in the through hole, makes it form electric capacity; The circuit board of this programme simultaneously, client does not need obedient electric capacity part, reduces artificial, scolding tin etc., has reduced cost; Other has reduced PCB plate surface parts density, and it is more convenient that the client is designed.
Description of drawings
Below in conjunction with accompanying drawing technical solutions of the utility model are described further:
Accompanying drawing 1 is the cutaway view of the circuit board of prior art;
Accompanying drawing 2 is the cutaway view that buries the capacitive circuit plate of the present utility model;
Wherein: 1, base material; 2, electric capacity; 3, scolding tin; 10, base material; 11, common copper foil layer; 12, electric capacity copper foil layer; 13, through hole; 14, conducting copper.
Embodiment
Be a kind of capacitive circuit plate that buries described in the utility model as shown in Figure 2, comprise base material 10, common copper foil layer 11, electric capacity copper foil layer 12; Described common copper foil layer 11 is arranged on the upper and lower surface of base material 10; Described electric capacity copper foil layer 12 has 2 groups, is spaced apart and arranged in the inside of base material 10, is arranged at intervals with through hole 13 on the described base material 10; Be provided with conducting copper 14 in the described through hole 13.
Because the utilization of technique scheme, the utility model compared with prior art has following advantage: the capacitive circuit plate that buries of the present utility model, by two groups of electric capacity copper foil layers being set in base material inside, realized electric capacity is arranged on base material inside, simultaneously, on base material, at interval through hole is set, is provided with conducting copper in the through hole, make it form electric capacity; The circuit board of this programme simultaneously, client does not need obedient electric capacity part, reduces artificial, scolding tin etc., has reduced cost; Other has reduced pcb board surface parts density, and it is more convenient that the client is designed.
Below only be concrete exemplary applications of the present utility model, protection range of the present utility model is not constituted any limitation.All employing equivalents or equivalence are replaced and the technical scheme of formation, or any to move mode dull and stereotyped described in the utility model, all drop within the utility model rights protection scope.

Claims (2)

1. one kind is buried the capacitive circuit plate, it is characterized in that: comprise base material, common copper foil layer, electric capacity copper foil layer; Described common copper foil layer is arranged on the upper and lower surface of base material; Described electric capacity copper foil layer has 2 groups, is spaced apart and arranged in the inside of base material.
2. the capacitive circuit plate that buries according to claim 1 is characterized in that: be arranged at intervals with through hole on the described base material; Be provided with conducting copper in the described through hole.
CN201020539684XU 2010-09-20 2010-09-20 Embedded-capacitor circuit board Expired - Fee Related CN201854504U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201020539684XU CN201854504U (en) 2010-09-20 2010-09-20 Embedded-capacitor circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201020539684XU CN201854504U (en) 2010-09-20 2010-09-20 Embedded-capacitor circuit board

Publications (1)

Publication Number Publication Date
CN201854504U true CN201854504U (en) 2011-06-01

Family

ID=44096881

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201020539684XU Expired - Fee Related CN201854504U (en) 2010-09-20 2010-09-20 Embedded-capacitor circuit board

Country Status (1)

Country Link
CN (1) CN201854504U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106162477A (en) * 2016-07-18 2016-11-23 瑞声科技(新加坡)有限公司 A kind of burying holds structure, the manufacture method burying appearance structure and MEMS microphone

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106162477A (en) * 2016-07-18 2016-11-23 瑞声科技(新加坡)有限公司 A kind of burying holds structure, the manufacture method burying appearance structure and MEMS microphone
CN106162477B (en) * 2016-07-18 2020-01-03 瑞声科技(新加坡)有限公司 Capacitor-embedded structure, manufacturing method of capacitor-embedded structure and MEMS (micro-electromechanical system) microphone

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Legal Events

Date Code Title Description
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20110601

Termination date: 20140920

EXPY Termination of patent right or utility model