CN201839199U - Bridgeless power factor correcting circuit - Google Patents
Bridgeless power factor correcting circuit Download PDFInfo
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- CN201839199U CN201839199U CN2010205570278U CN201020557027U CN201839199U CN 201839199 U CN201839199 U CN 201839199U CN 2010205570278 U CN2010205570278 U CN 2010205570278U CN 201020557027 U CN201020557027 U CN 201020557027U CN 201839199 U CN201839199 U CN 201839199U
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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Abstract
The utility model provides a bridgeless power factor correcting circuit, which is low in cost, high in reliability and simple in circuit and comprises an alternating-current power source, a booster inductor, a first bridge arm, a second bridge arm, a load circuit and a current sampling circuit. The first bridge arm and the second bridge are connected in parallel, the connection points at two ends of the first bridge arm and the second bridge arm connected in parallel are respectively a first parallel connection point and a second parallel connection point, the first parallel connection point and the second parallel connection point as output ends are connected to the load circuit, the current sampling circuit includes a sampling resistor and a sampling circuit unit, one end of the sampling resistor is connected with the second parallel connection point, the other end is connected with a control ground end of the load circuit, and the sampling circuit unit is connected in parallel to two ends of the sampling resistor. As one end of the sampling resistor unit is grounded, an isolator circuit is omitted from the sampling circuit unit, cost is reduced, reliability of a current sampling device is increased, further, the structure of the current sampling device is simplified relatively, and loop control is realized better.
Description
Technical field
The utility model belongs to the power supply technique field, relates in particular to no bridge power factor correction circuit field wherein.
Background technology
In the Single-phase PFC circuit, because the existence of input rectifying bridge, limited the lifting of entire circuit efficient, in order to reduce the loss of rectifier bridge, a lot of new topologys have been proposed, in these topologys, non-bridge PFC is owing to its structure, control simply are used widely in field of power supplies, and can be realized power factor correction preferably.Traditional relatively BOOST PFC topology, non-bridge PFC is owing to omitted the input rectifying bridge, efficient has obtained bigger lifting, but because the specific position of inductance, make current detecting become difficult, common sample circuit is the sampling to inductive current, can obtain the amplifying signal of electric current by series resistor in inductive branch and by isolating optocoupler and amplifier, or obtain the amplifying signal of electric current by instrument transformer, or the like, but these several current sample mode structures, control are complicated, and fabric swatch requires high, reliability is relatively low, and cost is higher relatively.
The utility model content
The utility model is for solving said structure, control complexity, and fabric swatch requires high, and the relatively low technical problem of reliability provides a kind of low cost, high reliability, circuit simply not to have the bridge power factor correction circuit.
A kind of no bridge power factor correction circuit comprises AC power, boost inductance, first brachium pontis, second brachium pontis, load circuit and current sampling circuit; The described first bridge wall and second brachium pontis are connected in parallel, and the tie point at its two ends is called first point, second that is connected in parallel and is connected in parallel a little; First is connected in parallel a little and second is connected in parallel and a little is linked into load circuit as output; First brachium pontis comprises the first rectifier diode unit and first switch element of series connection, is provided with first tie point between the first rectifier diode unit and first switch element; Second brachium pontis comprises the second rectifier diode unit and the second switch unit of series connection, is provided with second tie point between the second rectifier diode unit and the second switch unit; Described boost inductance comprises first boost inductance and second boost inductance; Described first boost inductance is electrically connected with first tie point on the end of AC power and the first bridge wall respectively; Described second boost inductance is electrically connected with second tie point on the other end of AC power and the second bridge wall respectively; Wherein, described current sampling circuit comprises sampling resistor and sample circuit unit; Described sampling resistor one termination second is connected in parallel a little, the control ground end of another termination load circuit; The sample circuit unit is connected in parallel on the sampling resistor two ends.
Adopt technical solutions of the utility model, because sampling resistor unit one end ground connection, the sample circuit unit has saved buffer circuit, when reducing cost, also improved the reliability of current sampling device, simultaneously the structure of current sampling device is oversimplified relatively, and realized loop control preferably.
Description of drawings
Fig. 1 is a no bridge power factor correction circuit schematic diagram in the utility model embodiment;
Fig. 2 is a rectifier diode cell schematics in the utility model embodiment;
Fig. 3 is a switch element schematic diagram in the utility model embodiment;
Fig. 4 is a current sampling unit schematic diagram in the utility model embodiment;
Fig. 5, Fig. 6 are two concrete schematic diagrames of current sampling unit in the utility model embodiment;
Embodiment
Clearer for technical problem, technical scheme and beneficial effect that the utility model is solved, below in conjunction with drawings and Examples, the utility model is further elaborated.Should be appreciated that specific embodiment described herein only in order to explanation the utility model, and be not used in qualification the utility model.
As shown in Figure 1, disclosed no bridge power factor correction circuit in this example comprises AC power AC, boost inductance, first brachium pontis 1, second brachium pontis 2, load circuit 3 and current sampling circuit;
The first bridge wall 1 and second brachium pontis 2 are connected in parallel, and the tie point at its two ends is called first a, second b that is connected in parallel that is connected in parallel; First a and second b that is connected in parallel that is connected in parallel is linked into load circuit as output;
Boost inductance comprises the first boost inductance L1 and the second boost inductance L2;
The first boost inductance L1 is electrically connected with the first tie point M1 on the end of AC power AC and the first bridge wall 1 respectively;
The second boost inductance L2 is electrically connected with the second tie point M2 on the other end of AC power AC and the second bridge wall 2 respectively;
Current sampling circuit comprises sampling resistor Rs and sample circuit unit 4; Sampling resistor Rs one termination second b that is connected in parallel, the control ground end of another termination load circuit 3; Sample circuit unit 4 is connected in parallel on sampling resistor Rs two ends.
The first rectifier diode unit 11 is identical with the function of the second rectifier diode unit 21, and the first rectifier diode unit 11 is that single diode or two above diode parallel connections or an above diode are in parallel with the RC filter unit.In like manner, the second rectifier diode unit 21 also can be in parallel with the RC filter unit for single diode or two above diode parallel connections or an above diode.As shown in Figure 2, the first rectifier diode unit 11 and the second rectifier diode unit 21 all can be a rectifier diode D RC filter unit in parallel in this example.
As shown in Figure 1, load circuit 3 comprises filter capacitor Cout and and its load in parallel 31.Be conventionally known to one of skill in the art herein, repeat no more.
About current sampling circuit, as shown in Figure 1, the current value at sampling resistor Rs two ends is gathered in sample circuit unit 4, and it is carried out carrying out Current Regulation after the filtering, and therefore, as shown in Figure 4, sample circuit unit 4 comprises filter 41 and current regulator 42.Current regulator 42 comprises operational amplifier, the first capacitor resistor unit Z1 and the second capacitor resistor unit Z2, the described first capacitor resistor unit Z1 is connected between the reverse input end of filter 41 and operational amplifier, and the described second capacitor resistor unit Z2 is connected between operational amplifier reverse input end and the output.The input reference of the input in the same way comparison value Iref of operational amplifier.
About the first capacitor resistor unit Z1 and the second capacitor resistor unit Z2, referring to can be for single or multiple resistance, with single or multiple electric capacity, with the unit of connecting or the mode of parallel connection or series-parallel connection is formed.Such as parallel connection that all can be selected from resistance, resistance and electric capacity or the like.
Such as, as shown in Figure 5, the first capacitor resistor unit Z1 can be a resistance, and the second capacitor resistor unit Z2 be a resistance with a capacitances in series after, connect with another resistance again.
Again such as, as shown in Figure 6, the first capacitor resistor unit Z1 and the second capacitor resistor unit Z2 can for be a resistance with a capacitances in series after, the form of connecting with another resistance again.These, the technical staff of electricity field need not to pay performing creative labour, only illustrates herein, and is not limited to this.
The Bridgeless power factor circuit correcting circuit engineering process is described below in this example:
As shown in Figure 1, in the inductance exergonic process, there is electric current to flow through sampling resistor Rs, sampling resistor Rs will adopt current signal through comparing with reference value I ref after the filtering, realization makes it follow the tracks of input voltage waveform to the control of electric current, thereby realizes power factor correction.
Because sampling resistor unit one end ground connection, the sample circuit unit has saved buffer circuit, when reducing cost, has also improved the reliability of current sampling device, simultaneously the structure of current sampling device is oversimplified relatively, and has been realized loop control preferably.
The above only is preferred embodiment of the present utility model; not in order to restriction the utility model; all any modifications of within spirit of the present utility model and principle, being done, be equal to and replace and improvement etc., all should be included within the protection range of the present utility model.
Claims (9)
1. a no bridge power factor correction circuit comprises AC power (AC), boost inductance, first brachium pontis (1), second brachium pontis (2), load circuit (3) and current sampling circuit;
The described first bridge wall (1) and second brachium pontis (2) are connected in parallel, and the tie point at its two ends is called first point (a), second point (b) that is connected in parallel that is connected in parallel; First point (a) and second point (b) that is connected in parallel that is connected in parallel is linked into load circuit as output;
First brachium pontis (1) comprises the first rectifier diode unit (11) and first switch element (12) of series connection, is provided with first tie point (M1) between the first rectifier diode unit (11) and first switch element (12);
Second brachium pontis (2) comprises the second rectifier diode unit (21) and second switch unit (22) of series connection, is provided with second tie point (M2) between the second rectifier diode unit (21) and second switch unit (22);
Described boost inductance comprises first boost inductance (L1) and second boost inductance (L2);
Described first boost inductance (L1) is electrically connected with an end and first last first tie point of bridge wall (1) (M1) of AC power (AC) respectively;
Described second boost inductance (L2) is electrically connected with the other end and second last second tie point of bridge wall (2) (M2) of AC power (AC) respectively;
It is characterized in that: described current sampling circuit comprises sampling resistor (Rs) and sample circuit unit (4); Described sampling resistor (Rs) termination second point (b) that is connected in parallel, the control ground end of another termination load circuit (3); Sample circuit unit (4) is connected in parallel on sampling resistor (Rs) two ends.
2. no bridge power factor correction circuit as claimed in claim 1 is characterized in that: the described first rectifier diode unit is that single diode or two above diode parallel connections or an above diode are in parallel with the RC filter unit.
3. no bridge power factor correction circuit as claimed in claim 1 is characterized in that: the described second rectifier diode unit is that single diode or two above diode parallel connections or an above diode are in parallel with the RC filter unit.
4. no bridge power factor correction circuit as claimed in claim 1 is characterized in that: the described first rectifier diode unit and the second rectifier diode unit are that a plurality of diodes are parallel with one another.
5. no bridge power factor correction circuit as claimed in claim 1 is characterized in that: described first switch element is single MOSFET or IGBT, or a plurality of MOSFET or IGBT parallel connection.
6. no bridge power factor correction circuit as claimed in claim 1 is characterized in that: described second switch unit is single MOSFET or IGBT, or a plurality of MOSFET or IGBT parallel connection.
7. no bridge power factor correction circuit as claimed in claim 1 is characterized in that: described load circuit comprises filter capacitor (Cout) and and its load in parallel (31).
8. no bridge power factor correction circuit as claimed in claim 1 is characterized in that: described sample circuit unit (4) comprises filter (41) and current regulator (42).
9. no bridge power factor correction circuit as claimed in claim 8, it is characterized in that: described current regulator (42) comprises operational amplifier, first capacitor resistor unit (Z1) and second capacitor resistor unit (Z2), described first capacitor resistor unit (Z1) is connected between the reverse input end of filter (41) and operational amplifier, and described second capacitor resistor unit (Z2) is connected between operational amplifier reverse input end and the output.
Priority Applications (1)
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CN2010205570278U CN201839199U (en) | 2010-09-29 | 2010-09-29 | Bridgeless power factor correcting circuit |
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CN2010205570278U CN201839199U (en) | 2010-09-29 | 2010-09-29 | Bridgeless power factor correcting circuit |
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CN201839199U true CN201839199U (en) | 2011-05-18 |
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CN2010205570278U Expired - Fee Related CN201839199U (en) | 2010-09-29 | 2010-09-29 | Bridgeless power factor correcting circuit |
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Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103117653A (en) * | 2011-11-16 | 2013-05-22 | 艾默生网络能源系统北美公司 | Sampling device and method of bridgeless positive feedback circuit (PFC) system |
CN103516192A (en) * | 2012-06-29 | 2014-01-15 | 艾默生网络能源系统北美公司 | Power-factor correction circuit, switching power supply module and power-factor correction method |
CN103916002A (en) * | 2014-03-28 | 2014-07-09 | 上海交通大学 | Common-anode half-bridge power factor correction circuit |
CN106685206A (en) * | 2016-08-31 | 2017-05-17 | 株式会社村田制作所 | Power-factor correction device and control method thereof and electronic device |
CN108683343A (en) * | 2018-07-03 | 2018-10-19 | 华南理工大学 | Pseudo- continuous conduction mode Buck-Boost non-bridge PFC converters |
CN109921626A (en) * | 2019-04-18 | 2019-06-21 | 珠海格力电器股份有限公司 | Power factor correction circuit, control method thereof and power factor correction device |
-
2010
- 2010-09-29 CN CN2010205570278U patent/CN201839199U/en not_active Expired - Fee Related
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103117653A (en) * | 2011-11-16 | 2013-05-22 | 艾默生网络能源系统北美公司 | Sampling device and method of bridgeless positive feedback circuit (PFC) system |
CN103117653B (en) * | 2011-11-16 | 2016-05-18 | 艾默生网络能源系统北美公司 | The sampling apparatus of non-bridge PFC system and method |
CN103516192A (en) * | 2012-06-29 | 2014-01-15 | 艾默生网络能源系统北美公司 | Power-factor correction circuit, switching power supply module and power-factor correction method |
CN103916002A (en) * | 2014-03-28 | 2014-07-09 | 上海交通大学 | Common-anode half-bridge power factor correction circuit |
CN106685206A (en) * | 2016-08-31 | 2017-05-17 | 株式会社村田制作所 | Power-factor correction device and control method thereof and electronic device |
CN108683343A (en) * | 2018-07-03 | 2018-10-19 | 华南理工大学 | Pseudo- continuous conduction mode Buck-Boost non-bridge PFC converters |
CN109921626A (en) * | 2019-04-18 | 2019-06-21 | 珠海格力电器股份有限公司 | Power factor correction circuit, control method thereof and power factor correction device |
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C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20110518 Termination date: 20190929 |
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CF01 | Termination of patent right due to non-payment of annual fee |