CN201828394U - Multi-rate compatible optical device sensitivity test device with adjustable working voltage - Google Patents
Multi-rate compatible optical device sensitivity test device with adjustable working voltage Download PDFInfo
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- CN201828394U CN201828394U CN2010292160442U CN201029216044U CN201828394U CN 201828394 U CN201828394 U CN 201828394U CN 2010292160442 U CN2010292160442 U CN 2010292160442U CN 201029216044 U CN201029216044 U CN 201029216044U CN 201828394 U CN201828394 U CN 201828394U
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Abstract
The utility model discloses a multi-rate compatible optical device sensitivity test device with adjustable working voltage. The multi-rate compatible optical device sensitivity test device is characterized by comprising a microprocessor, an avalanche photo-electric diode, an adjustable voltage drive circuit for providing working voltage for the avalanche photo-electric diode, and a multi-rate clock chip for providing a multi-rate clock for the test device, wherein the avalanche photo-electric diode and the multi-rate clock chip are connected with the microprocessor; and the adjustable voltage drive circuit is formed by connecting a double-path temperature control resistor and a DC-DC converter, and the control end of the double-path temperature control resistor is connected with the microprocessor. The test device has good compatibility, the working voltage is adjustable and automatic measurement can be realized.
Description
Technical field
The utility model belongs to optical device sensitivity test technical field, relates to a kind of optical device sensibility testing arrangement with adjustable operating voltage and compatibility of multi-rate.
Background technology
TOSA (optical transmitting component), ROSA (light receiving element), BOSA (optical transceiving device) assembly take crucial status as the important component part in the optical active component in the broadband network field, it provides the major function of the integrated module of optical transceiver, has also occupied the prime cost of optical module.The sensitivity index of receiving device is as one of important performance assessment criteria of the integrated module of optical transceiver, decision when being OSA (optical device) and producing, the sensitivity test problem that needs emphasis to consider.The sensitivity test circuit board of design should satisfy 4 conditions: the first, can compatible APD (avalanche photodide) and the PIN[photodetector] two kinds of PD Chip[photodiode chips] test; The second, product test that can compatible different rates; The 3rd, have adjustability, can realize automatic test; The 4th, good stability.
Existing optical device sensibility testing arrangement, the operating voltage of snowslide light emitting diode (APD) is non-adjustable and operating rate system is single, poor compatibility, automaticity is poor.Be necessary existing optical device sensibility testing arrangement is improved.
The utility model content
The utility model wants the technical solution problem to provide a kind of optical device sensibility testing arrangement with adjustable operating voltage and compatibility of multi-rate, and this proving installation compatibility is good, work voltage regulation, can realize automatic measurement.
The utility model is to solve the problems of the technologies described above the technical scheme that is adopted to be:
A kind of optical device sensibility testing arrangement with adjustable operating voltage and compatibility of multi-rate, it is characterized in that, comprise microprocessor, avalanche photodide, the adjustable voltage driving circuit of operating voltage be provided and be used to proving installation that many speed clock chip of multiple speed clock is provided for avalanche photodide; Described avalanche photodide all is connected with microprocessor with many speed clock chip; Described adjustable voltage driving circuit is formed by connecting by two-way temperature resistance and DC-DC converter; The control end of described two-way temperature resistance is connected with microprocessor.
Described many speed clock chip adopts the MAX3872 chip, and the two-way temperature resistance adopts the DS1859 chip, and the DC-DC converter adopts the MAX5026PWM chip.
The beneficial effects of the utility model:
Optical device sensibility testing arrangement with adjustable operating voltage and compatibility of multi-rate of the present utility model, the operating voltage that adopts the adjustable voltage driving circuit to regulate avalanche photodide, the adjustable voltage driving circuit is formed by connecting by two-way temperature resistance and DC-DC converter; Described two-way temperature resistance is controlled by microprocessor, just can be by the performance of microprocessor based on the automatic test light device of programmed control, and therefore, this device has the advantage of operating voltage (test voltage) adjustability and automatic test.In addition, adopt many speed clock chip to provide the clock of multiple speed, can test polytype product for proving installation, compatible good.
Description of drawings
Fig. 1 is a general structure synoptic diagram of the present utility model.
Embodiment
The utility model is described in further detail below in conjunction with the drawings and specific embodiments.
Embodiment 1:
As shown in Figure 1, a kind of optical device sensibility testing arrangement with adjustable operating voltage and compatibility of multi-rate, it is characterized in that, comprise microprocessor, avalanche photodide, the adjustable voltage driving circuit of operating voltage be provided and be used to proving installation that many speed clock chip of multiple speed clock is provided for avalanche photodide; Described avalanche photodide all is connected with microprocessor with many speed clock chip; Described adjustable voltage driving circuit is formed by connecting by two-way temperature resistance and DC-DC converter; The control end of described two-way temperature resistance is connected with microprocessor.Described many speed clock chip adopts the MAX3872 chip, and the two-way temperature resistance adopts the DS1859 chip, and the DC-DC converter adopts the MAX5026PWM chip.
Present embodiment is characterised in that, adopts MAX5026PWM step-up DC-DC converter+DS1859 two-way temperature resistance to realize software adjustment APD operating voltage;
Adopt MAX3872 many speed clock and data to recover the sensitivity test scheme that IC realizes compatibility of multi-rate.
The MAX5026 chip can pass through external feedback resistance (being realized by DS1859) and realize the voltage free adjustment in the 30V.When practical application, computing machine is by SDA and the SCL pin of software (working out with Labview) control DS1859, to realize the variable resistor output of digital regulation resistance DS1859HI pin, the resistance of output links to each other with the FB pin position of MAX5026, realizes adjusting and the control of Vapd (being APD voltage).
In general, the integrated module of optical transceiver of 2.5G is not comprise the CDR[clock recovery] circuit, why introducing CDR chip MAX3872 on OSA sensitivity test circuit board especially mainly is for compatible and stable consideration.
Compatible: the frequency that can realize reference clock by pin RS1, RS2 in the chip and RATESET is selected.It is very easily that speed is provided with, and only need be provided with before the OSA sensitivity test, just can realize freely changing of OC-3, OC-12, OC-24, OC-48 and gigabit Ethernet (1.25Gbps/2.5Gbps).
Stability: the input data by clock re-timing after, clean data output can be provided, and recovered data and clock all adopt CML[chirp management laser technology] output, all have on the every line and have rear end, 50 Europe build-out resistor in the sheet, jitter performance is better than all SONET/SDH[Synchronous Digital Hierarchies] standard, therefore, the stability of sensitivity test can be protected by this chip.
Claims (2)
1. optical device sensibility testing arrangement with adjustable operating voltage and compatibility of multi-rate, it is characterized in that, comprise microprocessor, avalanche photodide, the adjustable voltage driving circuit of operating voltage be provided and be used to proving installation that many speed clock chip of multiple speed clock is provided for avalanche photodide; Described avalanche photodide all is connected with microprocessor with many speed clock chip; Described adjustable voltage driving circuit is formed by connecting by two-way temperature resistance and DC-DC converter; The control end of described two-way temperature resistance is connected with microprocessor.
2. the optical device sensibility testing arrangement with adjustable operating voltage and compatibility of multi-rate according to claim 1, it is characterized in that, described many speed clock chip adopts the MAX3872 chip, and the two-way temperature resistance adopts the DS1859 chip, and the DC-DC converter adopts the MAX5026PWM chip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010292160442U CN201828394U (en) | 2010-02-02 | 2010-02-02 | Multi-rate compatible optical device sensitivity test device with adjustable working voltage |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010292160442U CN201828394U (en) | 2010-02-02 | 2010-02-02 | Multi-rate compatible optical device sensitivity test device with adjustable working voltage |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN201828394U true CN201828394U (en) | 2011-05-11 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2010292160442U Expired - Lifetime CN201828394U (en) | 2010-02-02 | 2010-02-02 | Multi-rate compatible optical device sensitivity test device with adjustable working voltage |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN201828394U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109391251A (en) * | 2018-11-21 | 2019-02-26 | 深圳市亚派光电器件有限公司 | The driving circuit and device of avalanche photodide |
| US11843391B2 (en) | 2019-03-21 | 2023-12-12 | Huawei Technologies Co., Ltd. | Temperature feedback control apparatus, method, and system |
-
2010
- 2010-02-02 CN CN2010292160442U patent/CN201828394U/en not_active Expired - Lifetime
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109391251A (en) * | 2018-11-21 | 2019-02-26 | 深圳市亚派光电器件有限公司 | The driving circuit and device of avalanche photodide |
| CN109391251B (en) * | 2018-11-21 | 2024-04-19 | 深圳市亚派光电器件有限公司 | Avalanche photodiode driving circuit and device |
| US11843391B2 (en) | 2019-03-21 | 2023-12-12 | Huawei Technologies Co., Ltd. | Temperature feedback control apparatus, method, and system |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CX01 | Expiry of patent term | ||
| CX01 | Expiry of patent term |
Granted publication date: 20110511 |
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| DD01 | Delivery of document by public notice | ||
| DD01 | Delivery of document by public notice |
Addressee: SHENZHEN APAT OPTO-ELECTRONICS COMPONENTS Co.,Ltd. Document name: Notification of Expiration of Patent Right Duration |