CN201781260U - Power source protective circuit - Google Patents
Power source protective circuit Download PDFInfo
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- CN201781260U CN201781260U CN2010202962681U CN201020296268U CN201781260U CN 201781260 U CN201781260 U CN 201781260U CN 2010202962681 U CN2010202962681 U CN 2010202962681U CN 201020296268 U CN201020296268 U CN 201020296268U CN 201781260 U CN201781260 U CN 201781260U
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Abstract
A power source protective circuit is used for protecting a system power source of a network terminal access device, and comprises a low-voltage detection module, an overvoltage detection module, a protection module and a power source enable end. The low-voltage detection module consists of a first transistor and a second transistor, an emitter electrode of the first transistor is electrically connected with the system power source, a base electrode of the second transistor is electrically connected with a collector electrode of the first transistor, the overvoltage detection module comprises a third transistor, the protection module comprises a fourth transistor, a fifth transistor and a capacitor, an emitter electrode of the fourth transistor is simultaneously electrically connected to collector electrodes of the second transistor and the third transistor, one end of the capacitor is connected to the ground, the other end of the capacitor is simultaneously electrically connected to collector electrodes of the fourth transistor and the fifth transistor, and the power source protective circuit has functions of overvoltage and low-voltage protection.
Description
Technical field
The utility model is about a kind of power protecting circuit, particularly about a kind of power protecting circuit that is applied to network terminal access device.
Background technology
(set top box, STB), in the actual use of network terminal access device such as router, Chang Yinwei is subjected to the influence of various factors, causes its input voltage to produce the ANOMALOUS VARIATIONS of moment in set-top box.When input voltage moment raises, burn out easily network terminal access device inside integrated circuit (Integrate Circuit, IC); When input voltage moment reduces, then often cause the network terminal access device can't operate as normal.So in described network terminal access device, (Over VoltageProtection, OVP) (Under Voltage Protection, UVP) circuit is important for circuit and low-voltage variation to increase suitable overvoltage protection to power supply.
The utility model content
In view of this, be necessary to provide a kind of power protecting circuit with overvoltage protection and low-voltage variation function.
A kind of power protecting circuit, it is used to protect the system power supply of a network terminal access device, described power protecting circuit comprises a low pressure detection module, one overvoltage detection module, one protection module and a power enable end, described low pressure detection module comprises a first transistor and a transistor seconds, the emitter-base bandgap grading of described the first transistor is electrically connected at system power supply, the base stage of described transistor seconds is electrically connected at the collection utmost point of the first transistor, described overvoltage detection module comprises one the 3rd transistor, described protection module comprises one the 4th transistor, one the 5th transistor and an electric capacity, the described the 4th transistorized emitter-base bandgap grading is electrically connected at the collection utmost point and the 3rd transistorized collection utmost point of transistor seconds simultaneously, described electric capacity one end ground connection, the other end is electrically connected at the 4th transistorized base stage and the 5th transistorized collection utmost point simultaneously, described power enable end is in order to the break-make of control system power supply, it is electrically connected at the 4th transistorized collection utmost point and the 5th transistorized base stage simultaneously, when the system power supply voltage instantaneous is crossed when low, the first transistor conducting, transistor seconds ends, the 4th transistor turns, the 5th transistor charges to electric capacity, electric capacity is the discharge of the 4th transistor, so that the power enable end passes through the discharge of the 4th transistor, and then turn-off system power supply; When the system power supply voltage instantaneous is too high, the 3rd transistor turns, the 4th transistor turns, the 5th transistor charges to electric capacity, electric capacity is the discharge of the 4th transistor, so that the power enable end passes through the 4th transistor and the discharge of the 3rd transistor, and then turn-offs system power supply.
Preferably, described the first transistor, transistor seconds and the 5th transistor are the bipolar junction transistor of positive-negative-positive, and described the 3rd transistor and the 4th transistor are the bipolar junction transistor of NPN type.
Preferably, described low pressure detection module also comprises one first resistance, one second resistance, one the 3rd resistance, one the 4th resistance and one the 5th resistance, described first resistance and second resistance string are coupled between system power supply and the ground, described the 3rd resistance one end is electrically connected between first resistance and second resistance, the other end is electrically connected at the base stage of the first transistor, the 4th resistance and the 5th resistance one end are electrically connected at the collection utmost point of the first transistor and the collection utmost point of transistor seconds, the equal ground connection of the other end respectively.
Preferably, described overvoltage detection module also comprises one the 6th resistance and one the 7th resistance, described the 6th resistance one end is electrically connected at system power supply, the other end of described the 7th resistance one end and the 6th resistance electrically connects, other end ground connection, the described the 3rd transistorized base stage is electrically connected between the 6th resistance and the 7th resistance.
Preferably; described protection module also comprises one the 8th resistance and one the 9th resistance; described the 8th resistance is electrically connected between the 4th transistorized collection utmost point and the system power supply, and described the 9th resistance is electrically connected between the 4th transistorized emitter-base bandgap grading and the base stage, and passes through capacity earth.
Preferably, described protection module also comprises 1 the tenth resistance and 1 the 11 resistance, and described the tenth resistance and the 11 resistance string are coupled between system power supply and the ground, and described the 5th transistor is electrically connected between the tenth resistance and the 11 resistance.
Preferably, described power protecting circuit also comprises system's Enable Pin, and described system Enable Pin level is effective, and it electrically connects the collection utmost point and the 3rd transistorized collection utmost point with transistor seconds simultaneously.
Preferably, described system Enable Pin starts in order to Control Network terminal access device or closes, and when system's Enable Pin low level enabled, described network terminal access device was closed; When system's Enable Pin high level did not enable, network terminal access device started.
Compared to prior art; described power protecting circuit is by low pressure detection module and overvoltage detection module detection system supply voltage; with conducting the 4th transistor; and make the 4th transistor continue conducting by the 5th transistor and electric capacity; and then the power enable terminal potential is descended, to turn-off system power supply.This power protecting circuit has overvoltage, low-voltage variation function.
Description of drawings
Fig. 1 is the circuit diagram of the utility model preferred embodiment power protecting circuit.
The main element symbol description
Power protecting circuit 100
Low pressure detection module 10
System power supply VCC
Reference power source VRef
The Enable Pin RST of system
Power enable end VCC-EN
First resistance R 1
Second resistance R 2
The 3rd resistance R 3
The 4th resistance R 4
The 5th resistance R 5
The 6th resistance R 6
The 7th resistance R 7
The 8th resistance R 8
The 9th resistance R 9
The tenth resistance R 10
The 11 resistance R 11
The first transistor Q1
Transistor seconds Q2
The 3rd transistor Q3
The 4th transistor Q4
The 5th transistor Q5
Capacitor C
Node A, B, D
Embodiment
See also Fig. 1, the utility model discloses a kind of power protecting circuit 100, it is applicable to network terminal access devices such as STB or router.Required voltage is provided by a system power supply VCC and a reference power source VRef during these power protecting circuit 100 work; in the present embodiment; setting this reference power source VRef is 2.5V; this system power supply VCC ideal operation voltage is 3.3V; the normal working voltage scope is 2.9-4.2V; the overvoltage scope is greater than 4.2V, and the low tension scope is less than 2.9V.
This power protecting circuit 100 comprises a low pressure detection module 10, an overvoltage detection module 30, an Enable Pin RST of system, a protection module 50 and a power enable end VCC-EN.
This low pressure detection module 10 comprises one first resistance R 1, one second resistance R 2, one the 3rd resistance R 3, a first transistor Q1, one the 4th resistance R 4, a transistor seconds Q2 and one the 5th resistance R 5.This first resistance R 1 and second resistance R 2 are series between system power supply VCC and the ground, and wherein first resistance R, 1 one ends are electrically connected at system power supply VCC, and second resistance R, 2 one end ground connection form a node A between this first resistance R 1 and second resistance R 2.In the present embodiment, by adjusting the resistance value of first resistance R 1 and second resistance R 2, when making system power supply VCC be in low voltage range (less than 2.9V), the voltage at node A place is less than 1.8V.The 3rd resistance R 3 is electrically connected between the base stage of node A and the first transistor Q1.This first transistor Q1 is the bipolar junction transistor of a positive-negative-positive, and its emitter-base bandgap grading and reference power source VRef electrically connect, and the collection utmost point is by the 4th resistance R 4 ground connection.This transistor seconds Q2 is the bipolar junction transistor of a positive-negative-positive, and its emitter-base bandgap grading and reference power source VRef electrically connect, and the collection utmost point of base stage and the first transistor Q1 electrically connects, and the collection utmost point is by the 5th resistance R 5 ground connection.
This overvoltage detection module 30 comprises one the 6th resistance R 6, one the 7th resistance R 7 and one the 3rd transistor Q3.The 6th resistance R 6 one ends are electrically connected at system power supply VCC, and the other end of the 7th resistance R 7 one ends and the 6th resistance R 6 electrically connects, and forms a Node B, other end ground connection.In the present embodiment, by adjusting the resistance value of the 6th resistance R 6 and the 7th resistance R 7, when making system power supply VCC be in high voltage range (greater than 4.2V), the voltage at Node B place is greater than 0.65V.The 3rd transistor Q3 is the bipolar junction transistor of a NPN type, and its base stage is electrically connected at Node B, emitter grounding, and the collection utmost point of the collection utmost point and transistor seconds Q2 electrically connects.
The Enable Pin RST of this system electrically connects and the collection utmost point of transistor seconds Q2 and the collection utmost point of the 3rd transistor Q3 simultaneously.The Enable Pin RST of this system low level is effective, and its height Control Network terminal access device according to self level starts or closes.Specifically: when the Enable Pin RST of system enabled, network terminal access device was closed; When the Enable Pin RST of system did not enable, network terminal access device started.
This protection module 50 comprises one the 4th transistor Q4, one the 8th resistance R 8, a capacitor C, one the 9th resistance R 9, one the 5th transistor Q5,1 the tenth resistance R 10 and 1 the 11 resistance R 11.The 4th transistor Q4 is the bipolar junction transistor of a NPN type, and its collection utmost point is electrically connected at reference power source VRef by the 8th resistance R 8, and the collection utmost point of emitter-base bandgap grading and the 3rd transistor Q3 electrically connects, and base stage is by capacitor C ground connection.The 9th resistance R 9 is electrically connected between the emitter-base bandgap grading and base stage of the 4th transistor Q4.The 5th transistor Q5 is the bipolar junction transistor of a positive-negative-positive, and the base stage of its collection utmost point and the 4th transistor Q4 electrically connects, and the collection utmost point of base stage and the 4th transistor Q4 electrically connects.The tenth resistance R 10 and the 11 resistance R 11 are series between system power supply VCC and the ground, wherein the tenth resistance R 10 1 ends and system power supply VCC electrically connect, the 11 resistance R 11 ground connection, form a node D between the tenth resistance R 10 and the 11 resistance R 11, this node D is electrically connected at the emitter-base bandgap grading of the 5th transistor Q5.In the present embodiment, by adjusting the resistance value of the tenth resistance R 10 and the 11 resistance R 11, when making system power supply VCC be in normal working voltage scope (2.9V-4.2V), the voltage at node D place is less than 2.5V.
This power enable end VCC-EN is electrically connected at the base stage of the collection utmost point and the 5th transistor Q5 of the 4th transistor Q4 simultaneously.When the voltage of this power enable end VCC-EN was 0V, shutdown system power supply VCC then was to shield.Usually, existing diverter switch can be born the effect of this power enable end VCC-EN.
Below magnitude of voltage by system power supply VCC change the operation principle that power protecting circuit 100 of the present utility model is described:
1. when system power supply VCC started, its magnitude of voltage progressively rose to 2.9V by 0V.At this moment, the voltage at node A place is less than 1.8V, the first transistor Q1 conducting, and the collector volatge of the first transistor Q1 is 2.3V (2.5V-0.2V), because the collector volatge of the first transistor Q1 equals the base voltage of transistor seconds Q2, so transistor seconds Q2 ends.The Enable Pin RS T of system is in the low level enabled state by the 5th resistance R 5 ground connection, and Control Network terminal access device does not start.Because the voltage at Node B place is less than 0.65V, so the 3rd transistor Q3 ends at this moment.Therefore capacitor C can not be the base stage charging of the 4th transistor Q4 the time, so the time the 4th transistor Q4 end.Because voltage=reference power source VRef=2.5V of power enable end VCC-EN, and greater than the voltage at node D place, so the 5th transistor Q5 also ends.
2. during system power supply VCC operate as normal, its magnitude of voltage is 2.9V-4.2V.At this moment, the voltage at node A place is greater than 1.8V, and the first transistor Q1 ends, and the collector volatge of the first transistor Q1 is 0V, so transistor seconds Q2 conducting.The voltage of the Enable Pin RST of system and the collector volatge of transistor seconds Q2 be (2.5-0.2=2.3V) quite, and this moment, the Enable Pin RST of system did not enable, and network terminal access device begins operate as normal.Because the voltage at Node B place is still less than 0.65V, so the 3rd transistor Q3 ends at this moment.Because the emitter-base bandgap grading of the 4th transistor Q4 and the voltage of base stage are 2.3V, the 4th transistor Q4 ends, capacitor C charging this moment.Because voltage=2.5V of voltage=reference power source VRef of power enable end VCC-EN, and greater than the voltage at node D place, so the 5th transistor Q5 still ends.
3. when system power supply VCC voltage instantaneous uprised, its magnitude of voltage was greater than 4.2V.At this moment, the voltage at node A place is greater than 1.8V, and the first transistor Q1 ends, transistor seconds Q2 conducting.Because the voltage at Node B place is greater than 0.65V at this moment, so the 3rd transistor Q3 conducting, the Enable Pin RST of system is by the collection utmost point and the emitter-base bandgap grading discharge of the 3rd transistor Q3, and its magnitude of voltage becomes QV from 2.3V, this moment, the Enable Pin RST of system enabled, and network terminal access device is closed.The voltage of the emitter-base bandgap grading of the 4th transistor Q4 also is reduced to 0V at this moment, because this moment, capacitor C was discharged to the base stage of the 4th transistor Q4, so that the 4th transistor Q4 conducting.After the 4th transistor Q4 conducting, the voltage of power enable end VCC-EN is by the 4th transistor Q4, the 3rd transistor Q3 discharge, and voltage descends so that the 5th transistor Q5 conducting.After the 5th transistor Q5 conducting; it recharges to capacitor C by the collection utmost point; then make capacitor C continue to discharge to keep the 4th transistor Q4 conducting to the base stage of the 4th transistor Q4; and finally make the voltage of power enable end VCC-EN drop to 0V; final power enable end VCC-EN enables to turn off system power supply VCC, to shield.
4. during system power supply VCC voltage instantaneous step-down, its magnitude of voltage is less than 2.9V.This moment node A place voltage less than 1.8V, the first transistor Q1 conducting, transistor seconds Q2 ends, the voltage of the Enable Pin RST of system is 0V, network terminal access device is closed.Since this moment the Node B place voltage less than 0.65V, so the 3rd transistor Q3 ends, this moment, the voltage of emitter-base bandgap grading of the 4th transistor Q4 also was reduced to 0V, because this moment, capacitor C was discharged to the base stage of the 4th transistor Q4, so that the 4th transistor Q4 conducting.After the 4th transistor Q4 conducting, the voltage of power enable end VCC-EN is by the 4th transistor Q4 and 5 discharges of the 5th resistance R, and its voltage descends so that the 5th transistor Q5 conducting.After the 5th transistor Q5 conducting; it recharges to capacitor C by the collection utmost point; then make capacitor C continue to discharge to keep the 4th transistor Q4 conducting to the base stage of the 4th transistor Q4; and finally make the voltage of power enable end VCC-EN drop to 0V; final power enable end VCC-EN enables to turn off system power supply VCC, to shield.
Be appreciated that each parameter values in the utility model power protecting circuit 100 all is not limited to described in the embodiment, when being 5V as the ideal operation magnitude of voltage as system power supply VCC, its corresponding overvoltage scope and low tension scope all can be done suitable variation.
Power protecting circuit described in the utility model 100 by low pressure detection module 10 and overvoltage detection module 30 respectively when low-voltage and overvoltage; make the 4th transistor Q4 conducting; and be its charging by capacitor C; and then lasting conducting; and finally make power enable end VCC-EN enable to turn off system power supply VCC, to shield.This power protecting circuit 100 can be under the voltage jump situation protecting network terminal access device effectively.
Claims (8)
1. power protecting circuit, it is used to protect the system power supply of a network terminal access device, it is characterized in that: described power protecting circuit comprises a low pressure detection module, one overvoltage detection module, one protection module and a power enable end, described low pressure detection module comprises a first transistor and a transistor seconds, the emitter-base bandgap grading of described the first transistor is electrically connected at system power supply, the base stage of described transistor seconds is electrically connected at the collection utmost point of the first transistor, described overvoltage detection module comprises one the 3rd transistor, described protection module comprises one the 4th transistor, one the 5th transistor and an electric capacity, the described the 4th transistorized emitter-base bandgap grading is electrically connected at the collection utmost point and the 3rd transistorized collection utmost point of transistor seconds simultaneously, described electric capacity one end ground connection, the other end is electrically connected at the 4th transistorized base stage and the 5th transistorized collection utmost point simultaneously, described power enable end is in order to the break-make of control system power supply, it is electrically connected at the 4th transistorized collection utmost point and the 5th transistorized base stage simultaneously, when the system power supply voltage instantaneous is crossed when low, the first transistor conducting, transistor seconds ends, the 4th transistor turns, the 5th transistor charges to electric capacity, electric capacity is the discharge of the 4th transistor, so that the power enable end passes through the discharge of the 4th transistor, and then turn-off system power supply; When the system power supply voltage instantaneous is too high, the 3rd transistor turns, the 4th transistor turns, the 5th transistor charges to electric capacity, electric capacity is the discharge of the 4th transistor, so that the power enable end passes through the 4th transistor and the discharge of the 3rd transistor, and then turn-offs system power supply.
2. power protecting circuit as claimed in claim 1 is characterized in that: described the first transistor, transistor seconds and the 5th transistor are the bipolar junction transistor of positive-negative-positive, and described the 3rd transistor and the 4th transistor are the bipolar junction transistor of NPN type.
3. power protecting circuit as claimed in claim 1; it is characterized in that: described low pressure detection module also comprises one first resistance, one second resistance, one the 3rd resistance, one the 4th resistance and one the 5th resistance; described first resistance and second resistance string are coupled between system power supply and the ground; described the 3rd resistance one end is electrically connected between first resistance and second resistance; the other end is electrically connected at the base stage of the first transistor; the 4th resistance and the 5th resistance one end are electrically connected at the collection utmost point of the first transistor and the collection utmost point of transistor seconds, the equal ground connection of the other end respectively.
4. power protecting circuit as claimed in claim 1; it is characterized in that: described overvoltage detection module also comprises one the 6th resistance and one the 7th resistance; described the 6th resistance one end is electrically connected at system power supply; the other end of described the 7th resistance one end and the 6th resistance electrically connects; other end ground connection, the described the 3rd transistorized base stage is electrically connected between the 6th resistance and the 7th resistance.
5. power protecting circuit as claimed in claim 1; it is characterized in that: described protection module also comprises one the 8th resistance and one the 9th resistance; described the 8th resistance is electrically connected between the 4th transistorized collection utmost point and the system power supply; described the 9th resistance is electrically connected between the 4th transistorized emitter-base bandgap grading and the base stage, and passes through capacity earth.
6. power protecting circuit as claimed in claim 1; it is characterized in that: described protection module also comprises 1 the tenth resistance and 1 the 11 resistance; described the tenth resistance and the 11 resistance string are coupled between system power supply and the ground, and described the 5th transistor is electrically connected between the tenth resistance and the 11 resistance.
7. power protecting circuit as claimed in claim 1 is characterized in that: described power protecting circuit also comprises system's Enable Pin, and described system Enable Pin level is effective, and it electrically connects the collection utmost point and the 3rd transistorized collection utmost point with transistor seconds simultaneously.
8. power protecting circuit as claimed in claim 7 is characterized in that: described system Enable Pin starts in order to Control Network terminal access device or closes, and when system's Enable Pin low level enabled, described network terminal access device was closed; When system's Enable Pin high level did not enable, network terminal access device started.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010202962681U CN201781260U (en) | 2010-08-18 | 2010-08-18 | Power source protective circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010202962681U CN201781260U (en) | 2010-08-18 | 2010-08-18 | Power source protective circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN201781260U true CN201781260U (en) | 2011-03-30 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2010202962681U Expired - Fee Related CN201781260U (en) | 2010-08-18 | 2010-08-18 | Power source protective circuit |
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| Country | Link |
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| CN (1) | CN201781260U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102508011A (en) * | 2011-09-28 | 2012-06-20 | 青岛海信移动通信技术股份有限公司 | Overvoltage and no-voltage detection circuit and testing device |
-
2010
- 2010-08-18 CN CN2010202962681U patent/CN201781260U/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102508011A (en) * | 2011-09-28 | 2012-06-20 | 青岛海信移动通信技术股份有限公司 | Overvoltage and no-voltage detection circuit and testing device |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20110330 Termination date: 20140818 |
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| EXPY | Termination of patent right or utility model |