CN109995331A - A kind of voltage regulator circuit for thering is soft start to protect - Google Patents
A kind of voltage regulator circuit for thering is soft start to protect Download PDFInfo
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- CN109995331A CN109995331A CN201711481135.4A CN201711481135A CN109995331A CN 109995331 A CN109995331 A CN 109995331A CN 201711481135 A CN201711481135 A CN 201711481135A CN 109995331 A CN109995331 A CN 109995331A
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Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/30—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters
- H03F1/303—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters using a switching device
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/34—Negative-feedback-circuit arrangements with or without positive feedback
- H03F1/342—Negative-feedback-circuit arrangements with or without positive feedback in field-effect transistor amplifiers
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- Continuous-Control Power Sources That Use Transistors (AREA)
Abstract
It include error amplifier, output stage PMOS transistor, resistance, capacitor, soft start protection circuit and ground wire GND the present invention provides a kind of voltage regulator circuit for thering is soft start to protect; soft start protects the opening and closing of circuit only related with upper electro-detection reset signal; when being reset state when upper electro-detection reset signal, soft start protects circuit to open;When upper electro-detection reset signal for when exiting reset state; soft start protects circuit to close; therefore the problem that the voltage regulator circuit for having soft start to protect of the invention can effectively avoid the charging of VDD in external voltage VCC power up excessively high; and; during chip completes the steady operation powered on, soft start protects circuit not generate any influence to the normal work of voltage regulator circuit;And during chip completes the steady operation powered on, it is 0 that soft start, which protects circuit total power consumption,.
Description
Technical field
The present invention relates to Analogous Integrated Electronic Circuits technical field more particularly to a kind of voltage regulator circuit, specially one kind has soft open
The voltage regulator circuit of dynamic protection.
Background technique
The external power supply VCC range of integrated circuit is very wide, and a large amount of logic circuit of chip interior is all relatively low.Such as
External voltage range is 1.62 ~ 5.5V in application of IC cards, and the pressure resistance of logic circuit only has 1.6V or so under 130nm technique.
So needing voltage regulator circuit external power supply VCC, it is stabilized to a lower voltage value VDD, prevents logic circuit from occurring high
Press breakdown problem.The voltage regulator circuit of current techniques, as shown in Figure 1, being existing voltage regulator circuit structure figure, in the voltage regulator circuit
In, 101 be error amplifier, has 103 resistance, the series connection of 104 resistance between output voltage VDD to ground wire GND together, 103 He of resistance
Sampled voltage VDET is obtained among resistance 104,101 output signal VPG of error amplifier connects the top crown and output stage of capacitor 105
The grid of PMOS transistor 102,105 bottom crown of capacitor meet the drain electrode of VDD and output stage PMOS transistor 102, output stage PMOS
The source electrode of transistor 102 meets power supply VCC, sampled voltage VDET and reference voltage VREF and connects the positive and negative of error amplifier 101 respectively
Input terminal.When power supply VCC changes from 1.62 ~ 5.5V, which can export stable voltage VDD.
But during power supply VCC fast powering-up, since the capacitance on VPG is very big, and its initial potential is close
The current potential of 0V, such PMOS transistor 102 are in fully open state, and the current potential of VDD understands momentary charge to the electricity as VCC
Pressure, maximum value 5.5V, as shown in Fig. 2, voltage oscillogram when powering on for existing voltage regulator circuit, chip interior is a large amount of at this time
Logic circuit is likely to cause punch through damage.
Summary of the invention
In view of the above-mentioned deficiencies in the prior art, the object of the present invention is to provide a kind of pressure stabilizings for having soft start to protect
Circuit, to solve the problems, such as that VDD charges excessively high during external voltage VCC fast powering-up.
In order to reach above-mentioned technical purpose, the technical scheme adopted by the invention is that:
A kind of voltage regulator circuit for having soft start to protect includes error amplifier, output stage PMOS transistor, resistance, capacitor, soft opens
Dynamic protection circuit and ground wire GND, wherein output voltage error amplifier VDD to ground wire GND, in voltage end VDD to ground wire GND
Between there are two the above resistance to connect, sampled voltage VDET is obtained among series resistance, output voltage error amplifier signal connects electricity
The top crown of appearance and the grid of output stage PMOS transistor, capacitor bottom crown connect voltage end VDD and output stage PMOS transistor
Drain electrode, the source electrode of output stage PMOS transistor meet power supply VCC, sampled voltage VDET and reference voltage VREF and connect error amplification respectively
The positive-negative input end of device, soft start protection circuit connect externally input upper electro-detection reset signal, and soft start protects the defeated of circuit
Outlet is connected with the grid of output stage PMOS transistor, and the power supply of soft start protection circuit is connected with power supply VCC;
When the voltage regulator circuit works, upper electro-detection reset signal initial potential is 0V, powers on to reach in external voltage VCC and powers on
Detect reset signal test point voltage when, upper electro-detection reset signal through holding 0V for a period of time after, become VCC electricity
Pressure, during upper electro-detection reset signal is 0V, soft start protection circuit is constantly in working condition, and by error amplifier
Output point voltage is pulled upward to external voltage VCC value, during external voltage VCC fast powering-up, the grid of output stage PMOS transistor
Pole tension follows always external voltage VCC, and output stage PMOS transistor is constantly in off state.
Preferably, the soft start protection circuit includes the first PMOS transistor, the first NMOS transistor, the 2nd NMOS crystalline substance
Body pipe, the second PMOS transistor, 3rd resistor, the second capacitor, the first phase inverter, third PMOS transistor and the 4th PMOS are brilliant
Body pipe, wherein the grid of PMOS transistor, the grid of drain electrode and NMOS transistor, drain electrode, and the grid with PMOS transistor
Connection;305 upper end of drain electrode and 3rd resistor, the grid of PMOS transistor and the top crown of the second capacitor of PMOS transistor
Connection;The grid of 4th PMOS transistor connects the input terminal of electro-detection reset signal, the first phase inverter, source electrode and third
The drain electrode of PMOS transistor connects, and drain electrode connects the grid of output stage PMOS tube, and it is anti-that the grid of the second NMOS transistor connects first
The output end of phase device, drain electrode connect NMOS transistor source electrode, and NMOS tube grid connects the output end of the first phase inverter, and drain electrode connects first
The source electrode of NMOS transistor, power supply VCC connect the source electrode of third PMOS transistor, the second PMOS transistor, the first PMOS transistor,
Ground wire GND connects the source electrode of the bottom crown of the second capacitor, the lower end of 3rd resistor, the second NMOS transistor.
The present invention is due to using the above-mentioned voltage regulator circuit structure for having soft start to protect, wherein soft start protects circuit
Opening and closing are only related with upper electro-detection reset signal, and when being reset state when upper electro-detection reset signal, soft start is protected
Protection circuit is opened;When upper electro-detection reset signal for when exiting reset state, soft start protects circuit to close, obtained to have
Beneficial effect is the problem that can effectively avoid the charging of VDD in external voltage VCC power up excessively high;Also, it is completed in chip
During the steady operation powered on, soft start protects circuit not generate any influence to the normal work of voltage regulator circuit;And
During chip completes the steady operation powered on, it is 0 that soft start, which protects circuit total power consumption,.
The present invention will be further described with reference to the accompanying drawings and detailed description.
Detailed description of the invention
Fig. 1 is existing voltage regulator circuit structure figure.
Fig. 2 is voltage oscillogram when existing voltage regulator circuit powers on.
Fig. 3 is the voltage regulator circuit structure figure for having soft start to protect that the present invention is embodied.
Fig. 4 is the soft start protection circuit structure diagram that the present invention is embodied.
Fig. 5 is voltage oscillogram when the voltage regulator circuit for having soft start to protect that the present invention is embodied powers on.
Specific embodiment
As shown in figure 3, the voltage regulator circuit structure figure for thering is soft start to protect being embodied for the present invention.In the voltage regulator circuit
In, including error amplifier 201, output stage PMOS transistor 202, first resistor 203, second resistance 204, first capacitor 205,
Soft start is protected in circuit 206 and ground wire GND207, Fig. 3, and it is VPG_CTRL that soft start, which protects circuit 206, wherein error amplification
Device 201 output voltage VDD to ground wire GND207, between voltage end VDD to ground wire GND207, first resistor 203 and second resistance
204 connect, and sampled voltage VDET, 201 output voltage VPG of error amplifier are obtained among first resistor 203 and second resistance 204
The top crown of first capacitor 205 and the grid of output stage PMOS transistor 202 are connect, 205 bottom crown of first capacitor meets voltage end VDD
With the drain electrode of output stage PMOS transistor 202, the source electrode of output stage PMOS transistor 202 meets power supply VCC, sampled voltage VDET and
Reference voltage VREF connects the positive-negative input end of error amplifier 201 respectively, and soft start protection circuit 206 connects externally input power on
Reset signal POR_N is detected, the output end of soft start protection circuit 206 is connected with the grid of output stage PMOS transistor 202,
The power supply of soft start protection circuit 206 is connected with power supply VCC.
As shown in figure 4, protecting circuit structure diagram for the soft start that the present invention is embodied.The soft start protection circuit include
First PMOS transistor 301, the first NMOS transistor 302, the second NMOS transistor 303, the second PMOS transistor 304, third
Resistance 305, the second capacitor 306, the first phase inverter 307, third PMOS transistor 308, the 4th PMOS transistor 309 and ground wire
310, wherein grid with the first NMOS transistor 302 of the grid of the first PMOS transistor 301, drain electrode, drain electrode, and with the
The grid of two PMOS transistors 304 connects, 305 upper end drain electrode V1 and 3rd resistor of the second PMOS transistor 304, the 3rd PMOS
The connection of the top crown of the grid of transistor 308 and the second capacitor 306, the grid of the 4th PMOS transistor 309 connect electro-detection
The input terminal of reset signal POR_N, the first phase inverter 307, source electrode are connected with the drain electrode of third PMOS transistor 308, drain electrode
VPG connects the grid of output stage PMOS transistor 202, and 303 grid of the second NMOS transistor connects the output end of the first phase inverter 307,
Drain electrode connects 302 source electrode of the first NMOS transistor, and 303 grid of the second NMOS transistor connects the output end of the first phase inverter 307, drain electrode
302 source electrode of the first NMOS transistor is connect, power supply VCC connects third PMOS transistor 308, the second PMOS transistor 304, the first PMOS
The source electrode of transistor 301, ground wire GND310 connect the bottom crown of the second capacitor 306, the lower end of 3rd resistor 305, the 2nd NMOS crystalline substance
The source electrode of body pipe 303.
Upper electro-detection reset signal POR_N's has mature circuit, relative to the waveform of VCC, as shown in figure 5,
Voltage oscillogram when being powered on for the voltage regulator circuit for thering is soft start to protect that the present invention is embodied.When VCC fast powering-up, POR_
N is low;When VCC is greater than the detection threshold value of upper electro-detection reset signal POR_N, POR_N is still able to maintain the time of Tpor, this
Time is typically designed value in 10uS magnitude.
During POR_N=0V, VCC starts since VCC voltage is relatively low, VCC < Vtn+Vtp(Vtn in establishment process
For the threshold voltage of NMOS tube 302, Vtp is the threshold voltage of PMOS tube 301) when, 301, the 302 of diode connection are all in pass
Closed state, the image current value in 304 is also 0 at this time, and such V1 point voltage is since the drop-down effect of resistance 305 is 0V, in this way
PMOS tube 308 and 309 is all on state, so that VPG voltage has been pulled upward to VCC value, so that output stage PMOS tube
202 are in close state, and VDD is 0V at this time;
As VCC > Vtn+Vtp, electric current is begun to flow through in 301 and 302, there has also been image currents in 305.It is in design size,
So that the equivalent conducting resistance in 304 is the 1/4 of 305 resistance values, so that the current potential of capacitor V1 is slowly begun to ramp up
VCC voltage value.PMOS transistor 308 enters off state in this way.VPG starts not by the control of soft start protection circuit at this time
System is only controlled by error amplifier and starts to reduce, to export accurate vdd voltage value VDD.
As POR_N=VCC, upper electro-detection reset signal exits completely, and the grid voltage of PMOS tube 309 is VCC at this time,
POR_N is output to the grid of NMOS tube 303, voltage 0V after phase inverter.Such 309 and 303 all in shutdown shape
State.Simultaneously as 301 electric current has become 0A, then 304 obtained image currents are also 0A, i.e., entire soft start protection electricity
The electric current on road is all 0A.
The present invention is not limited to embodiment discussed above, the above description to specific embodiment is intended to retouch
State and illustrate technical solution of the present invention.The obvious transformation or substitution enlightened based on the present invention should also be as being considered
Fall into protection scope of the present invention;Above specific embodiment is used to disclose best implementation method of the invention, so that this
The those of ordinary skill in field can reach of the invention using numerous embodiments of the invention and a variety of alternatives
Purpose.
Claims (2)
1. a kind of voltage regulator circuit for thering is soft start to protect, which is characterized in that the voltage regulator circuit includes error amplifier, output stage
PMOS transistor, resistance, capacitor, soft start protection circuit and ground wire GND, wherein output voltage error amplifier VDD to ground wire
GND, there are two the above resistance to connect between voltage end VDD to ground wire GND, sampled voltage VDET is obtained among series resistance, accidentally
Poor amplifier output voltage signal connects the top crown of capacitor and the grid of output stage PMOS transistor, and capacitor bottom crown connects voltage end
The drain electrode of VDD and output stage PMOS transistor, the source electrode of output stage PMOS transistor connect power supply VCC, sampled voltage VDET and ginseng
The positive-negative input end that voltage VREF connects error amplifier respectively is examined, soft start protection circuit connects externally input upper electro-detection and resets
The output end of signal, soft start protection circuit is connected with the grid of output stage PMOS transistor, and soft start protects the electricity of circuit
Source is connected with power supply VCC;
When the voltage regulator circuit works, upper electro-detection reset signal initial potential is 0V, powers on to reach in external voltage VCC and powers on
Detect reset signal test point voltage when, upper electro-detection reset signal through holding 0V for a period of time after, become VCC electricity
Pressure, during upper electro-detection reset signal is 0V, soft start protection circuit is constantly in working condition, and by error amplifier
Output point voltage is pulled upward to external voltage VCC value, during external voltage VCC fast powering-up, the grid of output stage PMOS transistor
Pole tension follows always external voltage VCC, and output stage PMOS transistor is constantly in off state.
2. the voltage regulator circuit for thering is soft start to protect as described in claim 1, which is characterized in that the soft start protects circuit packet
Include the first PMOS transistor, the first NMOS transistor, the second NMOS transistor, the second PMOS transistor, 3rd resistor, the second electricity
Appearance, the first phase inverter, third PMOS transistor, the 4th PMOS transistor and ground wire GND, wherein the grid of PMOS transistor,
The grid of drain electrode and NMOS transistor, drain electrode, and connect with the grid of PMOS transistor, the drain electrode and third of PMOS transistor
The top crown of 305 upper end of resistance, the grid of PMOS transistor and the second capacitor connects;The grid of 4th PMOS transistor connects
The input terminal of upper electro-detection reset signal, the first phase inverter, source electrode are connected with the drain electrode of third PMOS transistor, and drain electrode connects
The grid of output stage PMOS tube, the grid of the second NMOS transistor connect the output end of the first phase inverter, and drain electrode connects NMOS crystal
Pipe source electrode, NMOS tube grid connect the output end of the first phase inverter, and drain electrode connects the source electrode of the first NMOS transistor, and power supply VCC connects the
The source electrode of three PMOS transistors, the second PMOS transistor, the first PMOS transistor, ground wire GND connect the bottom crown of the second capacitor,
The lower end of three resistance, the second NMOS transistor source electrode.
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CN201711481135.4A CN109995331B (en) | 2017-12-29 | 2017-12-29 | Voltage stabilizing circuit with soft start protection |
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CN201711481135.4A CN109995331B (en) | 2017-12-29 | 2017-12-29 | Voltage stabilizing circuit with soft start protection |
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Cited By (4)
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---|---|---|---|---|
CN112202433A (en) * | 2020-10-22 | 2021-01-08 | 联芸科技(杭州)有限公司 | Power-on reset circuit |
CN113418601A (en) * | 2021-08-23 | 2021-09-21 | 深圳市力子光电科技有限公司 | Optical power detection module |
CN113489300A (en) * | 2021-06-11 | 2021-10-08 | 深圳欧陆通电子股份有限公司 | Switch power supply capacitive load starting method and switch power supply |
CN117118418A (en) * | 2023-10-24 | 2023-11-24 | 成都爱旗科技有限公司 | Reset protection circuit |
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Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
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CN113489300A (en) * | 2021-06-11 | 2021-10-08 | 深圳欧陆通电子股份有限公司 | Switch power supply capacitive load starting method and switch power supply |
CN113418601A (en) * | 2021-08-23 | 2021-09-21 | 深圳市力子光电科技有限公司 | Optical power detection module |
CN117118418A (en) * | 2023-10-24 | 2023-11-24 | 成都爱旗科技有限公司 | Reset protection circuit |
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