CN201773350U - Computer master control board power supply management module for PCTV integrated machine - Google Patents
Computer master control board power supply management module for PCTV integrated machine Download PDFInfo
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- CN201773350U CN201773350U CN2010201277502U CN201020127750U CN201773350U CN 201773350 U CN201773350 U CN 201773350U CN 2010201277502 U CN2010201277502 U CN 2010201277502U CN 201020127750 U CN201020127750 U CN 201020127750U CN 201773350 U CN201773350 U CN 201773350U
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Abstract
The utility model relates to a computer master control board power supply management module for a personal computer television (PCTV) integrated machine. The computer master control board power supply management module comprises a main board and a power supply circuit connected with the input end of the main board; a delay circuit connected with the output end of the power supply circuit and a chip programmable logic device (CPLD) connected with the output end of the delay circuit are respectively arranged in the main board, so a control signal is sent to the CPLD by utilizing a hardware circuit positioned on the main board, and the CPLD controls the level state of the signal after acquiring the signal, combines and programs a plurality of signal software and outputs the control signal to the main board for startup and shutdown control; therefore, the aim of outputting the control signal to the main board for the startup and shutdown control can be realized by only modifying a software program and adjusting the conventional judgment mechanism of the program during designing, and the occurrence of illegal shutdown of a computer caused by misoperation can be effectively avoided on the premise of not adding production cost.
Description
[technical field]
The utility model relates to a kind of circuit module, specifically is meant a kind of computing machine master control borad power management module that is used for the PCTV all-in-one that is used for the dynamo-electric source domain of inserted computer.
[background technology]
Along with constantly advancing of science and technology, the function of inserted computer is more and more, performance is also more and more stronger, be accompanied by the use habit that multifunctional embedded computer that integrating forms not too meets most people, what make that strong functions often brings is loaded down with trivial details use and method of operating, under this background, after the use habit of a large number of users is carried out survey, control improves to power supply, makes it more meet user's use habit.Generally, the start of computer or shutdown all need to realize by button, but the user often is easy to careless mistake under the situation of computer operate as normal runs into switch key, cause the unexpected power down of computer in the operate as normal easily, make a lot of files lose, even more serious may stopping suddenly by industrial machine aborning, cause product line to stop production, output reduces.In order to prevent the appearance of above-mentioned analogue, general way is to set up in an over cap described switch key is built.To avoid the people be the shutdown that causes though this method can reach, and this method causes the complexity of die sinking to promote and increase the manufacturing cost of described product easily.
[utility model content]
Technical purpose of the present utility model be provide in order to solve the problem that above-mentioned prior art exists a kind of can be under the prerequisite of not setting up cost of products and the computing machine master control borad power management module that is used for the PCTV all-in-one that can effectively avoid maloperation to cause the problem of the illegal shutdown of computer to take place.
In order to realize above-mentioned technical matters, the utility model provides a kind of computing machine master control borad power management module of the PCTV of being used for all-in-one, it comprises mainboard and is connected in feed circuit on the mainboard input end, is respectively arranged with delay circuit that is connected with the feed circuit output terminal and the programmable chip module CPLD that is connected with the delay circuit output terminal in the mainboard.
According to above-mentioned major technique feature, described delay circuit comprises metal-oxide-semiconductor Q28, be connected in resistance R 406 and capacitor C 586 on the pin 3 of metal-oxide-semiconductor Q28, pin 2 ground connection of described metal-oxide-semiconductor Q28, be connected in the pin 1 triode Q29 of metal-oxide-semiconductor Q28, be connected in the resistance R 405 of triode Q29 emitter terminal, be connected in the resistance R 500 and the capacitor C 587 of the connection parallel with one another on the triode Q29 base terminal, one end of described resistance R 500 is connected with the input signal end, and an end of capacitor C 586 is connected with output signal end.
According to above-mentioned major technique feature, described programmable chip module CPLD comprises:
Logical circuit can be realized the logical circuit that the user is required;
The IO unit, the interface of the chip input and output that are used to programme;
Reservoir is used to preserve and carry out the program that the user configures.
According to above-mentioned major technique feature, described mainboard comprises:
Cpu chip is used for the core cell that computing machine is responsible for calculation process;
Interface chip is used to expand different interfaces;
Power management chip is used for the electrifying timing sequence of control main board each several part;
The internal memory particle, the scratchpad area (SPA) in the Computing process;
Display interface, be used for external display and a display interface intuitively is provided;
Network interface directly links to each other with INTERNET by network interface.
Useful technique effect of the present utility model: because of being respectively arranged with delay circuit that is connected with the feed circuit output terminal and the programmable chip module CPLD that is connected with the delay circuit output terminal in the mainboard, utilize the hardware circuit on the mainboard to transmit control signal to the programmable chip module, and the level state of control signal after the programmable chip module acquired signal, through to after the synthetic programming of a plurality of signal softwares, externally export control signal and do switching on and shutting down control again to mainboard; Therefore make and when design, only software program is made an amendment and the original judgment mechanism of adjustment program, can realize externally exporting control signal and do the purpose of switching on and shutting down control, therefore reach under the prerequisite of not setting up cost of products and can effectively avoid maloperation to cause the problem of the illegal shutdown of computer to take place to mainboard.
Below in conjunction with drawings and Examples, the technical solution of the utility model is described in further detail.
[description of drawings]
Fig. 1 is the frame principle figure of the computing machine master control borad power management module of a kind of PCTV of being used for all-in-one of the utility model.
Fig. 2 is the schematic diagram of delay circuit in the utility model.
[embodiment]
Please refer to Figure 1 and Figure 2, below in conjunction with a kind of computing machine master control borad power management module that is used for the PCTV all-in-one of specific embodiment explanation, it comprises mainboard, feed circuit, delay circuit and programmable chip module CPLD.In this enforcement, PC represents computing machine, and TV represents TV, and the PCTV all-in-one refers to the all-in-one of computing machine and TV.
Described mainboard comprises:
Cpu chip is used for the core cell that computing machine is responsible for calculation process;
Interface chip is used to expand different interfaces; Power management chip is used for the electrifying timing sequence of control main board each several part;
The internal memory particle, the scratchpad area (SPA) in the Computing process;
Display interface, be used for external display and a display interface intuitively is provided;
Network interface directly links to each other with INTERNET by network interface.
Described mainboard is to judge the action that realizes by doing switching on and shutting down by the state of gathering COME_OUT.
Described delay circuit comprises metal-oxide-semiconductor Q28, be connected in resistance R 406 and capacitor C 586 on the pin 3 of metal-oxide-semiconductor Q28, pin 2 ground connection of described metal-oxide-semiconductor Q28, be connected in the pin 1 triode Q29 of metal-oxide-semiconductor Q28, be connected in the resistance R 405 of triode Q29 emitter terminal, be connected in the resistance R 500 and the capacitor C 587 of the connection parallel with one another on the triode Q29 base terminal, one end of described resistance R 500 is connected with the input signal end, and an end of capacitor C 586 is connected with output signal end.As shown in Figure 2, the input signal end after the current limliting filtering of capacitor C 587, is done isolation through metal-oxide-semiconductor Q28, triode Q29 through resistance R 500, and adjusting output signal end, to get level be 3.3V.
Described programmable chip module CPLD comprises:
Logical circuit can be realized the logical circuit that the user is required;
The IO unit, the interface of the chip input and output that are used to programme;
Reservoir is used to preserve and carry out the program that the user configures.
Its action is: by calling the programmed logic circuit that configures in the storer, realize the logical circuit of user expectation, this logical circuit output input signal communicates by other the chip on IO unit and the mainboard.
Described delay circuit input end is connected with the output terminal of feed circuit, and the input end of described programmable chip module is connected with the output terminal of delay circuit, and described mainboard input end is connected with programmable chip module output terminal.
After appointment VCC signal in the feed circuit powers on, be input to delay circuit, described delay circuit through a time-delay buffer circuit after, promptly hardware is done pre-service for the first time to control signal; Provide an effective input signal (COME_IN) to the programmable chip module then.After the programmable chip inside modules processed this effective input signal (COME_IN), control output signal COME_OUT was transported to mainboard, and mainboard is done switching on and shutting down by the state of gathering effective output signal (COME_OUT) and judged.
The programmable chip module programming, in conjunction with a plurality of different conditions of computer on-off, S0 for example, S3, S4, S5 to input signal (COME_IN) programming, makes it at S0 then, S3, S4 exports the output signal (COME_OUT) of varying level respectively under each state of S5.Cause shutdown for fear of start back false triggering, software program is to off-mode (S4, S5) make definitions, make its only state of (S4, S5 state) detection input signal (COME_IN) before start, work as S4, after the S5 state-detection is high level to this signal, the programmable chip module is just exported a useful signal and is given mainboard, after mainboard is accepted this useful signal, and Auto Power On.After start (S0 state), the programmable chip module is no longer done detection to the state of input signal (COME_IN), and just after the start, input signal (COME_IN) can not influence open state for which kind of state.Because S4 is consistent with S5, so have only the definition of S4 herein.
Start process: the starting-up signal that feed circuit provide at first passes through delay circuit, be input to programmable chip module (CPLD) programming then, programmable chip module (CPLD) is inner to detect this input signal according to the program that configures, after detecting this signal and being high level, provide a stable starting-up signal to mainboard, mainboard is started shooting after obtaining this signal.
S0, S1, S3, S4 state: (S0, open state; S1, S3, S4 all are dormant states; ) after the mainboard start, setting is no longer done detection to this signal condition in programmable chip module (CPLD), and the influence that open state is caused is provided with the starting-up signal of avoiding feed circuit to provide.The setting of this function is not exert an influence mutually at the handoff procedure of TV functions and computer function for fear of computing machine and televisor all-in-one.
[0039] in sum, because of being respectively arranged with delay circuit that is connected with the feed circuit output terminal and the programmable chip module CPLD that is connected with the delay circuit output terminal in the mainboard, utilize the hardware circuit on the mainboard to transmit control signal to the programmable chip module, and the level state of control signal after the programmable chip module acquired signal, through to after the synthetic programming of a plurality of signal softwares, externally export control signal and do switching on and shutting down control again to mainboard; Therefore make and when design, only software program is made an amendment and the original judgment mechanism of adjustment program, can realize externally exporting control signal and do the purpose of switching on and shutting down control, therefore reach under the prerequisite of not setting up cost of products and can effectively avoid maloperation to cause the problem of the illegal shutdown of computer to take place to mainboard.
Claims (4)
1. computing machine master control borad power management module that is used for the PCTV all-in-one, it comprises mainboard and is connected in feed circuit on the mainboard input end, it is characterized in that: be respectively arranged with delay circuit that is connected with the feed circuit output terminal and the programmable chip module CPLD that is connected with the delay circuit output terminal in the mainboard.
2. a kind of computing machine master control borad power management module that is used for the PCTV all-in-one according to claim 1, it is characterized in that: described delay circuit comprises metal-oxide-semiconductor Q28, be connected in resistance R 406 and capacitor C 586 on the pin 3 of metal-oxide-semiconductor Q28, pin 2 ground connection of described metal-oxide-semiconductor Q28, be connected in the pin 1 triode Q29 of metal-oxide-semiconductor Q28, be connected in the resistance R 405 of triode Q29 emitter terminal, be connected in the resistance R 500 and the capacitor C 587 of the connection parallel with one another on the triode Q29 base terminal, one end of described resistance R 500 is connected with the input signal end, and an end of capacitor C 586 is connected with output signal end.
3. a kind of computing machine master control borad power management module that is used for the PCTV all-in-one according to claim 1, it is characterized in that: described programmable chip module CPLD comprises:
Logical circuit can be realized the logical circuit that the user is required;
The IO unit, the interface of the chip input and output that are used to programme;
Reservoir is used to preserve and carry out the program that the user configures.
4. a kind of computing machine master control borad power management module that is used for the PCTV all-in-one according to claim 1, it is characterized in that: described mainboard comprises:
Cpu chip is used for the core cell that computing machine is responsible for calculation process;
Interface chip is used to expand different interfaces;
Power management chip is used for the electrifying timing sequence of control main board each several part;
The internal memory particle, the scratchpad area (SPA) in the Computing process;
Display interface, be used for external display and a display interface intuitively is provided;
Network interface directly links to each other with INTERNET by network interface.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010201277502U CN201773350U (en) | 2010-03-10 | 2010-03-10 | Computer master control board power supply management module for PCTV integrated machine |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010201277502U CN201773350U (en) | 2010-03-10 | 2010-03-10 | Computer master control board power supply management module for PCTV integrated machine |
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| CN201773350U true CN201773350U (en) | 2011-03-23 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2010201277502U Expired - Fee Related CN201773350U (en) | 2010-03-10 | 2010-03-10 | Computer master control board power supply management module for PCTV integrated machine |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103713912A (en) * | 2012-09-29 | 2014-04-09 | 深圳市祈飞科技有限公司 | Automatic power on circuit of computer |
| CN103793251A (en) * | 2014-02-20 | 2014-05-14 | 山东超越数控电子有限公司 | Implementation method for universality of computer start logic |
| CN104679210A (en) * | 2015-03-17 | 2015-06-03 | 浪潮集团有限公司 | Device and method for powering on computer on basis of CPLD controller |
| CN111679649A (en) * | 2020-05-27 | 2020-09-18 | 深圳市元征科技股份有限公司 | Vehicle-mounted terminal starting method and device, terminal equipment and storage medium |
| CN115756132A (en) * | 2022-10-09 | 2023-03-07 | 深圳市晶存科技有限公司 | Method and system for automatic startup and storage medium |
-
2010
- 2010-03-10 CN CN2010201277502U patent/CN201773350U/en not_active Expired - Fee Related
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103713912A (en) * | 2012-09-29 | 2014-04-09 | 深圳市祈飞科技有限公司 | Automatic power on circuit of computer |
| CN103713912B (en) * | 2012-09-29 | 2017-11-24 | 深圳市祈飞科技有限公司 | A kind of computer automatic boot circuit |
| CN103793251A (en) * | 2014-02-20 | 2014-05-14 | 山东超越数控电子有限公司 | Implementation method for universality of computer start logic |
| CN104679210A (en) * | 2015-03-17 | 2015-06-03 | 浪潮集团有限公司 | Device and method for powering on computer on basis of CPLD controller |
| CN111679649A (en) * | 2020-05-27 | 2020-09-18 | 深圳市元征科技股份有限公司 | Vehicle-mounted terminal starting method and device, terminal equipment and storage medium |
| CN111679649B (en) * | 2020-05-27 | 2022-01-04 | 深圳市元征科技股份有限公司 | Vehicle-mounted terminal starting method and device, terminal equipment and storage medium |
| CN115756132A (en) * | 2022-10-09 | 2023-03-07 | 深圳市晶存科技有限公司 | Method and system for automatic startup and storage medium |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20110323 Termination date: 20180310 |