CN206601675U - Reset and factory reset two-in-one circuit - Google Patents

Abstract

The utility model provides to reset all passes through the positive pole of reset key connection power supply with factory reset two-in-one circuit, including reset circuit, factory reset circuit, the input of reset circuit and the input of factory reset circuit.The output end of reset circuit connects CPU reset I/O pins, and the output end of factory reset circuit connects CPU factory reset I/O pins.On CPU after electricity, reset key is pressed, performs and resets operation；On CPU before electricity, reset key is pressed, and presses power button simultaneously, factory reset operation is performed.Using the reset and factory reset two-in-one circuit, user can realize the function of switching on and shutting down, reset and factory reset, and the operating experience of user is greatly improved.

Description

Reset and factory reset two-in-one circuit

Technical field

The utility model is related to electronic circuit technology field, two-in-one with factory reset in particular to resetting Circuit.

Background technology

Tablet personal computer is a kind of small-sized, PC for being convenient for carrying, and basic input equipment is used as using touch-screen.With Increasingly perfect, the common volume adjusting key on former tablet personal computer of current touch screen operating function, the physical button such as camera button Gradually it is cancelled, corresponding keypress function is realized by user by operating touch screen.

The physical button of current tablet personal computers most of on the market only remains necessary power key and reset key, if flat Plate computer causes the collapse of tablet personal computer operating system not use normally, user can not also pass through touch-control due to user misoperation Screen enters configuration interface and performs factory reset, because volume adjusting secondary or physical bond is cancelled, leads to not by using volume Adjusting key and power key combine to realize the function of factory reset, cause domestic consumer can not repair panel computer system The problem of collapse.PC equipment can only be now connected by usb interfaces and carries out brush machine come recovery system, but brush machine needs are very special The correlation technique knowledge of industry, domestic consumer performs the operation of brush machine, it is easy to because maloperation causes tablet personal computer to become brick.In flat board On the premise of computer only remains with power key and reset key, in panel computer system collapse, user can not be entered by touch screen When configuration interface performs factory reset, the work(of factory reset how is realized using existing power key and reset key Can, it is a problem for needing in tablet personal computer design process to solve.

Utility model content

The purpose of this utility model is exactly to solve in the prior art, and existing tablet personal computer only remains power key and reset Key, can only realize switching on and shutting down and the function of resetting, it is impossible to the function of factory reset is realized by button, in system crash only Brush machine ability repair system, extreme influence user experience can be passed through.The utility model is provided to reset to dispatch from the factory with recovery and set Put two-in-one circuit, it is possible to achieve utilize the work(realizing factory reset and reset of combining of existing power key and reset key Energy.

To reach above-mentioned purpose, the technical scheme that the utility model is provided is：

The utility model, which is provided, to be resetted and factory reset two-in-one circuit, including reset circuit, factory reset The input of circuit, the input of the reset circuit and the factory reset circuit all connects power supply by reset key Positive pole；The output end of the reset circuit connects CPU reset I/O pins, the output end of the factory reset circuit Connect the factory reset I/O pins of the CPU.

After device power, reset key is pressed, the reset circuit produces the low level needed for the reset I/O pins Pulse signal, which triggers the equipment and performed, resets operation；Before device power, long-press reset key, the factory reset electricity Road produces the low level signal needed for the factory reset I/O pins, and when pressing power button, the equipment is cold to be opened After dynamic, CPU detects the low level signal, triggers the equipment and performs factory reset operation.

Further, the reset circuit includes electric capacity, the first phase inverter；One end of the electric capacity and described first anti-phase The input connection of device, the other end of the electric capacity is connected with the reset key, and the output end connection of the phase inverter is described CPU reset I/O pins.

Further, the factory reset circuit includes the second phase inverter；The input of second phase inverter with The reset key connection, the output end of second phase inverter connects the factory reset I/O pins of the CPU.

Further, first phase inverter includes：First NPN triode, the first current-limiting resistance and pull-up resistor；It is described The base stage of first NPN triode is connected to one end of the electric capacity, first NPN triode by first current-limiting resistance Grounded emitter, the colelctor electrode of first NPN triode is connected by the pull-up resistor with the positive pole of the power supply.

Further, the reset circuit also includes resetting IC chip, and the reset IC chip is connected to the reset I/O Between the output end of pin and the first phase inverter.

Further, the charge constant of the electric capacity is less than the duration that the reset key is pressed.

Further, second phase inverter includes the second NPN triode and the second current-limiting resistance, the 2nd NPN tri- The base stage of pole pipe is connected to one end of the reset key, the hair of second NPN triode by second current-limiting resistance Emitter grounding, the colelctor electrode of second NPN triode connects the factory reset I/O pins of the CPU.

Further, the reset IC chip specification is BL8509B-263DCRM.

Further, the power supply is constant pressure out-put supply, and the output voltage of the power supply is 3.3V.

Further, the electric capacity is chip ceramic capacitor.

The technical scheme provided using the utility model, compared with existing known technology, is had the advantages that：

(1) circuit physical button only retains power key and reset key.

(2) long-press or short-press can all produce reset signal.

(3) circuit is simple.

Brief description of the drawings

In order to illustrate more clearly of the technical scheme of the utility model embodiment, it will use below required in embodiment Accompanying drawing be briefly described, it will be appreciated that the following drawings illustrate only some embodiments of the present utility model, therefore should not be by Regard the restriction to scope as, for those of ordinary skill in the art, on the premise of not paying creative work, may be used also To obtain other related accompanying drawings according to these accompanying drawings.

Fig. 1 shows reset and the first circuit of factory reset two-in-one circuit of the utility model embodiment offer Schematic diagram；

Fig. 2 shows reset and the first structure of factory reset two-in-one circuit of the utility model embodiment offer Block diagram；

Fig. 3 shows reset and the second circuit of factory reset two-in-one circuit of the utility model embodiment offer Schematic diagram；

Fig. 4 shows reset and the second structure of factory reset two-in-one circuit of the utility model embodiment offer Block diagram.

Embodiment

Hereinafter, the various embodiments of the disclosure will be described more fully.The disclosure can have various embodiments, and It can adjust and change wherein.It should be understood, however, that：It is limited to spy disclosed herein in the absence of by the various embodiments of the disclosure Determine the intention of embodiment, but the disclosure should be interpreted as covering in the spirit and scope for the various embodiments for falling into the disclosure All adjustment, equivalent and/or alternative.

Hereinafter, the term " comprising " that can be used in the various embodiments of the disclosure or " may include " indicate disclosed Function, operation or the presence of element, and do not limit the increase of one or more functions, operation or element.In addition, such as existing Used in the various embodiments of the disclosure, term " comprising ", " having " and its cognate are meant only to represent special characteristic, number Word, step, operation, element, the combination of component or foregoing item, and be understood not to exclude first one or more other Feature, numeral, step, operation, element, the presence of the combination of component or foregoing item or increase one or more features, numeral, Step, operation, element, the possibility of the combination of component or foregoing item.

In the various embodiments of the disclosure, statement "or" or " in A or/and B at least one " include what is listed file names with Any combinations of word or all combinations." A or B " or " in A or/and B at least one " may include A, may include for example, statement B may include A and B both.

The statement (" first ", " second " etc.) used in the various embodiments of the disclosure can be modified to be implemented various Various element in example, but corresponding element can not be limited.For example, presented above be not intended to limit the suitable of the element Sequence and/or importance.The purpose presented above for being only used for differentiating an element and other elements.For example, the first user fills Put and indicate different user device with second user device, although the two is all user's set.For example, not departing from each of the disclosure In the case of the scope for planting embodiment, the first element is referred to alternatively as the second element, similarly, and the second element is also referred to as first Element.

It should be noted that：, can be by the first composition member if an element ' attach ' to another element by description Part is directly connected to the second element, and " connection " the 3rd can be constituted between the first element and the second element Element.On the contrary, when an element " being directly connected to " is arrived into another element, it will be appreciated that be in the first element And second the 3rd element is not present between element.

The term " user " used in the various embodiments of the disclosure, which may indicate that, to be used the people of electronic installation or uses electricity The device (for example, artificial intelligence electronic installation) of sub-device.

The term used in the various embodiments of the disclosure is only used for describing the purpose of specific embodiment and not anticipated In the various embodiments of the limitation disclosure.As used herein, singulative is intended to also include plural form, unless context is clear Chu it is indicated otherwise.Unless otherwise defined, all terms (including the technical term and scientific terminology) tool being otherwise used herein There is the implication identical implication that the various embodiment one skilled in the art with the disclosure are generally understood that.The term (term such as limited in the dictionary typically used) is to be interpreted as having and the situational meaning in correlative technology field Identical implication and it will be not construed as with Utopian implication or excessively formal implication, unless in the various of the disclosure It is clearly defined in embodiment.

Embodiment 1

Also referring to shown in Fig. 1 and Fig. 2, it is two-in-one with factory reset that the utility model embodiment provides reset Circuit, including reset circuit, factory reset circuit, the input of the reset circuit and the factory reset circuit Input all pass through reset key connect power supply positive pole.The power supply is constant pressure out-put supply, in the present embodiment, described The output voltage of power supply is 3.3V.The output voltage of power supply can be 5V in other embodiments.The output of the reset circuit End connection CPU reset I/O pins, the output end of the factory reset circuit connects the factory reset of the CPU I/O pins.

The reset circuit includes electric capacity, the first phase inverter；One end of the electric capacity and the input of first phase inverter End connection, the other end of the electric capacity is connected with the reset key, and the output end of the phase inverter connects the reset of the CPU I/O pins.

In a certain specific embodiment, first phase inverter includes NPN triode Q1, resistance R1 and R3, the NPN tri- Pole pipe Q1 base stage is connected to one end of the electric capacity C1 by resistance R3, and the grounded emitter of the NPN triode Q1 is described The colelctor electrode of NPN triode Q1 is connected by resistance R1 with the positive pole of the power supply.

The factory reset circuit includes the second phase inverter；The input of second phase inverter is pressed with the reset Key is connected, and the output end of second phase inverter connects the factory reset I/O pins of the CPU.

In a certain specific embodiment, second phase inverter includes NPN triode Q2 and resistance R2, the poles of NPN tri- Pipe Q2 base stage is connected to one end of the reset key by resistance R2, and the grounded emitter of the NPN triode Q2 is described NPN triode Q2 colelctor electrode connects the factory reset I/O pins of the CPU.

Most of cpu chip reset pins that current tablet personal computer is used all are the triggerings of low level pulse signal, are recovered Factory sets pin to be all low level signal triggering.

Be illustrated referring next to Fig. 1, after device power, not by reset key S1 in the case of, CPU reset I/O Pin is high level current potential, and the magnitude of voltage of the high level is 3.3V.Voltage at circuit node 2 is 0V, NPN triode Q1 Grounded emitter, the base stage of NPN triode Q1 is 0V with the voltage Vbe at emitter stage two ends, and NPN triode Q1 is in cut-off shape State.

When reset key S1 is pressed, the voltage at circuit node 2 is changed into the magnitude of voltage 3.3V of power supply from original 0V, this When circuit node 2 at level be driven high, capacitor C1 starts to be electrically charged, now electric capacity C1 equivalent to wire turn on, be carried in The voltage Vbe at NPN triode Q1 base stage and emitter stage two ends is much larger than conducting voltage, and NPN triode Q1 is in saturation state. The voltage Vce at NPN triode Q1 colelctor electrode and emitter stage two ends is approximately 0V.The level of the colelctor electrode of NPN triode Q1 is stood Drag down.

As capacitor C1 is gradually electrically charged, capacitor C1 both end voltages gradually increase, due to the voltage at circuit node 2 Remain unchanged, the base voltage of NPN triode Q1 is tapered into, when NPN triode Q1 base stage and the voltage Vbe at emitter stage two ends Less than conducting voltage, NPN triode Q1 can be triggered and be changed into cut-off state.After capacitor C1 charging completes, capacitor C1 is suitable In open circuit, the base current of NPN triode Q1 is 0, and this can also trigger NPN triode Q1 and be changed into cut-off state.Work as NPN triode When Q1 is changed into cut-off state, the level of the colelctor electrode of NPN triode Q1 is driven high again.

As the level of the colelctor electrode of NPN triode Q1 has original high level to be pulled low, and it is driven high, will produces A raw low level pulse signal, so the end of node 4 of circuit can produce the low level pulse letter needed for the reset I/O pins Number triggering equipment, which is performed, resets operation.

The charge constant of the electric capacity C1 is less than the duration that the reset key is pressed.No matter reset key S1 long-press When under lower or short-press, the voltage at circuit node 2 be able to can all be obtained by capacitor C1 and NPN triode Q1 a standard from 3.3V moves 0V to and returns 3.3V reset signals.The CPU receives the low level pulse reset signal, is in and crashes in equipment Or the situation of switching on and shutting down all can power-down rebooting.

After device power, not by reset key S1 in the case of, CPU factory reset I/O pins are high level electricity Position, the magnitude of voltage of the high level is 3.3V.Voltage at circuit node 2 is 0V, and NPN triode Q2 emitter stage is all grounded, NPN triode Q2 base stage is 0V with the voltage Vbe at emitter stage two ends, and NPN triode Q2 is in cut-off state.

When reset key S1 is pressed, the voltage at circuit node 2 is changed into the magnitude of voltage 3.3V of power supply from original 0V, this When circuit node 2 at level be driven high, be carried in the voltage Vbe at NPN triode Q2 base stages and emitter stage two ends much larger than leading Be powered pressure, and NPN triode Q2 is in saturation state.NPN triode Q2 colelctor electrodes and the voltage Vce at emitter stage two ends are approximately 0V.The voltage of NPN triode Q2 colelctor electrode is changed into 0V level from original 3.3V and is pulled low.So the end meeting of node 3 of circuit Produce the low level signal needed for the factory reset I/O pins.As long as reset key S1 is pressed always, the section of circuit The level at 3 ends of point is just low level always.If reset key S1 is once unclamp, the level at the end of node 3 of circuit is changing to High level.

Reset key S1 do normal reset function in use, after device power long-press or short-press reset key S1, electricity Source voltage is charged by reset key S1 to electric capacity C1, and because of the charge characteristic of electric capacity, the base input end of NPN triode Q1 can be obtained To a pulse voltage, this pulse voltage is anti-phase by NPN triode Q1, obtains the low level arteries and veins needed for a cpu reset Signal is rushed, low level pulse signal triggering CPU, which is performed, resets operation.Signals of the CPU to the end of factory reset I/O pins 3 Only just recognized in equipment cold start-up, be not recognize after start, thus do not interfere with normal reset and operated.

Reset key S1 does factory reset function in use, before equipment is not started shooting also according to reset key S1 not Put, because of capacitor C1 charge characteristic, the end of circuit node 4 can also obtain a low level pulse reset signal, but in shutdown Under state, the reset signal, without influence, is waited after this reset signal by power key starting device, started in equipment on equipment During be pressed always because of reset key S1, the high voltage of power supply is anti-phase by NPN triode Q2, and the end of circuit node 3 is low Level signal, at this moment CPU detect low level signal and be put into factory reset pattern.Factory reset pattern only exists Just detected during equipment cold start-up, and detect the LOW signal of more than 5 seconds and just enter factory reset pattern, other states All do not work.So factory reset wants long-press reset key S1 to reach default duration.

General reset potential is all low shown in cpu reset to produce by pressing reset key and unclamping reset key Required pulse signal is realized in embodiment in level pulse signal, the application by the charging of electric capacity.

Embodiment 2

Also referring to shown in Fig. 3 and Fig. 4, the utility model embodiment is in reset circuit on the basis of embodiment 1 In add reset IC chip, to improve the antijamming capability of reset circuit.

As shown in figure 3, it is described reset IC chip be connected to the reset I/O pins and the first phase inverter output end it Between.

Reset IC chip is added, CPU reseting performance can be mainly greatly improved, its principle is the voltage by determination It is worth (threshold value) and starts reset operation, while excluding the influence of instantaneous interference, CPU can be prevented in power initiation and the mistake of down periods Operation, it is ensured that data safety.

The rc reset mode stability extreme difference that typically uses, usually has by the situation for resetting no reaction, be by The experience that a period of time could reset.If during using electrification reset, easily producing reset unsuccessful.Electric capacity it is stability Compare sensitive, in particular surroundings, the level change width of reset is very big, causes chip to be failure to actuate, or under strong jamming Misoperation.So in the present embodiment using reset IC chip.

The BL8509B-263DCRM for resetting IC chip preferably 3 pins.

It will be appreciated by those skilled in the art that accompanying drawing is a schematic diagram for being preferable to carry out scene, module in accompanying drawing or Flow is not necessarily implemented necessary to the utility model.

It will be appreciated by those skilled in the art that the module in device in implement scene can be described according to implement scene into Row is distributed in the device of implement scene, can also carry out one or more dresses that respective change is disposed other than this implement scene In putting.The module of above-mentioned implement scene can be merged into a module, can also be further split into multiple submodule.

Above-mentioned the utility model sequence number is for illustration only, and the quality of implement scene is not represented.

Disclosed above is only several specific implementation scenes of the present utility model, and still, the utility model is not limited to This, the changes that any person skilled in the art can think of should all fall into protection domain of the present utility model.

Claims (10)

1. reset and factory reset two-in-one circuit, including reset circuit, factory reset circuit, it is characterised in that The input of the input of the reset circuit and the factory reset circuit is all connecting power supply just by reset key Pole；The output end of the reset circuit connects CPU reset I/O pins, the output end connection of the factory reset circuit The factory reset I/O pins of the CPU；

After device power, reset key is pressed, the reset circuit produces the low level pulse needed for the reset I/O pins Signal, which triggers the equipment and performed, resets operation；Before device power, long-press reset key, the factory reset circuit production Low level signal needed for the raw factory reset I/O pins, and when pressing power button, the equipment cold start-up it Afterwards, CPU detects the low level signal, triggers the equipment and performs factory reset operation.

2. circuit according to claim 1, it is characterised in that the reset circuit includes electric capacity, the first phase inverter；It is described One end of electric capacity is connected with the input of first phase inverter, and the other end of the electric capacity is connected with the reset key, institute The output end for stating phase inverter connects the reset I/O pins of the CPU.

3. circuit according to claim 1, it is characterised in that the factory reset circuit includes the second phase inverter； The input of second phase inverter is connected with the reset key, and the output end of second phase inverter connects the CPU's Factory reset I/O pins.

4. circuit according to claim 2, it is characterised in that first phase inverter includes：First NPN triode, One current-limiting resistance and pull-up resistor；The base stage of first NPN triode is connected to the electricity by first current-limiting resistance One end of appearance, the grounded emitter of first NPN triode, the colelctor electrode of first NPN triode passes through the pull-up Resistance is connected with the positive pole of the power supply.

5. circuit according to claim 2, it is characterised in that the reset circuit also includes resetting IC chip, described multiple Position IC chip is connected between the reset I/O pins and the output end of the first phase inverter.

6. circuit according to claim 2, it is characterised in that the charge constant of the electric capacity is less than the reset and pressed The duration that key is pressed.

7. circuit according to claim 3, it is characterised in that second phase inverter includes the second NPN triode and the Two current-limiting resistances, the base stage of second NPN triode is connected to the one of the reset key by second current-limiting resistance End, the grounded emitter of second NPN triode, the colelctor electrode of second NPN triode connects recovering for the CPU Factory sets I/O pins.

8. circuit according to claim 5, it is characterised in that the reset IC chip specification is BL8509B-263DCRM.

9. circuit according to claim 1, it is characterised in that the power supply is constant pressure out-put supply, the power supply it is defeated Go out voltage for 3.3V.

10. circuit according to claim 2, it is characterised in that the electric capacity is chip ceramic capacitor.