CN201726386U - Hyperchaos/chaos system universal analog circuit - Google Patents

Hyperchaos/chaos system universal analog circuit Download PDF

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Publication number
CN201726386U
CN201726386U CN 201020265640 CN201020265640U CN201726386U CN 201726386 U CN201726386 U CN 201726386U CN 201020265640 CN201020265640 CN 201020265640 CN 201020265640 U CN201020265640 U CN 201020265640U CN 201726386 U CN201726386 U CN 201726386U
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mouthfuls
interface
circuit
pin
analog circuit
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CN 201020265640
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王忠林
于祥
李建庆
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Binzhou University
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Binzhou University
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Abstract

The utility model relates to a hyperchaos/chaos system universal analog circuit comprising a chaos system universal analog circuit formed by connecting three same analog circuits or a hyperchaos system universal analog circuit formed by connecting four same analog circuits, wherein each analog circuit consists of a multiplying unit circuit and an addition, integration and inverting circuit. The analog circuit has the characteristics of not only having the flexibility of a manually-designed circuit, but also improving the reliability of the design circuit, and being capable of realizing three-dimensional chaos and four-dimensional hyperchaos system by one circuit.

Description

Hyperchaos/chaos system general-purpose simulation circuit
Technical field
The utility model relates to a kind of analog circuit, be particularly related to a kind of be used to utilize the proof that analog circuit realizes chaos/hyperchaotic system and the existence of chaos/hyperchaotic system, the chaos that is produced/hyperchaos signal can be widely used in the hyperchaos/chaos system general-purpose simulation circuit in fields such as information encryption, secure communication and input.
Background technology
Existing analog circuit realizes that the manual method of chaos/hyperchaos is too complicated, and reliability is lower, and the circuit form that existing analog circuit utilizes PCB to make is fixed, and the corresponding PCB circuit of chaos/hyperchaotic system uses dumb.
Summary of the invention
In view of the deficiency that prior art exists, the utility model provides a kind of hyperchaos/chaos system general-purpose simulation circuit.
The utility model for achieving the above object, the technical scheme of being taked is: a kind of hyperchaos/chaos system general-purpose simulation circuit is characterized in that: comprise chaos system general-purpose simulation circuit that is connected and composed by three identical analog circuits or the hyperchaotic system general-purpose simulation circuit that is connected and composed by four identical analog circuits; Described analog circuit is made up of multiplier circuit and addition, integration, negative circuit, 2 pin of multiplying module M1 in the described multiplier circuit, 4 pin, 6 pin ground connection, 8 pin connect positive supply, and 5 pin connect negative supply, and 7 pin join with 1 mouthful, 2 mouthfuls, 3 mouthfuls, 4 mouthfuls of interface J13 respectively; Described addition, integration, 3 pin of integrated operational amplifier U1 in the negative circuit, 5 pin, 10 pin, 12 pin ground connection, 4 pin connect positive supply, 11 pin connect negative supply, 6 pin connecting resistance RX4, the end of resistance R X3, the other end of resistance R X4 connects 7 pin of integrated operational amplifier U1 and 1 mouthful of interface J14 respectively, 2 mouthfuls, 3 mouthfuls, 4 mouthfuls, the other end of resistance R X3 connects 8 pin of integrated operational amplifier U1 respectively, 1 mouthful of interface J11,2 mouthfuls, 3 mouthfuls, the end of 4 mouthfuls and capacitor C X, the end of the other end connecting resistance RX2 of capacitor C X and 9 pin of integrated arithmetic unit U1,14 pin of another termination integrated operational amplifier U1 of resistance R X2 and the end of resistance R X1,13 pin and the adjustable resistance MRX1 of another termination integrated operational amplifier U1 of resistance R X1, adjustable resistance MRX2, adjustable resistance MRX3,2 ends of adjustable resistance MRX4,3 ends of adjustable resistance MRX1,8 mouthfuls of linking to each other with interface J12 of 1 end join, 3 ends of adjustable resistance MRX2,7 mouthfuls of linking to each other with interface J12 of 1 end join, 3 ends of adjustable resistance MRX3,6 mouthfuls of linking to each other with interface J12 of 1 end join 3 ends of adjustable resistance MRX4,5 mouthfuls of linking to each other with interface J12 of 1 end join.
Characteristics of the present utility model are: both had the flexibility of hand-designed circuit, improved the reliability of design circuit again, a kind of circuit can be realized, three-dimensional chaos and four-dimensional hyperchaotic system.
Description of drawings
Fig. 1 is a circuit diagram of the present utility model.
Fig. 2 is the utility model analog circuit figure.
Embodiment
As shown in Figure 2, hyperchaos/chaos system general-purpose simulation circuit comprises chaos system general-purpose simulation circuit that is connected and composed by three identical analog circuits or the hyperchaotic system general-purpose simulation circuit that is connected and composed by four identical analog circuits.Analog circuit is made up of multiplier circuit and addition, integration, negative circuit, 2 pin of multiplying module M1 in the multiplier circuit, 4 pin, 6 pin ground connection, 8 pin connect positive supply, and 5 pin connect negative supply, and 7 pin join with 1 mouthful, 2 mouthfuls, 3 mouthfuls, 4 mouthfuls of interface J13 respectively; Described addition, integration, 3 pin of integrated operational amplifier U1 in the negative circuit, 5 pin, 10 pin, 12 pin ground connection, 4 pin connect positive supply, 11 pin connect negative supply, 6 pin connecting resistance RX4, the end of resistance R X3, the other end of resistance R X4 connects 7 pin of integrated operational amplifier U1 and 1 mouthful of interface J14 respectively, 2 mouthfuls, 3 mouthfuls, 4 mouthfuls, the other end of resistance R X3 connects 8 pin of integrated operational amplifier U1 respectively, 1 mouthful of interface J11,2 mouthfuls, 3 mouthfuls, the end of 4 mouthfuls and capacitor C X, the end of the other end connecting resistance RX2 of capacitor C X and 9 pin of integrated arithmetic unit U1,14 pin of another termination integrated operational amplifier U1 of resistance R X2 and the end of resistance R X1,13 pin and the adjustable resistance MRX1 of another termination integrated operational amplifier U1 of resistance R X1, adjustable resistance MRX2, adjustable resistance MRX3,2 ends of adjustable resistance MRX4,3 ends of adjustable resistance MRX1,8 mouthfuls of linking to each other with interface J12 of 1 end join, 3 ends of adjustable resistance MRX2,7 mouthfuls of linking to each other with interface J12 of 1 end join, 3 ends of adjustable resistance MRX3,6 mouthfuls of linking to each other with interface J12 of 1 end join 3 ends of adjustable resistance MRX4,5 mouthfuls of linking to each other with interface J12 of 1 end join.
As shown in Figure 1, determine that according to the chaos equation chaos system general-purpose simulation circuit connecting mode is as follows:
2 mouthfuls of 4 mouthfuls of meeting this circuit interface J14 of interface J12 in 1 mouthful of 4 mouthful of meeting the 3rd interface J31 in the analog circuit of interface J12 in first analog circuit of this circuit, first analog circuit; 1 pin of multiplying module M1 in first analog circuit connects 4 mouthfuls of interface J11 in this circuit, 3 pin of multiplying module M1 connect 4 mouthfuls of interface J34 in the 3rd analog circuit, 2 mouthfuls of interface J22 in 4 mouthfuls of 1 mouthfuls of meeting second interface J22 in the analog circuit of interface J13 in first analog circuit, second analog circuit connect 3 mouthfuls of interface J11 in first analog circuit; 1 pin of multiplying simulation M2 connects 4 mouthfuls of first interface J11 in the analog circuit in second analog circuit, 3 pin of multiplying module M2 connect 4 mouthfuls of interface J21 in second analog circuit, 4 mouthfuls of 1 mouthfuls of meeting the 3rd analog circuit interface J32 of interface J23 in second analog circuit, 2 mouthfuls of 4 mouthfuls of meeting this circuit interface J34 of interface J32 in the 3rd analog circuit, 3 mouthfuls of this circuit interface J32 connect 4 mouthfuls of interface J24 in second analog circuit.
Determine that according to the hyperchaos equation hyperchaotic system general-purpose simulation circuit connecting mode is as follows:
Figure BSA00000198951400022
1 pin of multiplying module M1 in first analog circuit of this circuit connects 4 mouthfuls of interface J21 in this circuit, 3 pin of multiplying module M1 connect 4 mouthfuls of interface J31 in the 3rd analog circuit, 4 mouthfuls of 1 pin that meet this circuit interface J12 of first analog circuit interface J13,2 mouthfuls of 4 mouthfuls of meeting second analog circuit interface J21 of interface J12,3 mouthfuls of interface J12 connect 4 mouthfuls of interface J14 in this circuit; 1 pin of multiplying module M2 connects 3 mouthfuls of first analog circuit interface J14 in second analog circuit, 3 pin of multiplying module M2 connect 4 mouthfuls of the 3rd analog circuit interface J31,4 mouthfuls of the second analog circuit interface J23 connect 1 mouthful of interface J22 in this circuit, 2 mouthfuls of 4 mouthfuls of meeting first analog circuit interface J11 of interface J22,3 mouthfuls of 4 mouthfuls of meeting the 4th analog circuit interface J41 of interface J22,1 pin of multiplying module M3 and 3 pin connect 4 mouthfuls of first analog circuit interface J11 in the 3rd analog circuit, 4 mouthfuls of the 3rd analog circuit interface J33 connect 1 mouthful of interface J32 in this circuit, and 2 mouthfuls of interface J32 connect 4 mouthfuls of interface J34 in this circuit; 1 pin of the 4th analog circuit interface J42 connects 4 mouthfuls of first analog circuit interface J14.
The design utilizes integrated operational amplifier (LF347) and electric capacity to realize integral operation, utilizes integrated operational amplifier and resistance to realize add operation, utilizes integrated operational amplifier and resistance to realize anti-phase computing, utilizes multiplier (AD633JN) to realize multiplying.
Three tunnel system, coupled realize chaos system together, and four tunnel system, coupled realize hyperchaotic system together.

Claims (3)

1. hyperchaos/chaos system general-purpose simulation circuit is characterized in that: comprise chaos system general-purpose simulation circuit that is connected and composed by three identical analog circuits or the hyperchaotic system general-purpose simulation circuit that is connected and composed by four identical analog circuits; Described analog circuit is made up of multiplier circuit and addition, integration, negative circuit, 2 pin of multiplying module M1 in the described multiplier circuit, 4 pin, 6 pin ground connection, 8 pin connect positive supply, and 5 pin connect negative supply, and 7 pin join with 1 mouthful, 2 mouthfuls, 3 mouthfuls, 4 mouthfuls of interface J13 respectively; Described addition, integration, 3 pin of integrated operational amplifier U1 in the negative circuit, 5 pin, 10 pin, 12 pin ground connection, 4 pin connect positive supply, 11 pin connect negative supply, 6 pin connecting resistance RX4, the end of resistance R X3, the other end of resistance R X4 connects 7 pin of integrated operational amplifier U1 and 1 mouthful of interface J14 respectively, 2 mouthfuls, 3 mouthfuls, 4 mouthfuls, the other end of resistance R X3 connects 8 pin of integrated operational amplifier U1 respectively, 1 mouthful of interface J11,2 mouthfuls, 3 mouthfuls, the end of 4 mouthfuls and capacitor C X, the end of the other end connecting resistance RX2 of capacitor C X and 9 pin of integrated arithmetic unit U1,14 pin of another termination integrated operational amplifier U1 of resistance R X2 and the end of resistance R X1,13 pin and the adjustable resistance MRX1 of another termination integrated operational amplifier U1 of resistance R X1, adjustable resistance MRX2, adjustable resistance MRX3,2 ends of adjustable resistance MRX4,3 ends of adjustable resistance MRX1,8 mouthfuls of linking to each other with interface J12 of 1 end join, 3 ends of adjustable resistance MRX2,7 mouthfuls of linking to each other with interface J12 of 1 end join, 3 ends of adjustable resistance MRX3,6 mouthfuls of linking to each other with interface J12 of 1 end join 3 ends of adjustable resistance MRX4,5 mouthfuls of linking to each other with interface J12 of 1 end join.
2. hyperchaos according to claim 1/chaos system general-purpose simulation circuit, it is characterized in that: being connected to of described chaos system general-purpose simulation circuit: 2 mouthfuls of 4 mouthfuls of meeting this circuit interface J14 of the interface J12 in 1 mouthful of 4 mouthful of meeting the 3rd interface J31 in the analog circuit of the interface J12 in first analog circuit, first analog circuit; 1 pin of multiplying module M1 in first analog circuit connects 4 mouthfuls of interface J11 in this circuit, 3 pin of multiplying module M1 connect 4 mouthfuls of interface J34 in the 3rd analog circuit, 2 mouthfuls of interface J22 in 4 mouthfuls of 1 mouthfuls of meeting second interface J22 in the analog circuit of interface J13 in first analog circuit, second analog circuit connect 3 mouthfuls of interface J11 in first analog circuit; 1 pin of multiplying simulation M2 connects 4 mouthfuls of first interface J11 in the analog circuit in second analog circuit, 3 pin of multiplying module M2 connect 4 mouthfuls of interface J21 in second analog circuit, 4 mouthfuls of 1 mouthfuls of meeting the 3rd analog circuit interface J32 of interface J23 in second analog circuit, 2 mouthfuls of 4 mouthfuls of meeting this circuit interface J34 of interface J32 in the 3rd analog circuit, 3 mouthfuls of this circuit interface J32 connect 4 mouthfuls of interface J24 in second analog circuit.
3. hyperchaos according to claim 2/chaos system general-purpose simulation circuit, it is characterized in that: the circuit of described hyperchaotic system general-purpose simulation circuit is connected to: 1 pin of the multiplying module M1 in first analog circuit connects 4 mouthfuls of interface J21 in this circuit, 3 pin of multiplying module M1 connect 4 mouthfuls of interface J31 in the 3rd analog circuit, 4 mouthfuls of 1 pin that meet this circuit interface J12 of first analog circuit interface J13,2 mouthfuls of 4 mouthfuls of meeting second analog circuit interface J21 of interface J12,3 mouthfuls of interface J12 connect 4 mouthfuls of interface J14 in this circuit; 1 pin of multiplying module M2 connects 3 mouthfuls of first analog circuit interface J14 in second analog circuit, 3 pin of multiplying module M2 connect 4 mouthfuls of the 3rd analog circuit interface J31,4 mouthfuls of the second analog circuit interface J23 connect 1 mouthful of interface J22 in this circuit, 2 mouthfuls of 4 mouthfuls of meeting first analog circuit interface J11 of interface J22,3 mouthfuls of 4 mouthfuls of meeting the 4th analog circuit interface J41 of interface J22,1 pin of multiplying module M3 and 3 pin connect 4 mouthfuls of first analog circuit interface J11 in the 3rd analog circuit, 4 mouthfuls of the 3rd analog circuit interface J33 connect 1 mouthful of interface J32 in this circuit, and 2 mouthfuls of interface J32 connect 4 mouthfuls of interface J34 in this circuit; 1 pin of the 4th analog circuit interface J42 connects 4 mouthfuls of first analog circuit interface J14.
CN 201020265640 2010-07-21 2010-07-21 Hyperchaos/chaos system universal analog circuit Expired - Fee Related CN201726386U (en)

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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102903282A (en) * 2012-10-26 2013-01-30 玉林师范学院 Integer-order and fractional-order multifunctional chaotic experiment instrument
CN102904709A (en) * 2012-09-27 2013-01-30 滨州学院 Method for automatically switching four Chen type system based fractional order chaotic systems and analog circuit
CN102916802A (en) * 2012-09-27 2013-02-06 滨州学院 Fractional-order automatic switching chaotic system method for four Lorenz type systems and analog circuit
CN102946308A (en) * 2012-11-19 2013-02-27 湖南大学 Novel fractional order hyperchaos circuit
CN104202140A (en) * 2014-08-31 2014-12-10 王春梅 Four-dimensional balance point-free hyperchaotic system based on five-simplest chaotic system, and analogue circuit
CN105243257A (en) * 2015-08-26 2016-01-13 韩敬伟 Five-quasi-periodic spherical oscillator and circuit

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102904709A (en) * 2012-09-27 2013-01-30 滨州学院 Method for automatically switching four Chen type system based fractional order chaotic systems and analog circuit
CN102916802A (en) * 2012-09-27 2013-02-06 滨州学院 Fractional-order automatic switching chaotic system method for four Lorenz type systems and analog circuit
WO2014048051A1 (en) * 2012-09-27 2014-04-03 Li Jianqing Method and analogue circuit for fractional order chaotic system of automatically switching four systems based on chen type system
CN102916802B (en) * 2012-09-27 2014-12-17 滨州学院 Fractional-order automatic switching chaotic system method for four Lorenz type systems and analog circuit
CN102904709B (en) * 2012-09-27 2014-12-24 国家电网公司 Method for automatically switching four Chen type system based fractional order chaotic systems and analog circuit
CN102903282A (en) * 2012-10-26 2013-01-30 玉林师范学院 Integer-order and fractional-order multifunctional chaotic experiment instrument
CN102946308A (en) * 2012-11-19 2013-02-27 湖南大学 Novel fractional order hyperchaos circuit
CN102946308B (en) * 2012-11-19 2015-07-29 湖南大学 A kind of new Fractional Order Hyperchaotic circuit
CN104202140A (en) * 2014-08-31 2014-12-10 王春梅 Four-dimensional balance point-free hyperchaotic system based on five-simplest chaotic system, and analogue circuit
CN105243257A (en) * 2015-08-26 2016-01-13 韩敬伟 Five-quasi-periodic spherical oscillator and circuit

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Granted publication date: 20110126

Termination date: 20110721