CN201681968U - 三晶片贴片式发光二极管封装结构 - Google Patents
三晶片贴片式发光二极管封装结构 Download PDFInfo
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- CN201681968U CN201681968U CN2010201674653U CN201020167465U CN201681968U CN 201681968 U CN201681968 U CN 201681968U CN 2010201674653 U CN2010201674653 U CN 2010201674653U CN 201020167465 U CN201020167465 U CN 201020167465U CN 201681968 U CN201681968 U CN 201681968U
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- H01—ELECTRIC ELEMENTS
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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- H—ELECTRICITY
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
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- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
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Abstract
本实用新型涉及一种三晶片贴片式发光二极管封装结构,包括支架、三颗LED晶片和金线,LED晶片借助固晶底胶固定在支架焊盘上,LED晶片上方覆盖有荧光粉与胶水混合层;支架焊盘被一绝缘隔离带分成第一区和第二区;第一区与支架电极的负极引脚电性连接,第二区与支架电极的正极引脚电性连接;三颗LED晶片一并固定在所述第一区内;各LED晶片正极所焊接的三根金线的另一端焊接在第二区内,各LED晶片负极所焊接的三根金线的另一端焊接在第一区内。同现有技术相比较,本实用新型具有测试方便、使作业效率高等优点。
Description
技术领域本实用新型涉及至少有一个电位跃变势垒或表面势垒的适用于光发射的半导体器件,特别是涉及发光二极管,尤其是贴片式发光二极管封装结构。
背景技术近几年随着手机、PDA以及LCD显示器的快速增长,加之贴片式发光二极管(简称SMD LED,Surface Mounted Devices Light Emitting Diode)具有体积小、散射角大、发光均匀性好、可靠性高、低功耗和响应速度快等优点,市场对贴片式发光二极管的需求也越来越大。根据市场的需求和应用场所的不同,贴片式发光二极管也有多种封装方式和结构。现有技术中,三晶片贴片式LED的封装结构如图1和2所示,包括支架10’、三颗LED晶片20’和金线30’,所述支架10’的焊盘区由十字形绝缘隔离带分隔成四个区,其中三个区与支架10’的正极引脚电性连接,三颗LED晶片20’是分别固定在所述三个区内,然后分别借助金线30’焊接至另一个负极焊盘区,所述LED晶片20’上方覆盖有荧光粉与胶水混合层50’。这种贴片式LED封装结构存在下述不足:由于三颗LED晶片各自的焊盘区是分开独立的,因此在作业的测试过程中,需要把图1中的四个电极引脚均接上测试电源,或者分三次分别将三个正极引脚中的一个与负极引脚接上测试电源,才能对三颗LED晶片进行有效的发光测试,测试工序相对繁琐,使作业效率低下,并且,对分光工序也带来很多不便。
实用新型内容本实用新型要解决的技术问题在于避免上述现有技术的不足之处而提出一种测试方便的三晶片贴片式发光二极管封装结构。
本实用新型解决所述技术问题可以通过采用以下技术方案来实现:
设计、制作一种三晶片贴片式发光二极管封装结构,包括支架、三颗LED晶片和金线,所述LED晶片借助固晶底胶固定在所述支架的支架焊盘上,所述LED晶片上方覆盖有荧光粉与胶水混合层;其特征在于:所述支架焊盘被一绝缘隔离带分成大小两个区,即第一区和第二区;所述第一区与支架电极的负极引脚电性连接,所述第二区与支架电极的正极引脚电性连接;所述三颗LED晶片一并固定在所述第一区内;各LED晶片正极所焊接的三根金线的另一端焊接在所述第二区内,各LED晶片负极所焊接的三根金线的另一端焊接在所述第一区内。
作为本实用新型的进一步改进,所述绝缘绝缘隔离带呈直角型。
作为本实用新型的再进一步改进,所述三颗LED晶片上下均匀排列成“1”字型。
同现有技术相比较,本实用新型三晶片贴片式发光二极管封装结构的技术效果在于:1支架的焊盘区分为两个区,三颗LED晶片一并固定在第一区内,使各LED晶片形成共用支架的正极引脚和负极引脚,因此,在测试时,只需将支架的一正极引脚和任一负极引脚接上测试电源时,即可使三颗LED晶片同时得到有效的测试,从而提高了作业效率;分光工序中,同样需要使三颗LED晶片同时发光,显然,本实用新型只需两个电极引脚接电源比现有技术中四个电极引脚接电源要方便得多。
附图说明
图1是现有技术三晶片贴片式LED封装结构的俯视结构示意图;
图2是现有技术三晶片贴片式LED封装结构的主视剖视结构示意图;
图3是本实用新型三晶片贴片式发光二极管封装结构的俯视结构示意图;
图4是本实用新型三晶片贴片式发光二极管封装结构的主视剖视结构示意图。
具体实施方式以下结合附图所示之优选实施例作进一步详述。
一种三晶片贴片式发光二极管封装结构,如图3和图4所示,包括支架10、三颗LED晶片20和金线30,所述LED晶片20借助固晶底胶40固定在所述支架10的支架焊盘11上,所述LED晶片20上方覆盖有荧光粉与胶水混合层50;所述支架焊盘11被一呈直角型的绝缘隔离带12分成大小两个区,即第一区111和第二区112;所述第一区111与支架电极的负极引脚13电性连接,所述负极引脚13有三个,所述第二区112与支架电极的正极引脚14电性连接,所述正极引脚14有一个,所述三颗LED晶片20上下均匀排列成“1”字型一并固定在所述第一区111内;各LED晶片20正极所焊接的三根金线30的另一端焊接在所述第二区112内,各LED晶片20负极所焊接的三根金线30的另一端焊接在所述第一区111内。
测试或者分光需要三颗LED晶片20同时发光时,只需将图3中所示的正极引脚14(即第2引脚),和三个负极引脚13(即第1、3、4引脚)中的任意一个引脚接上电源即可。
以上内容是结合具体的优选技术方案对本实用新型所作的进一步详细说明,不能认定本实用新型的具体实施只局限于这些说明。对于本实用新型所属技术领域的普通技术人员来说,在不脱离本实用新型构思的前提下,还可以做出若干简单推演或替换(诸如将支架的正极引脚设为三个、负极引脚设为一个,等等),都应当视为属于本实用新型的保护范围。
Claims (4)
1.一种三晶片贴片式发光二极管封装结构,包括支架(10)、三颗LED晶片(20)和金线(30),所述LED晶片(20)借助固晶底胶(40)固定在所述支架(10)的支架焊盘(11)上,所述LED晶片(20)上方覆盖有荧光粉与胶水混合层(50);其特征在于:所述支架焊盘(11)被一绝缘隔离带(12)分成大小两个区,即第一区(111)和第二区(112);所述第一区(111)与支架电极的负极引脚(13)电性连接,所述第二区(112)与支架电极的正极引脚(14)电性连接;所述三颗LED晶片(20)一并固定在所述第一区(111)内;各LED晶片(20)正极所焊接的三根金线(30)的另一端焊接在所述第二区(112)内,各LED晶片(20)负极所焊接的三根金线(30)的另一端焊接在所述第一区(111)内。
2.根据权利要求1所述的三晶片贴片式发光二极管封装结构,其特征在于:所述绝缘绝缘隔离带(12)呈直角型。
3.根据权利要求1或2所述的三晶片贴片式发光二极管封装结构,其特征在于:所述三颗LED晶片(20)上下均匀排列成“1”字型。
4.根据权利要求1所述的三晶片贴片式发光二极管封装结构,其特征在于:所述正极引脚(14)有一个,所述负极引脚(13)有三个。
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102117880A (zh) * | 2011-01-24 | 2011-07-06 | 佛山市蓝箭电子有限公司 | 一种表面贴装式led封装体及其制造方法 |
CN102136471A (zh) * | 2010-12-23 | 2011-07-27 | 常州欧密格光电科技有限公司 | 大型显示屏的led元件 |
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102136471A (zh) * | 2010-12-23 | 2011-07-27 | 常州欧密格光电科技有限公司 | 大型显示屏的led元件 |
CN102117880A (zh) * | 2011-01-24 | 2011-07-06 | 佛山市蓝箭电子有限公司 | 一种表面贴装式led封装体及其制造方法 |
CN102117880B (zh) * | 2011-01-24 | 2013-06-05 | 佛山市蓝箭电子股份有限公司 | 一种表面贴装式led封装体及其制造方法 |
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