CN201611935U - Video signal transformation device - Google Patents
Video signal transformation device Download PDFInfo
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- CN201611935U CN201611935U CN2009203532584U CN200920353258U CN201611935U CN 201611935 U CN201611935 U CN 201611935U CN 2009203532584 U CN2009203532584 U CN 2009203532584U CN 200920353258 U CN200920353258 U CN 200920353258U CN 201611935 U CN201611935 U CN 201611935U
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- video
- signal
- converting apparatus
- coding
- signal converting
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- Testing, Inspecting, Measuring Of Stereoscopic Televisions And Televisions (AREA)
- Color Television Systems (AREA)
Abstract
The utility model provides a video signal transformation device comprising a decoder and a processing unit, wherein the decoder is used for decoding input minimized differential signals; and the processing unit is connected to the decoder and used for conducting low voltage differential signal coding on decoded R, G, B and synchronizing signals. The video signal transformation device conducts low voltage differential signal coding on the decoded R, G, B and synchronizing signals through a coding module designed by FPGA, thus omitting a peripheral coding chip or circuit, reducing cost and optimizing circuit structure.
Description
Technical field
The utility model relates to the panel TV field, more specifically, relates to a kind of video-signal converting apparatus, is used for the panel TV test.
Background technology
As shown in Figure 1, in correlation technique, the video-signal converting apparatus that is used for the panel TV test comprises: 14,2 TMDS decoding chips 13 of 1 FPGA and 2 LVDS encoders 15.13 couples of TMDS that received by digital visual interface 11 of TMDS decoding chip (Transition Minimized Differential Signaling, minimized differential signal) decode.Then, the bit signal that FPGA 14 exports is encoded into LVDS (Low Voltage Differential Signal, Low Voltage Differential Signal) by encoder, and by the output of LVDS interface, thereby so that realize the conversion of TMDS to the LVDS vision signal.
But, this complex structure, cost height.In addition, above-mentioned video-signal converting apparatus has only a kind of LVDS coded format output, if change the coded format of output, need download again, and poor compatibility, dumb; And do not support the vision signal of full HD 1080p to import, and there is not built-in standard testing image, bring constant to test.
The utility model content
The utility model aims to provide a kind of video-signal converting apparatus, can solve the video-signal converting apparatus complex structure and other problems in the correlation technique.
To achieve these goals, provide a kind of video-signal converting apparatus, it comprises: decoder is used for the minimized differential signal of input is decoded; Processing unit is connected to decoder, is used for R, the G, B and the synchronizing signal that decode are carried out the Low Voltage Differential Signal coding.
Preferably, processing unit comprises: coding module is used for R, the G, B and the synchronizing signal that decode are carried out the Low Voltage Differential Signal coding.
Preferably, processing unit comprises: on-site programmable gate array FPGA or microprocessor MCU.
Preferably, video-signal converting apparatus comprises: memory, be connected with processing unit, and be used for the information of storage control program and typical test pattern.
Preferably, video-signal converting apparatus comprises: power module is connected with each functional unit of video-signal converting apparatus.
In video-signal converting apparatus of the present utility model, come R, the G, B and the synchronizing signal that decode are carried out the Low Voltage Differential Signal coding by the designed coding module of FPGA, thereby saved peripheral coding chip or circuit, reduced cost, optimized circuit structure.
Description of drawings
Accompanying drawing is used to provide further understanding of the present utility model, constitutes the application's a part, and illustrative examples of the present utility model and explanation thereof are used to explain the utility model, do not constitute improper qualification of the present utility model.In the accompanying drawings:
Fig. 1 is the structure chart according to the video-signal converting apparatus of correlation technique;
Fig. 2 is the structure chart according to the video-signal converting apparatus of the utility model embodiment.
Embodiment
Below with reference to the accompanying drawings and in conjunction with the embodiments, describe the utility model in detail.
Fig. 2 is the structure chart according to the video-signal converting apparatus of the utility model embodiment.As shown in Figure 2, this video-signal converting apparatus comprises: TMDS decoder 23, be connected to digital visual interface 21 (DVI by equalizer 22, Digital Visual Interface), be used for the minimized differential signal TMDS by the DVI input is decoded, obtain R, G, B signal and synchronizing signal; On-site programmable gate array FPGA 24 is used for R, the G, B signal and the synchronizing signal that decode are carried out Low Voltage Differential Signal LVDS coding, and by 25 outputs of LVDS interface.
In the present embodiment, video-signal converting apparatus can also comprise: memory 26, be connected with FPGA 24, and be used for the key message of storage control program and typical test pattern.
In addition, this video-signal converting apparatus can also comprise: power module 27 is connected with each functional unit of video-signal converting apparatus, for example, be connected with equalizer 22, decoder 23, FPGA 24, so that power to each functional unit of video-signal converting apparatus.
In the above-described embodiments, use FPGA to carry out the LVDS coding as processing unit, but this is a kind of optimal way, the utility model can also adopt the processing unit of other types, for example, and microprocessor (MCU) etc.
In video-signal converting apparatus of the present utility model, come the data that decode are carried out the Low Voltage Differential Signal coding by the designed coding module of processing unit, thereby saved peripheral coding chip or circuit, reduced cost, optimized circuit structure.Simultaneously, the utility model can also be supported the LVDS coding output of multiple form, has built-in standard testing image output function (at least 16 kinds), the vision signal input of the highest support 1080p form.
The above is a preferred embodiment of the present utility model only, is not limited to the utility model, and for a person skilled in the art, the utility model can have various changes and variation.All within spirit of the present utility model and principle, any modification of being done, be equal to replacement, improvement etc., all should be included within the protection range of the present utility model.
Claims (5)
1. a video-signal converting apparatus is characterized in that, comprising:
Decoder is used for the minimized differential signal of input is decoded;
Processing unit is connected to described decoder, is used for R, the G, B and the synchronizing signal that decode are carried out the Low Voltage Differential Signal coding.
2. video-signal converting apparatus according to claim 1 is characterized in that, described processing unit comprises: coding module is used for R, the G, B and the synchronizing signal that decode are carried out the Low Voltage Differential Signal coding.
3. video-signal converting apparatus according to claim 1 is characterized in that, described processing unit is on-site programmable gate array FPGA or microprocessor MCU.
4. video-signal converting apparatus according to claim 1 is characterized in that, described video-signal converting apparatus also comprises: memory, be connected with described processing unit, and be used for the information of storage control program and typical test pattern.
5. video-signal converting apparatus according to claim 1 is characterized in that, described video-signal converting apparatus also comprises: power module is connected with each functional unit of video-signal converting apparatus.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2009203532584U CN201611935U (en) | 2009-12-25 | 2009-12-31 | Video signal transformation device |
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN200920350013.6 | 2009-12-25 | ||
CN200920350013 | 2009-12-25 | ||
CN2009203532584U CN201611935U (en) | 2009-12-25 | 2009-12-31 | Video signal transformation device |
Publications (1)
Publication Number | Publication Date |
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CN201611935U true CN201611935U (en) | 2010-10-20 |
Family
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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CN2009203532584U Expired - Fee Related CN201611935U (en) | 2009-12-25 | 2009-12-31 | Video signal transformation device |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104575351A (en) * | 2014-12-25 | 2015-04-29 | 中航华东光电有限公司 | Signal conversion system, displayer and signal conversion method |
-
2009
- 2009-12-31 CN CN2009203532584U patent/CN201611935U/en not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104575351A (en) * | 2014-12-25 | 2015-04-29 | 中航华东光电有限公司 | Signal conversion system, displayer and signal conversion method |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20101020 Termination date: 20161231 |