CN201581133U - Low-temperature damage-free deep slant silicon etching system - Google Patents
Low-temperature damage-free deep slant silicon etching system Download PDFInfo
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- CN201581133U CN201581133U CN2009203133404U CN200920313340U CN201581133U CN 201581133 U CN201581133 U CN 201581133U CN 2009203133404 U CN2009203133404 U CN 2009203133404U CN 200920313340 U CN200920313340 U CN 200920313340U CN 201581133 U CN201581133 U CN 201581133U
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Abstract
The utility model provides a low-temperature damage-free deep slant silicon etching system which belongs to the technical field of semiconductors. The system comprises a feeding device for containing an etching material, an etching cavity connected with the feeding device, a nozzle, a bracket for supporting silicon chips to be etched and a masking plate, wherein the etching cavity comprises a cavity; the nozzle is fixed on one side in the cavity; the bracket is fixed in the cavity in an adjustable angle way and positioned on the other side opposite to the nozzle; and the masking plate is positioned between the nozzle and the bracket, and fixed on the inner wall of the cavity, and a hole or a seam for the etching material to penetrate through is formed at the position on the masking plate, corresponding to the nozzle. By adopting the system, the problems of poor etching selection difference, low speed rate and the like can be solved, the etching speed rate and the etching selection ratio can be improved, silicon chips with high smoothness and slant grooves can be provided, and the security can also be improved.
Description
Technical field
The utility model relates to technical field of semiconductors, in particular to the dark tiltedly silicon etching system of a kind of low temperature not damaged.
Background technology
Semi-conductive etching is divided into physical etchings and chemical etching, and the latter is the plasma chemistry etching for example.The advantage of physical etchings is that it is anisotropic, and etch rate is also very fast; Shortcoming is the etching selection ratio, and reaction product is not volatile, deposits to silicon chip surface easily, causes particle contamination.The plasma chemistry etching is isotropic, and its live width control ratio is relatively poor, again owing to meetings such as temperature required height and generation ion, high-energy photon and soft X-ray damage the silicon chip structure, and then silicon chip is caused damage; And, plasma etching equipment price costliness, the etching selection ratio, etch rate is low, and the sidewall slickness is not high, easily device is caused damage.For example, reactive ion etching (the Reactive Ion Etcher that generally adopts in the present semiconductor etching technology, abbreviation RIE), inductively coupled plasma (Inductively Coupled Plasma, be called for short ICP) etc. dry etching technology all be plasma etching, because the electric charge that inhomogeneous plasma produces can cause the inefficacy of susceptible device susceptor on the silicon chip, therefore utilize these technology that silicon chip and structure thereof are destroyed.
At present, also there is not suitable technique can provide the high low temperature not damaged of etch rate height, etching selection ratio dark tiltedly silicon etching system, therefore be difficult to satisfy new generation of semiconductor and do not have the requirement of in plasma etching technology and MEMS (micro electro mechanical system) (micro-electro-mechanical systems the is called for short MEMS) manufacturing process semi-conductive dark tiltedly etching being processed.
Summary of the invention
Can't carry out at the silicon etching system in the correlation technique quick nondestructive etching problem and the utility model is proposed, for this reason, main purpose of the present utility model is to provide a kind of low temperature not damaged dark tiltedly silicon etching system, to solve at least one problem in above-mentioned a plurality of problem.
In view of above-mentioned, the utility model provides a kind of low temperature not damaged dark tiltedly silicon etching system, and this system comprises: the feed device that holds the etching material; Be connected to the etch chamber of feed device; Etch chamber comprises: cavity; Nozzle, nozzle are fixed in the intravital side in chamber; Support the support of silicon chip to be etched, support is fixed in the cavity in the whole mode of adjustable angle, and is positioned at the relative opposite side of nozzle; Masking plate, masking plate is fixed in cavity inner wall between nozzle and support, and the position corresponding with nozzle is formed with hole or the seam that passes for the etching material on masking plate.
By technique scheme of the present utility model, at ambient temperature silicon chip is carried out anisotropic no plasma etching, by the gas that in etch chamber, provides etching to use, regulate pressure and temperature silicon chip is carried out the etching of various angles, can solve problems such as the low and easy damaged of etching selection ratio in the present lithographic technique, speed, can improve etch rate, improve the etching selection ratio of material, provide slickness high silicon chip sidewall, and the security that has improved system.
Description of drawings
Fig. 1 is the dark tiltedly structural representation of silicon etching system of the low temperature not damaged of the utility model one preferred embodiment;
Fig. 2 is the structural representation of the etch chamber of the utility model one preferred embodiment.
Embodiment
In the utility model embodiment, provide the low temperature not damaged the dark tiltedly implementation of silicon etching system, in this implementation, utilize this system, by etching gas silicon chip is carried out undamaged etching at a lower temperature, particularly carry out dark, oblique etching, form the silicon chip of desired structure.
Need to prove that under the situation of not conflicting, embodiment and the feature among the embodiment among the application can make up mutually.Describe the utility model below with reference to the accompanying drawings and in conjunction with the embodiments in detail.
As shown in Figure 1, the dark tiltedly silicon etching system of a kind of low temperature not damaged of the utility model one preferred embodiment comprises part as described below.
The feed device of holding semiconductor etching gas, in the present embodiment, feed device is made up of first storage tank 16 that holds argon gas and second storage tank 17 that holds seven Chlorine fluorides, and the effect of argon gas is a buffer reagent, can play the effect that prevents that seven Chlorine fluoride vigorous reactions from setting off an explosion; Certainly feed device can be only one hold for example storage tank of etching gas, it is by the required conditional decision of etching.Refining plant 2 connects feed device by mass flow controller 1, in the present embodiment, two mass flow controllers 1 are connected respectively to first storage tank 16 and second storage tank 17, and the material that mass flow controller 1 is regulated by the feed device supply, the flow of argon gas and seven Chlorine fluorides just, refining plant 2 is removed the impurity in the gas etc.Gas mixer 3 connects refining plants 2, is used to mix argon gas and two kinds of gases of seven Chlorine fluorides, and subsequently blended gas send into etch chamber.In the practical application, if only need a kind of gas as etching gas, then can not need this gas mixer 3, refining plant 2 can directly be sent the gas that has purified into etch chamber.
As shown in Figure 2, etch chamber comprises: cavity 5 is used to hold each device of etch chamber, the pressure difference in different stage cavitys 5 wherein, for example when cavity 5 was evacuated, pressure was almost 0.001Pa, and mixed gas is when spraying into cavity 5, and pressure can raise; Nozzle 6 is fixed in the inboard of cavity 5, fixed angle, thus can spray the etching materials to silicon chip 10 towards the direction of masking plate 8, the etching material is etching gas seven Chlorine fluorides 22 and as the argon gas 21 of protective gas, carries out etching; Support 11, support 11 is fixed in the cavity 5 in the whole mode of adjustable angle, and be positioned at the opposite side relative with nozzle 6, be used to support silicon chip to be etched 10 on it, support 11 comprises bracing frame and pallet, adopt turntable between the two, in concrete implementation process, the bracing frame that is fixed in cavity inner wall maintains static, pallet connects bracing frame in the whole mode of adjustable angle, when needing the angled groove of etching, can rotary-tray, thus make pallet and incident direction have a certain degree, and this angle can be any that become with incident direction in 0-90 °, it is the angle of the optimum selected in advance, thereby makes that the position to be etched of silicon chip 10 is corresponding with the exit direction via the etching gas of masking plate 8; Masking plate 8, be used for the material that the etching of nozzle 6 ejections is used is sheltered and converged, masking plate 8 is positioned at cavity 5, between nozzle 6 and support 11, on masking plate 8, has the hole with nozzle 6 corresponding positions, thereby can play the effect of converging adjusting so that the material that etching is used passes the hole to etching material.In actual applications, silicon chip 10 to be etched is positioned on the support, just along the rear of the masking plate 8 of the emission direction of nozzle 6, its surface-coated has photoresist material 9, photoresist material 9 covers does not need the part that is etched, and exposes part to be etched, as shown in Figure 2, the part to be etched removal that has been etched forms groove.
Certainly, cavity 5 outsides also can be connected with each different device of function, in order to finish different functions.Preferably, cavity 5 can also connect the vacuum pumping pump 7 with cavity 5 internal communication, and vacuum pumping pump 7 is used for before etching process cavity 5 being vacuumized.Certainly, the process that vacuumizes can also be by other suitable devices, finish in any suitable manner, are not limited to above-mentioned.Preferably, the outside of cavity 5 is connected with the pressure-detecting device 13 with the internal communication of cavity 5, and for example the vacuum pressure instrument is used for the pressure in the test chamber 5, is evacuated pump 7 especially for the cavity 5 in etch chamber and vacuumizes the detection of back to pressure.
Preferably, temperature-control device 12 and cavity 5 internal communication are used for controlling temperature in the cavity 5 in etching process according to the situation in the chamber, by regulating the intravital etching speed in chamber to temperature controlling.
Preferably, cavity 5 outsides can also connect exhaust gas processing device 15 by off-gas pump 14, off-gas pump 14 and exhaust gas processing device preferably are positioned at the position except that one side of nozzle 6 places, and the tail gas after by off-gas pump 14 etching being finished is extracted out and handled by 15 pairs of tail gas of exhaust gas processing device.
Preferably, also be connected with reducing valve 4 between the nozzle 6 of gas mixer 3 and etch chamber, gas mixer 3 effusive mixed gass are reduced pressure, be reduced to the pressure of etch chamber proportional, for example 10000: 1, thereby make that the kinetic energy of seven Chlorine fluorides is very big, be enough to silicon chip is carried out etching.
The dark tiltedly silicon etching system of the low temperature not damaged of the utility model one preferred embodiment, can be by adopting mixed gas, by each device pressure, flow and the temperature etc. of gas are controlled, silicon chip is carried out the etching of different directions targetedly, formation has the groove of angle, and can improve etch rate and etching selection ratio, increase the etching effect of silicon chip, reacted product is carried out collection and treatment, reduce its influence, and improve the security of system by buffering with gas environment.In addition, this low temperature not damaged is dark, and tiltedly the silicon etching system cost is lower, can not cause damage to silicon chip simultaneously.
In order to understand the dark tiltedly silicon etching system of low temperature not damaged of the present utility model better, now the principle of utilizing the dark tiltedly silicon etching system of low temperature not damaged of the present utility model to carry out etching is described, mainly comprise following treating processes.
At first utilize etch chamber vacuumized up to pressure to reach desired level, for example 10-3Pa.Then, open feed device and discharge gas, and by setting pilot-gas flow, thereby ratio of mixture regulated.Then, gas is through purify removing impurity, and more fully, mix equably, subsequently to the decompression of blended gas, the intravital pressure ratio of pressure and chamber of decompression back blended gas is very big.Then, ejection blended gas converges adjusting through sheltering with line in cavity, and gas converges and arrives treats etched silicon chip, thereby silicon chip is carried out etching.Sloped-etch is then carried out bevel etched by swinging mounting to silicon chip if desired, thereby etches the deep trench of different angles.After etching is finished, the tail gas after the etching is discharged and handled.
By the foregoing description, utilize the dark tiltedly silicon etching system of low temperature not damaged, silicon chip is carried out etching, improved the efficient of etching, silicon chip after the etching can form the groove with required angle, and the sidewall slickness is good, can reach stricter silicon chip not damaged requirement.Adopt buffer gas simultaneously, cushioned the vigorous reaction of reactant gases, increased security.
The above is a preferred embodiment of the present utility model only, is not limited to the utility model, and for a person skilled in the art, the utility model can have various changes and variation.All within spirit of the present utility model and principle, any modification of being done, be equal to replacement, improvement etc., all should be included within the protection domain of the present utility model.
Claims (10)
1. the dark tiltedly silicon etching system of a low temperature not damaged is characterized in that described system comprises:
The feed device that holds the etching material;
Be connected to the etch chamber of described feed device; Described etch chamber comprises: cavity; Nozzle, described nozzle are fixed in the intravital side in described chamber; Support the support of silicon chip to be etched, described support is fixed in the described cavity in the whole mode of adjustable angle, and is positioned at the relative opposite side of described nozzle; Masking plate, described masking plate is fixed in described cavity inner wall between described nozzle and described support, and the position corresponding with described nozzle is formed with hole or the seam that passes for the etching material on described masking plate.
2. the dark tiltedly silicon etching system of low temperature not damaged according to claim 1 is characterized in that the surface of described silicon chip to be etched is relative with described masking plate, and is coated with photoresist material.
3. the dark tiltedly silicon etching system of low temperature not damaged according to claim 2, it is characterized in that, described support comprises bracing frame and pallet, support frame as described above is fixed in cavity inner wall, described pallet connects support frame as described above in the whole mode of adjustable angle, and rotation forms an angle becoming with incident direction in 0-90 °.
4. the dark tiltedly silicon etching system of low temperature not damaged according to claim 3 is characterized in that described etch chamber is connected with pressure-detecting device and temperature-control device, and described pressure-detecting device and temperature-control device are communicated with described inside cavity.
5. the dark tiltedly silicon etching system of low temperature not damaged according to claim 4 is characterized in that described etch chamber is connected with off-gas pump and exhaust gas processing device, and described exhaust gas processing device is communicated with described inside cavity by described off-gas pump.
6. the dark tiltedly silicon etching system of low temperature not damaged according to claim 5 is characterized in that described etch chamber is connected with vacuum pumping pump, and described vacuum pumping pump is communicated with described inside cavity.
7.
The dark tiltedly silicon etching system of low temperature not damaged according to claim 6 is characterized in that, is connected with the mixing device of refining plant and mixing etching material between described feed device and the described etch chamber.
8. the dark tiltedly silicon etching system of low temperature not damaged according to claim 7, it is characterized in that, described feed device is made up of first storage tank that holds argon gas and second storage tank that holds seven Chlorine fluorides, and described first storage tank and described second storage tank are connected to described refining plant respectively.
9. the dark tiltedly silicon etching system of low temperature not damaged according to claim 8 is characterized in that, is connected with reducing valve between described mixing device and the described etch chamber.
10. according to Claim 8 or the dark tiltedly silicon etching system of 9 described low temperature not damageds, it is characterized in that, be connected by first mass flow controller between described first storage tank and the described refining plant and/or described second storage tank and described refining plant between be connected by second mass flow controller.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009203133404U CN201581133U (en) | 2009-10-27 | 2009-10-27 | Low-temperature damage-free deep slant silicon etching system |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009203133404U CN201581133U (en) | 2009-10-27 | 2009-10-27 | Low-temperature damage-free deep slant silicon etching system |
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| Publication Number | Publication Date |
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| CN201581133U true CN201581133U (en) | 2010-09-15 |
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| CN2009203133404U Expired - Lifetime CN201581133U (en) | 2009-10-27 | 2009-10-27 | Low-temperature damage-free deep slant silicon etching system |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102479670A (en) * | 2010-11-30 | 2012-05-30 | 中芯国际集成电路制造(北京)有限公司 | Semiconductor device and using method |
-
2009
- 2009-10-27 CN CN2009203133404U patent/CN201581133U/en not_active Expired - Lifetime
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102479670A (en) * | 2010-11-30 | 2012-05-30 | 中芯国际集成电路制造(北京)有限公司 | Semiconductor device and using method |
| CN102479670B (en) * | 2010-11-30 | 2015-11-25 | 中芯国际集成电路制造(北京)有限公司 | A kind of semiconductor device and using method |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| ASS | Succession or assignment of patent right |
Owner name: JIANGSU YINGXU OPTOELECTRONIC TECHNOLOGY CO., LTD. Free format text: FORMER OWNER: INST OF MICROELECTRONICS, C. A. S Effective date: 20150126 |
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| C41 | Transfer of patent application or patent right or utility model | ||
| COR | Change of bibliographic data |
Free format text: CORRECT: ADDRESS; FROM: 100029 CHAOYANG, BEIJING TO: 221300 XUZHOU, JIANGSU PROVINCE |
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| TR01 | Transfer of patent right |
Effective date of registration: 20150126 Address after: 2 building, 221300, Fuzhou Road Economic Development Zone, Pizhou, Jiangsu, Xuzhou Patentee after: JIANGSU YINGSU PHOTOELECTRIC TECHNOLOGY CO., LTD. Address before: 100029 Beijing city Chaoyang District Beitucheng West Road No. 3 Institute of Microelectronics Patentee before: Institute of Microelectronics, Chinese Academy of Sciences |
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| CX01 | Expiry of patent term | ||
| CX01 | Expiry of patent term |
Granted publication date: 20100915 |