CN201466027U - Integrated circuit stacked capacitor - Google Patents
Integrated circuit stacked capacitor Download PDFInfo
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- CN201466027U CN201466027U CN2009200714171U CN200920071417U CN201466027U CN 201466027 U CN201466027 U CN 201466027U CN 2009200714171 U CN2009200714171 U CN 2009200714171U CN 200920071417 U CN200920071417 U CN 200920071417U CN 201466027 U CN201466027 U CN 201466027U
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- pole plate
- main pole
- expansion
- electricity
- integrated circuit
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Abstract
The utility model provides an integrated circuit stacked capacitor which comprises a substrate as well as a first main pole plate and a second main pole plate which are oppositely arranged on the surface of the substrate. An extension pole plate is arranged between the first main pole plate and the second main pole plate and is only electronically connected with the first main pole plate or the second main pole plate, and the other main pole plate of the two main pole plates, which is not electronically connected with extension pole plate, is electronically isolated from the extension pole plate. Compared with the prior art, the stacked provided by the utility model achieves a balance between process cost and electrical properties.
Description
[technical field]
The utility model relates to integrated circuit and makes the field, relates in particular to the integrated circuit stacking capacitor.
[background technology]
In the integrated circuit manufacturing field, electric capacity is one of indispensable primary element.In order to reduce the physical dimension of integrated circuit, improve the capacitance on the unit are, especially need to research and develop the capacitance structure of compact conformation.
Piling up (stack) electric capacity is a kind of typical compact capacitance structure that produces in the present capacitance structure development.Accompanying drawing 1 is the structural representation of a kind of integrated circuit stacking capacitor 10 in the prior art, comprise substrate 100 and the first main pole plate 110, the second main pole plate 120 and the 3rd main pole plate 130 that are arranged at substrate 100 surfaces, also comprise the first expansion pole plate 111 and the second expansion pole plate 121 that are arranged at first pole plate 110 and second pole plate, 130 belows, and be used for a plurality of through holes 112 and 122 between electricity connection main pole plate and the corresponding expansion pole plate.The 3rd main pole plate 130 also should comprise corresponding expansion pole plate, because structure and the above-mentioned first expansion pole plate 111 and the second expansion pole plate 121 are similar, therefore is omitted in accompanying drawing 1.
Be filled with dielectric material between above-mentioned each pole plate, for example silicon dioxide, silicon nitride or BPSG etc.
Wherein first pole plate is connected by through hole 140 electricity with tri-electrode, and continue on perpendicular to the direction of substrate 100, alternately to be connected with the pole plate of above and below, second pole plate also connects remaining pole plate by through hole 150 staggered electricity in the same way, thereby becomes the electric capacity of a series of parallel connections at substrate surface.Owing to adopted main pole plate and expansion pole plate structure combining, be equivalent to reduce the distance between the pole plate, thereby increased the capacitance of unit are.
Though adopted said structure to increase capacitance in the prior art, because the expansion pole plate that needs to consider to draw with the electricity coupling phenomenon between through hole 140 and 150, needs to keep each other bigger distance, and the excessive horizontal area that increases electric capacity of distance.The position of the therefore above-mentioned first expansion pole plate 111 and the second expansion pole plate 121 can not overlap in vertical direction fully, needs two different masks on preparation technology.And said structure is owing to increased one deck expansion pole plate, and the metal level number that is equivalent in road, back smithcraft has increased by one times.The main flow metal material of 0.18 micron present following technology is a copper, growth and graphical complex process, so said structure has seriously increased the technology cost.If the simple metal of expansion pole plate layer adopting process that is increasing, aluminium for example, then again because upper and lower metal level is a different materials, the last bottom crown that is equivalent to stack capacitor is used alternatingly different materials, therefore be easy to generate the situation of capacitance with temperature and change in voltage, this also be in the actual process do not wish to see.Therefore capacitance structure of the prior art is difficult in and accomplishes on technology cost and the electrology characteristic that balance takes into account.
[summary of the invention]
Technical problem to be solved in the utility model is, a kind of integrated circuit stacking capacitor is provided, and both can save the technology cost, guarantees to have good electrology characteristic again.
In order to address the above problem, the utility model provides a kind of integrated circuit stacking capacitor, comprise substrate and the first main pole plate that on substrate surface, is oppositely arranged and the second main pole plate, be provided with the expansion pole plate between the described first main pole plate and the second main pole plate, described expansion pole plate only is connected with the first main pole plate or the second main pole plate electricity, does not expand another main pole plate and expansion pole plate electric isolation that pole plate electricity connects therewith in two main pole plates.
As optional technical scheme, be filled with dielectric material between described main pole plate and the expansion pole plate.
As optional technical scheme, be connected by the conductive plunger electricity in the embedding medium material through hole between described expansion pole plate and the main pole plate.
As optional technical scheme, on perpendicular to the direction of substrate surface, also comprise many groups main pole plate positioned opposite to each other, in each group main pole plate, only one of them main pole plate electricity is connected with the expansion pole plate, and the mutual electricity of the first main pole plate connects in each group, and the mutual electricity of the second main pole plate in each group connects; Electricity between the described main pole plate connects the conductive plunger that adopts in the embedding medium material through hole.
Advantage of the present utility model is that the number of the expansion pole plate of described structure has reduced half, and the position of the position of expansion pole plate and conductive plunger is all identical, can adopt a mask to make, and has therefore reduced the technology cost.Though this kind structure has reduced the quantity of expansion pole plate, and then cause capacitance to reduce, but owing to cancelled the expansion pole plate of half, so capacitor plate the direction that is parallel to substrate can arrange tightr, thereby reduced the horizontal area of electric capacity, remedied the defective that capacitance reduces.And the formed stack capacitor of this structure, a pole plate all is made of the expansion pole plate, and another pole plate all is made of the main pole plate, therefore no matter expand pole plate and whether the main pole plate adopts same material, two materials that pole plate is adopted separately of the stack capacitor after the parallel connection all are consistent, therefore can suppress the situation generation of capacitance with temperature and change in voltage.Compared with prior art, capacitor described in the utility model accomplishes that on technology cost and electrology characteristic balance takes into account.
[description of drawings]
Accompanying drawing 1 is the structural representation of a kind of integrated circuit stacking capacitor in the prior art;
Accompanying drawing 2 is structural representations of integrated circuit stacking capacitor described in the embodiment of the present utility model.
[embodiment]
The embodiment of the integrated circuit stacking capacitor that the utility model is provided below in conjunction with accompanying drawing elaborates.
It shown in the accompanying drawing 2 structural representation of the described integrated circuit stacking capacitor 20 of this embodiment, comprise substrate 200 and the first main pole plate 210 that on substrate 200 surfaces, is oppositely arranged and the second main pole plate 220, be provided with expansion pole plate 211 between the described first main pole plate 210 and the second main pole plate 220, expansion pole plate 211 is connected with the first main pole plate, 210 electricity by metal plug 212, the second main pole plate 220 is expanded the pole plate electric isolation therewith, and also electricity does not connect other expansion pole plate.In other embodiment, expansion pole plate 211 also can connect with the second main pole plate, 220 electricity, in the case, the first main pole plate 210 and expansion pole plate electric isolation, promptly not electricity connect this expansion pole plate also not electricity connect other expansion pole plates.Said structure is the elementary cell of the described capacitor 20 of this embodiment.Be filled with dielectric material between the above-mentioned first main pole plate 210, the second main pole plate 220, expansion pole plate 211 and the metal plug 212.
Also comprise many groups main pole plate positioned opposite to each other on the direction on vertical substrates 200 surfaces, in two main pole plates in each group, an electricity is connected to the first main pole plate, and another electricity is connected to the second main pole plate.Show above-mentioned situation for clearer, further show the 3rd main pole plate 230, the 4th main pole plate 240 and the 5th main pole plate 250 in the accompanying drawing 2 of this embodiment, and the expansion pole plate 23 1 that is connected with the 3rd main pole plate 230 electricity.Syntagmatic between the annexation between the above-mentioned pole plate and the first main pole plate and the 210 second main pole plates 220 is similar, will not give unnecessary details herein.
Connect by metal plug electricity between the first main pole plate 210, the 3rd main pole plate 230 and the 5th main pole plate 250, also be connected between the second main pole plate 220 and the 4th main pole plate 240 by metal plug electricity, above-mentioned connected mode can repeatedly repeat on the direction on vertical and substrate 200 surfaces. in the enforcement in reality, in order on unit are, to obtain bigger capacitance, normally above-mentioned basic capacitor cell is repeatedly piled up, forms multi-layer capacity to obtain preferable technique effect.
Adopt the above-mentioned capacitor that elementary cell constituted 10, only the first main pole plate 210, the 3rd main pole plate 230 and the 5th main pole plate 250 etc. that are provided with at interval are connected with the expansion pole plate, and the main pole plate of the interval of half setting is not connected with the expansion pole plate in addition.
The advantage of this embodiment is, the number of the expansion pole plate of described structure has reduced half, and the position of expansion pole plate and conductive plunger are all identical perpendicular to the position of substrate 200 surface direction, therefore in the manufacture craft process, can adopt same mask to make all expansion pole plates, therefore reduce the manufacture craft cost.
And, though this kind structure has reduced the quantity of expansion pole plate, and then cause capacitance to reduce, but owing to cancelled the expansion pole plate of half, therefore capacitor plate the direction that is parallel to substrate can arrange tightr, thereby reduced the horizontal area of electric capacity, remedied the defective that capacitance reduces.
Being also advantageous in that of this embodiment, in two pole plates of the formed stack capacitor of this structure, a pole plate all is made of the expansion pole plate, and another pole plate all is made of the main pole plate, therefore no matter expand pole plate and whether the main pole plate adopts same material, two materials that pole plate is adopted separately of the stack capacitor after the parallel connection all are consistent, therefore can suppress the situation generation of capacitance with temperature and change in voltage.Certainly remove the expansion pole plate and and its nearest main pole plate between electric capacity, this structure also parasitism has other expanded capacitor, but that capacitance is compared with above-mentioned electric capacity is very little, almost can ignore the influence of total capacitance value.
From top narration as can be seen, compared with prior art, the described capacitor of this embodiment accomplishes that on technology cost and electrology characteristic balance takes into account.
The above only is a preferred implementation of the present utility model; should be pointed out that for those skilled in the art, under the prerequisite that does not break away from the utility model principle; can also make some improvements and modifications, these improvements and modifications also should be considered as protection range of the present utility model.
Claims (5)
1. integrated circuit stacking capacitor, comprise substrate and the one group of main pole plate that on substrate surface, is oppositely arranged, comprise the first main pole plate and the second main pole plate, it is characterized in that, be provided with the expansion pole plate between the described first main pole plate and the second main pole plate, described expansion pole plate only is connected with one of the first main pole plate or second main pole plate electricity, does not expand another main pole plate and expansion pole plate electric isolation that pole plate electricity connects therewith in two main pole plates.
2. integrated circuit stacking capacitor according to claim 1 is characterized in that, is filled with dielectric material between described main pole plate and the expansion pole plate.
3. integrated circuit stacking capacitor according to claim 1 is characterized in that, is connected by the conductive plunger electricity in the embedding medium material through hole between described expansion pole plate and the main pole plate.
4. integrated circuit stacking capacitor according to claim 1, it is characterized in that, on perpendicular to the direction of substrate surface, also comprise many groups main pole plate positioned opposite to each other, in each group main pole plate, only one of them main pole plate electricity is connected with the expansion pole plate, and the mutual electricity of the first main pole plate connects in each group, and the mutual electricity of the second main pole plate in each group connects.
5. integrated circuit stacking capacitor according to claim 4 is characterized in that, the electricity between the described main pole plate connects the conductive plunger that adopts in the embedding medium material through hole.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009200714171U CN201466027U (en) | 2009-04-30 | 2009-04-30 | Integrated circuit stacked capacitor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009200714171U CN201466027U (en) | 2009-04-30 | 2009-04-30 | Integrated circuit stacked capacitor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN201466027U true CN201466027U (en) | 2010-05-12 |
Family
ID=42393375
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2009200714171U Expired - Lifetime CN201466027U (en) | 2009-04-30 | 2009-04-30 | Integrated circuit stacked capacitor |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN201466027U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102956606A (en) * | 2011-08-18 | 2013-03-06 | 台湾积体电路制造股份有限公司 | Vertically oriented semiconductor device and shielding structure thereof |
| CN104714101A (en) * | 2013-12-17 | 2015-06-17 | 德尔福电子(苏州)有限公司 | Polar plate of capacitive sensor |
-
2009
- 2009-04-30 CN CN2009200714171U patent/CN201466027U/en not_active Expired - Lifetime
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102956606A (en) * | 2011-08-18 | 2013-03-06 | 台湾积体电路制造股份有限公司 | Vertically oriented semiconductor device and shielding structure thereof |
| CN102956606B (en) * | 2011-08-18 | 2015-10-21 | 台湾积体电路制造股份有限公司 | The semiconductor device of vertical orientation and shielding construction thereof |
| CN104714101A (en) * | 2013-12-17 | 2015-06-17 | 德尔福电子(苏州)有限公司 | Polar plate of capacitive sensor |
| CN104714101B (en) * | 2013-12-17 | 2018-10-30 | 安波福电子(苏州)有限公司 | A kind of capacitance sensor pole plate |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| ASS | Succession or assignment of patent right |
Owner name: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING Free format text: FORMER OWNER: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION Effective date: 20121116 |
|
| C41 | Transfer of patent application or patent right or utility model | ||
| COR | Change of bibliographic data |
Free format text: CORRECT: ADDRESS; FROM: 201210 PUDONG NEW AREA, SHANGHAI TO: 100176 CHAOYANG, BEIJING |
|
| TR01 | Transfer of patent right |
Effective date of registration: 20121116 Address after: 100176 Wenchang Avenue, Beijing Economic Development Zone, No. 18 Patentee after: Semiconductor Manufacturing International (Beijing) Corporation Address before: 201210 18 Zhangjiang Road, Shanghai, Pudong New Area Patentee before: Semiconductor Manufacturing International (Shanghai) Corporation |
|
| CX01 | Expiry of patent term | ||
| CX01 | Expiry of patent term |
Granted publication date: 20100512 |