CN201444668U - Decoding circuit and television set with same - Google Patents
Decoding circuit and television set with same Download PDFInfo
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- CN201444668U CN201444668U CN2009200300227U CN200920030022U CN201444668U CN 201444668 U CN201444668 U CN 201444668U CN 2009200300227 U CN2009200300227 U CN 2009200300227U CN 200920030022 U CN200920030022 U CN 200920030022U CN 201444668 U CN201444668 U CN 201444668U
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- image decoding
- decoding module
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Abstract
The utility model discloses a decoding circuit and a television set with the same. A monoblock PCB is simultaneously provided with a high-frequency head, a digital demodulator, a digital image decoding module, a power amplifier circuit and a peripheral interface, wherein the digital image decoding module is an integrated decoding chip supporting H.264 decoding standard, connected with the high-frequency head through the digital demodulator, carries out decoding processing on received digital signals, outputs a video signal to a display unit as well as an audio signal to the power amplifier circuit and further drives a loudspeaker to output through the power amplifier circuit; and the peripheral interface comprises various types of audio-video input and output interfaces which are connected with the digital image decoding module. In the utility model, the receiving, demodulating, decoding and other processing can be realized by adopting the single board design and the H.264 standard can be supported, and thereby the utility model reduces the hardware cost, improves the processing technology, simultaneously supports peripheral interfaces of global televisions and improves the universality of the PCB.
Description
Technical field
The utility model belongs to the signal processing circuit technical field, specifically, relates to a kind of television set that audio-video signal is carried out the circuit system design of decoding processing and adopts described decoding circuit design.
Background technology
At present, along with the quickening of various countries' digital broadcast television program process, development by leaps and bounds has been obtained in Digital Television market.For the consideration to the country variant actual conditions, its digital television standard also is not quite similar.Main in the world digital television standard has DVB-T (terrestrial wireless digital video broadcasting), DVB-C (digital video broadcast for cable), DVB-S (satellite digital video broadcast) and ATSC (the Advanced Television standard committee) standard or the like.Meanwhile, the numeral code encoding/decoding mode is also in continuous development, develop into MPEG-4 by original M PEG-2 at present, it wherein H.264 is exactly the 10th part of MPEG-4 encoding and decoding standard, be to generally acknowledge the most top code encoding/decoding mode at present in the world, compare with standard in the past, H.264 the advantage of more apparent encoding-decoding efficiency.Many countries of European Region are already H.264 classifying its domestic digital television standard as.
At present, adopt the television set decoding circuit of H.264 digital television standard design to design on a plurality of pcb boards mostly, generally comprise several sections such as decoding deck, terminal board and power board, poor compatibility, cost height, thus influenced extensively popularizing of Digital Television.
The utility model content
The utility model is in order to solve the problem that existing Digital Television adopts a plurality of pcb board design system circuit cost height, poor compatibility, a kind of brand-new decoding circuit structure is provided, by adopting single pcb board to carry out system design, supporting on the basis of digital encoding and decoding standard H.264, reduce hardware cost, improved processing technology.
For solving the problems of the technologies described above, the utility model is achieved by the following technical solutions:
A kind of decoding circuit is provided with tuner, digital demodulator, digital image decoding module, power amplifier and Peripheral Interface simultaneously on the monolithic pcb board; Wherein, described digital image decoding module is one and supports the H.264 integrated decoding chip of decoding standard, connect tuner by digital demodulator, after the digital signal that receives carried out decoding processing, outputting video signal is to display unit, output audio signal is to power amplifier, and then drives loud speaker output by power amplifier; In described Peripheral Interface, comprise polytype audio frequency and video input/output interface, connect described digital image decoding module.
Further, described tuner is digital analog integrated formula tuner, after the analog signal that receives exported to the sound table trap circuit that is provided with on the described pcb board and handle, transfer to described digital image decoding module, utilize the built-in intermediate level circuit of digital image decoding module to carry out the demodulation of anolog TV signals.
Further again, on described pcb board, also be provided with DDR memory, FLASH and NVM memory, be connected communication with described digital image decoding module respectively.
Further again, user's external equipment of pegging graft for convenience, in described Peripheral Interface, part audio frequency and video input/output interface is arranged with the form of vertical terminal and is arranged on the described pcb board, and all the other audio frequency and video input/output interfaces are arranged with the form of horizontal terminal and are arranged on the described pcb board; Wherein, vertical terminal preferred arrangements is in the side or the back of the equipment that described decoding circuit is installed, and horizontal terminal preferred arrangements is in the side of described equipment.
Further, in order to support the configuration requirement of global TV, HDMI interface, YPBPR interface, VGA interface, SCART terminal, AV interface, S-Video interface, USB interface, CI card socket and earphone jack in described Peripheral Interface, have been designed to Peripheral Interface; Wherein, the HDMI interface comprises multichannel, connects described digital image decoding module by the gating switch that is arranged on the described pcb board, by described digital image decoding module each road HDMI signalling channel is selected to switch.
Based on above-mentioned decoding circuit structure, the utility model also provides a kind of television set that adopts described decoding circuit design, on the monolithic pcb board, adopt single board design to realize reception, demodulation, the H.264 processing such as decoding and power amplification of digital television signal and anolog TV signals by the tuner that television set is required, digital demodulator, digital image decoding module, power amplifier and Peripheral Interface design; Meanwhile, by global TV Peripheral Interface is set, thereby under the prerequisite that reduces design cost, improved the versatility and the processing technology of decoding circuit plate on described pcb board.
Compared with prior art, advantage of the present utility model and good effect are: decoding circuit of the present utility model adopts single board design to realize the processing such as reception, demodulation sign indicating number of digital television signal and anolog TV signals, and support H.264 standard, thereby reduced hardware cost, improved processing technology.Carry out the compatibility design by outer spigot of plugging into, realized supporting the requirement of global TV Peripheral Interface, improved the versatility of decoding circuit plate, and then reduced design cost this circuit board.
After reading the detailed description of the utility model execution mode in conjunction with the accompanying drawings, other characteristics of the present utility model and advantage will become clearer.
Description of drawings
Fig. 1 is the schematic block circuit diagram of a kind of embodiment of the decoding circuit that proposes of the utility model;
Fig. 2 is the schematic layout pattern that decoding circuit shown in Figure 1 is arranged on a kind of embodiment on the monolithic pcb board.
Embodiment
Below in conjunction with accompanying drawing embodiment of the present utility model is done explanation in further detail.
Embodiment one, and present embodiment is that example comes the specific design scheme of the signal processing unit of television set inside except that display unit and power panel is described in detail with the digital television.
The tuner that digital television is required, digital demodulator, digital image decoding module, power amplifier and Peripheral Interface design are on the monolithic pcb board, to form the decoding circuit plate, referring to shown in Figure 1.Digital image decoding module wherein adopts one to support that H.264 the integrated decoding chip design of decoding standard realizes, and supports digital decoding and analog codec; Tuner preferably adopts digital analog integrated formula tuner to design.Tuner is after receiving TV signal, output to the input end of analog signal of digital image decoding module for anolog TV signals by Broadband IF (Wideband Intermediate Frequency), cooperate with the integrated intermediate level circuit of digital image decoding inside modules and carry out separating of anolog TV signals and be in harmonious proportion the decoding of video signal; For digital television signal, tuner at first outputs to after digital demodulator carries out demodulation process by Narrowband IF (narrowband intermediate frequency), export the digital signal input end of digital TS stream signal, H.264 decode and processing such as OSD demonstration by the digital image decoding module to the digital image decoding module.Described digital demodulator passes through I
2The C bus is come and the digital image decoding module communication, realizes reading and controlling of digital image decoding module logarithm type matrix quasi-solution adjusting information.
Export display unit to by the vision signal of exporting after the described digital image decoding module decoding processing,, carry out the demonstration output of television image such as liquid crystal display screen LCD or PDP screen; Audio signal by digital image decoding module output exports power amplifier to carry out power amplification and handle after, drive TV loudspeaker output television field frame.
A sound table trap circuit can also be set on the decoding circuit plate of present embodiment, be connected between the input end of analog signal of tuner and digital image decoding module, so that the anolog TV signals of described tuner output are decayed, and second accompanying sound intermediate frequency signal that extracts 6.5MHZ exports described digital image decoding module to, carries out separating of analog if signal and is in harmonious proportion picture decoding and handles.
On the decoding circuit plate of present embodiment, also be provided with the DDR memory, FLASH memory and the nonvolatile memory NVM that are connected communication respectively with the digital image decoding module.The digital image decoding module adopts clock rate and the DDR memory of 800MHz to carry out the picture frame caching process, with problems such as technology solution flating such as the interleave algorithm of realizing H.264 decoding and 3D.The start-up routine of the Flash memory bearing system of 64M and the storage of partial data information are with digital image decoding module walk abreast addressing of address and data communication, to solve OSD switching and switching channel and the slow problem of channel.The NVM memory then carries out safe storage to the application program and the significant data of system, to improve reliability of system operation.
For the decoding circuit plate that makes present embodiment is supported global TV Peripheral Interface, to improve the versatility of decoding circuit plate, on the decoding circuit plate of present embodiment, be provided with Peripheral Interfaces such as HDMI interface, YPBPR interface, VGA interface, SCART terminal, AV interface, S-Video interface, USB interface, CI card socket and earphone jack simultaneously, to satisfy of the user demand of global television set to the different peripheral interface.Wherein, the HDMI interface can be provided with multichannel according to actual needs, such as 3 the tunnel, by being arranged on the gating switch linking number word image decoder module on the decoding circuit plate.The digital image decoding module generates corresponding channel selecting signal according to user's needs and exports gating switch to, to realize the selection switching to each road HDMI signalling channel.
In addition, present embodiment has also carried out particular design to Peripheral Interface specifically arranging on the decoding circuit plate, to make things convenient for the user outside source and digital television is pegged graft.
Referring to shown in Figure 2, the form of part Peripheral Interface with vertical terminal is arranged on the decoding circuit plate, such as designing two vertical HDMI interface HDMI-1, HDMI-2; The vertical VPBPR video input interface of two groups of parallel arranged and VPBPR audio input interface VPBPR-1, VPBPR-2; A vertical AV output interface AV-1; And be used for the vertical VGA interface that is connected with computer and earphone jack EARPHONE-1 etc.Above-mentioned vertical terminal can be installed on the side or the back of television set, so that the user plugs use.In order to reduce the size of pcb board, some Peripheral Interface need be with the arranged in form of horizontal terminal on the decoding circuit plate, such as can design two horizontal SCART terminals, for optical fiber digital audio output seat J1, an AV input interface AV-2, S-Video interface, used as television earphone base EARPHONE-2, CI card socket, USB interface and Third Road HDMI interface HDMI-3 all can horizontal terminal the form design in the bottom of pcb board.User's external equipment of pegging graft accurately for convenience, described horizontal terminal is preferably mounted at the side of television set.
Certainly, the layout of above-mentioned Peripheral Interface on pcb board also can adopt other design form, and needing only to make things convenient for the user to plug is that principle is arranged.
Should be noted that; above-mentioned explanation is not to be to restriction of the present utility model; the utility model also is not limited in above-mentioned giving an example; variation, remodeling, interpolation or replacement that those skilled in the art are made in essential scope of the present utility model also should belong to protection range of the present utility model.
Claims (10)
1. a decoding circuit is characterized in that: be provided with tuner, digital demodulator, digital image decoding module, power amplifier and Peripheral Interface simultaneously on the monolithic pcb board; Wherein, described digital image decoding module is one and supports the H.264 integrated decoding chip of decoding standard, connect tuner by digital demodulator, after the digital signal that receives carried out decoding processing, outputting video signal is to display unit, output audio signal is to power amplifier, and then drives loud speaker output by power amplifier; In described Peripheral Interface, comprise polytype audio frequency and video input/output interface, connect described digital image decoding module.
2. decoding circuit according to claim 1, it is characterized in that: described tuner is digital analog integrated formula tuner, after the analog signal that receives exported to the sound table trap circuit that is provided with on the described pcb board and handle, transfer to described digital image decoding module, utilize the built-in intermediate level circuit of digital image decoding module to carry out the demodulation of anolog TV signals.
3. decoding circuit according to claim 1 is characterized in that: also be provided with DDR memory, FLASH and NVM memory on described pcb board, be connected communication with described digital image decoding module respectively.
4. according to each described decoding circuit in the claim 1 to 3, it is characterized in that: in described Peripheral Interface, part audio frequency and video input/output interface is arranged with the form of vertical terminal and is arranged on the described pcb board, and all the other audio frequency and video input/output interfaces are arranged with the form of horizontal terminal and are arranged on the described pcb board; Wherein, vertical terminal is distributed in the side or the back of the equipment that described decoding circuit is installed, and horizontal terminal is distributed in the side of described equipment.
5. according to each described decoding circuit in the claim 1 to 3, it is characterized in that: in described Peripheral Interface, comprise HDMI interface, YPBPR interface, VGA interface, SCART terminal, AV interface, S-Video interface, USB interface, CI card socket and earphone jack; Wherein, the HDMI interface comprises multichannel, connects described digital image decoding module by the gating switch that is arranged on the described pcb board, by described digital image decoding module each road HDMI signalling channel is selected to switch.
6. a television set comprises power panel and decoding deck, it is characterized in that: described decoding deck is the monolithic pcb board, and it is provided with tuner, digital demodulator, digital image decoding module, power amplifier and Peripheral Interface; Wherein, described digital image decoding module is one and supports the H.264 integrated decoding chip of decoding standard, connect tuner by digital demodulator, after the digital signal that receives carried out decoding processing, outputting video signal is to display unit, output audio signal is to power amplifier, and then drives loud speaker output by power amplifier; In described Peripheral Interface, comprise polytype audio frequency and video input/output interface, connect described digital image decoding module.
7. television set according to claim 6, it is characterized in that: described tuner is digital analog integrated formula tuner, after the analog signal that receives exported to the sound table trap circuit that is provided with on the described pcb board and handle, transfer to described digital image decoding module, utilize the built-in intermediate level circuit of digital image decoding module to carry out the demodulation of anolog TV signals.
8. television set according to claim 6 is characterized in that: also be provided with DDR memory, FLASH and NVM memory on described pcb board, be connected communication with described digital image decoding module respectively.
9. according to each described television set in the claim 6 to 8, it is characterized in that: in described Peripheral Interface, part audio frequency and video input/output interface is arranged with the form of vertical terminal and is arranged on the described pcb board, and all the other audio frequency and video input/output interfaces are arranged with the form of horizontal terminal and are arranged on the described pcb board; Wherein, vertical terminal is distributed in side or the back that television set is installed, and horizontal terminal is distributed in the side of television set.
10. according to each described television set in the claim 6 to 8, it is characterized in that: in described Peripheral Interface, comprise HDMI interface, YPBPR interface, VGA interface, SCART terminal, AV interface, S-Video interface, USB interface, CI card socket and earphone jack; Wherein, the HDMI interface comprises multichannel, connects described digital image decoding module by the gating switch that is arranged on the described pcb board, by described digital image decoding module each road HDMI signalling channel is selected to switch.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009200300227U CN201444668U (en) | 2009-07-17 | 2009-07-17 | Decoding circuit and television set with same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009200300227U CN201444668U (en) | 2009-07-17 | 2009-07-17 | Decoding circuit and television set with same |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN201444668U true CN201444668U (en) | 2010-04-28 |
Family
ID=42549346
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2009200300227U Expired - Fee Related CN201444668U (en) | 2009-07-17 | 2009-07-17 | Decoding circuit and television set with same |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN201444668U (en) |
-
2009
- 2009-07-17 CN CN2009200300227U patent/CN201444668U/en not_active Expired - Fee Related
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20100428 Termination date: 20120717 |