CN202406242U - High definition digital television set top box - Google Patents
High definition digital television set top box Download PDFInfo
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- CN202406242U CN202406242U CN2011204208072U CN201120420807U CN202406242U CN 202406242 U CN202406242 U CN 202406242U CN 2011204208072 U CN2011204208072 U CN 2011204208072U CN 201120420807 U CN201120420807 U CN 201120420807U CN 202406242 U CN202406242 U CN 202406242U
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- 230000015654 memory Effects 0.000 claims abstract description 26
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Abstract
The utility model relates to a high definition digital television set top box, comprising a television signal processing module and a processor. The processor is a one-chip microcomputer; the television signal processing module comprises VHF (Very High Frequency), UHF (Ultra High Frequency), a L-BAND and S-BAND television receiving antennas, a tuner, a time domain processor, a video signal processing device and a channel decoder. The tuner is in connection with the television receiving antennas and a radio frequency control terminal of the processor. The time domain processor is in connection with an FE control terminal of the processor and the video signal processing device. The video signal processing device is in connection with a VSP control terminal of the processor and the channel decoder. The channel decoder is in connection with a memory, an SATA interface, a USB interface, the processor and a host interface. The high definition digital television set top box supports global television standards, and for manufacturers, one machine can be sold to different nations, which can save a lot of exploitation costs and manpower costs.
Description
Technical field
The utility model relates to STB, particularly a kind of digital TV in high resolution STB.
Background technology
Raising along with development of science and technology and people's living standard; DTV becomes the product of main flow; It has the signal stabilization of televiewing; Advantages such as video output picture exquisiteness, but the standard that existing DTV STB can be supported is limited, and existing technique almost is exactly that a machine can only be supported a kind of standard.In addition, the existing scalable degree of DTV STB is not high, can not compatible network video capability and blue light playing function.
Summary of the invention
The purpose of the utility model is to provide global television standard of a kind of support and upgradeable digital TV in high resolution STB.
A kind of digital TV in high resolution STB; It comprises shell and the TV signal processing module, memory and the processor that are positioned at shell; Said shell front portion is provided with panel; Panel is provided with a plurality of interfaces, said processor and TV signal processing module, memory, and said a plurality of interfaces be connected.Said interface comprises SATA interface, USB interface and infrared interface at least, and said processor is a single-chip microcomputer.Said TV signal processing module comprises VHF, UHF, L-BAND and S-BAND television receiving antenna, tuner, time domain processor, video signal preprocessor and channel decoder; Said tuner links to each other with the radio frequency control end of said television receiving antenna and said processor, to said time domain processor output digital television signal; Said time domain processor links to each other with said video signal preprocessor with the FE control end of said processor; Said video signal preprocessor links to each other with channel decoder with the VSP control end of processor; Said channel decoder links to each other with processor with said memory, SATA interface, USB interface.
In a preferred embodiment, said channel decoder support comprise MPEG-1, MPEG-2, H.264, the decoding of the video format standard of WMV9, AVS and the decoding that comprises the audio format standard of PCM, Dolby Digital, AVS Audio, MPEG1-3, MPEG-4 AAC and WMA9.
In a preferred embodiment, said interface also comprises the network port, and said digital TV in high resolution STB also comprises the ethernet physical layer transceiver that links to each other with said channel decoder with the said network port.
In a preferred embodiment, described digital TV in high resolution STB also comprises blue light movement and the front end servo module that links to each other with said channel decoder with said blue light movement, and said front end servo module links to each other with said channel decoder through the SATA interface.
In a preferred embodiment, said memory module comprises synchronous DRAM, flash memories and electronics erasable read-only memory.Said on-chip system chip also is provided with DDR2 interface, nand flash interface and I2C interface.Said synchronous DRAM is connected with the DDR2 interface of on-chip system chip with the control signal port through its FPDP.Flash memories is connected with the nand flash interactive interfacing of on-chip system chip through its I/O interface.The electronics erasable read-only memory is connected with the I2C interactive interfacing of on-chip system chip through the I2C bus.
In a preferred embodiment, described digital TV in high resolution STB also comprises the HPI that links to each other with processor with said channel decoder, and said HPI comprises MPEG2-TS interface, MMIO interface, SPI interface and DiB interface.
The digital TV in high resolution STB of the utility model can be supported global television standard; And can carry out function upgrading through integrated network module and blue module; A machine can be sold to a plurality of different countries for producer; Practice thrift a lot of cost of developing, can also practice thrift the cost of a lot of manpowers.
Description of drawings
Fig. 1 is the structured flowchart of the digital TV in high resolution STB of an embodiment.
Embodiment
To combine specific embodiment and accompanying drawing that the utility model digital TV in high resolution STB is described in further detail below.
The digital TV in high resolution STB of the utility model comprises shell, and this shell is provided with panel.This panel is the part of shell, its can comprise be positioned at anterior front panel, with front panel opposing backside surface plate and superposed top panel.Can be provided with the switching on and shutting down button on top panel or the front panel, can be provided with a plurality of interfaces on rear board or the front panel, include but not limited to SATA interface, USB interface, PS/2 interface, infrared interface and audio and video output interface.
As shown in Figure 1, this digital TV in high resolution STB also comprises TV signal processing module, HPI, memory, processor, network connecting module, blue light movement, front end servo module and the power module that is positioned at shell.Wherein, processor is a single-chip microcomputer, and it is provided with digital catv signal receiving terminal DVB-CA MULTI-2, can receive the digital catv signal of multiple standard.Network connecting module mainly comprises network interface and ethernet physical layer transceiver.
TV signal processing module mainly comprises VHF (very high frequency; High frequency), UHF (ultra high frequency, superfrequency), L-BAND and S-BAND television receiving antenna, tuner, time domain processor, video signal preprocessor and channel decoder.Tuner links to each other with the radio frequency control end RF CTRL and the time domain processor of above-mentioned television receiving antenna, processor, is used for to time domain processor output digital television signal.The time domain processor links to each other with video signal preprocessor with the FE control end FE CTRL of processor, is used for the correction of analytic signal system, and the full detail of system time response etc. can be provided.Video signal preprocessor links to each other with channel decoder with the VSP control end VSP CTRL of processor; Be used for various common video input signals are carried out the processing that image quality promotes; Various video input switching displayed, and be normalized to the resolution that meets VESA standard or CEA standard.The CD IF interface and the HPI of the USB interface on channel decoder and the panel, SATA interface, memory, ethernet physical layer transceiver, front end servo module, processor link to each other.The channel decoder support comprise MPEG-1, MPEG-2, H.264, the decoding of the video format standard of WMV9, AVS and the decoding that comprises the audio format standard of PCM, Dolby Digital, AVS Audio, MPEG1-3, MPEG-4 AAC and WMA9.Channel decoder is used under the control of processor the audio-video signal from the digital catv signal of video signal preprocessor or from processor is decoded; Or to decoding from the audio-video signal of USB flash disk that links to each other with USB interface or WIFI wireless network; Or to decoding, or to decoding from the audio-video signal of Ethernet or blue light front end servo module from the audio-video signal of the hard disk drive (HDD) that links to each other with the SATA interface.
HPI links to each other with the HPI HOST IF of processor and the audio and video output interface on the panel.HPI can include but not limited to for example MPEG2-TS interface, MMIO interface, SPI interface, DiB interface, VGA interface, DVI interface, HDMI interface and Display port interface.
Memory links to each other with the memory control bus MEM CTRL of processor, and it can comprise synchronous DRAM, flash memories and electronics erasable read-only memory.Concrete, synchronous DRAM is connected with the DDR2 interface of processor with the control signal port through its FPDP.Flash memories is connected with the nand flash interactive interfacing of processor through its I/O interface.The electronics erasable read-only memory is connected with the I2C interactive interfacing of processor through the I2C bus.
The ethernet physical layer transceiver links to each other with network interface.The ethernet physical layer transceiver links to each other with the FEC IF interface of processor, and FEC IF interface can be MII GMII or SNI serial network interface.
The blue light movement can adopt existing ripe blue light movement, comprises CD bearing device, optical read head, radio frequency amplifier and the drive circuit of motor and driving thereof.The front end servo module links to each other with the BD CTRL end of blue light movement and processor, and it can comprise processor, servo circuit and memory based on digital signal.Because this technology belongs to than mature technique, repeats no more at this.The front end servo module links to each other with the display system chip through the TS stream interface.Among other embodiment, available DVD player core replaces the blue light movement.
Power module links to each other with the power control terminal PMU CTRL of processor, is used under the control of processor, for above each module electric energy being provided.
In the utility model; Processor is through LINUX or ANDROID system each functional module to be managed and called; Each functional module is modeled to the different external equipments of operating system---for example simulate full system type pictorial STB, blue light player and Web TV; Accomplish the scheduling of various tasks through interruption controls, the control channel decoder is decoded to different audio-video signals, and is very easy to use.
The TV signal processing module of the digital TV in high resolution STB of the utility model is provided with VHF, UHF, L-BAND and four kinds of television receiving antennas of S-BAND; And processor is provided with the digital catv signal receiving terminal; Can support the TV signal of the standard in global country variant areas such as ATSC/ISDB-T/DVB-T/CMMB; Therefore can search the programme signal of the different systems that sends in the country variant area, and play.In addition, TV signal processing module, mixed-media network modules mixed-media and blue module are merged,, switch the conversion that can realize that difference in functionality uses, the machine of realizing many " abilities " through remote controller through software control through channel decoder.
Though the description to the utility model combines above specific embodiment to carry out,, those skilled in the art that can carry out many replacements, modification and variation according to above-mentioned content, be conspicuous.Therefore, all are such substitute, improve and change all is included in the spirit and scope of attached claim.
Claims (6)
1. digital TV in high resolution STB; Comprise shell and the TV signal processing module, memory and the processor that are positioned at shell; Said shell front portion is provided with panel; Panel is provided with a plurality of interfaces, said processor and TV signal processing module, memory, and said a plurality of interfaces be connected, it is characterized in that:
Said interface comprises SATA interface, USB interface and infrared interface at least, and said processor is a single-chip microcomputer;
Said TV signal processing module comprises VHF, UHF, L-BAND and S-BAND television receiving antenna, tuner, time domain processor, video signal preprocessor and channel decoder; Said tuner links to each other with the radio frequency control end of said television receiving antenna and said processor, to said time domain processor output digital television signal; Said time domain processor links to each other with said video signal preprocessor with the FE control end of said processor; Said video signal preprocessor links to each other with channel decoder with the VSP control end of processor; Said channel decoder links to each other with processor with said memory, SATA interface, USB interface.
2. digital TV in high resolution STB according to claim 1; It is characterized in that, said channel decoder support comprise MPEG-1, MPEG-2, H.264, the decoding of the video format standard of WMV9, AVS and the decoding that comprises the audio format standard of PCM, Dolby Digital, AVS Audio, MPEG1-3, MPEG-4 AAC and WMA9.
3. digital TV in high resolution STB according to claim 2 is characterized in that said interface also comprises the network port, and said digital TV in high resolution STB also comprises the ethernet physical layer transceiver that links to each other with said channel decoder with the said network port.
4. digital TV in high resolution STB according to claim 3; It is characterized in that; Also comprise blue light movement and the front end servo module that links to each other with said channel decoder with said blue light movement, said front end servo module links to each other with said channel decoder through the SATA interface.
5. according to the described digital TV in high resolution STB of claim 4, it is characterized in that said memory comprises synchronous DRAM, flash memories and electronics erasable read-only memory; Said processor also is provided with DDR2 interface, nand flash interface and I2C interface; Said synchronous DRAM is connected with the DDR2 interface of processor with the control signal port through its FPDP; Flash memories is connected with the nand flash interactive interfacing of processor through its I/O interface; The electronics erasable read-only memory is connected with the I2C interactive interfacing of processor through the I2C bus.
6. according to each described digital TV in high resolution STB in the claim 1 to 5; It is characterized in that; Also comprise the HPI that links to each other with processor with said channel decoder, said HPI comprises MPEG2-TS interface, MMIO interface, SPI interface and DiB interface.
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CN2011204208072U CN202406242U (en) | 2011-10-31 | 2011-10-31 | High definition digital television set top box |
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CN2011204208072U CN202406242U (en) | 2011-10-31 | 2011-10-31 | High definition digital television set top box |
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CN2011204208072U Expired - Fee Related CN202406242U (en) | 2011-10-31 | 2011-10-31 | High definition digital television set top box |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105099477A (en) * | 2015-08-07 | 2015-11-25 | 成都市斯达鑫辉视讯科技有限公司 | Set top box with frequency modulation radio function |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105099477A (en) * | 2015-08-07 | 2015-11-25 | 成都市斯达鑫辉视讯科技有限公司 | Set top box with frequency modulation radio function |
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Granted publication date: 20120829 Termination date: 20151031 |
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EXPY | Termination of patent right or utility model |