CN201425939Y - Flip chip IC package structure - Google Patents

Flip chip IC package structure Download PDF

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Publication number
CN201425939Y
CN201425939Y CN 200920093598 CN200920093598U CN201425939Y CN 201425939 Y CN201425939 Y CN 201425939Y CN 200920093598 CN200920093598 CN 200920093598 CN 200920093598 U CN200920093598 U CN 200920093598U CN 201425939 Y CN201425939 Y CN 201425939Y
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CN
China
Prior art keywords
circuit board
flexible circuit
projection
wire
lead
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN 200920093598
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Chinese (zh)
Inventor
叶启村
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Individual
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Individual
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Publication date
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Priority to CN 200920093598 priority Critical patent/CN201425939Y/en
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Publication of CN201425939Y publication Critical patent/CN201425939Y/en
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Expired - Fee Related legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors

Landscapes

  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Abstract

Te utility model provides a flip chip IC package structure, which belongs to the electronic field and mainly comprises a flexible circuit board (such as a COF or a TCP) for an IC to bond thereon, a sealing compound wrapped on the IC, and metal pieces lapped above the IC, wherein the lead out points (pad) of the IC adopt metal bulges, so that the IC is combined with the lead wire of the flexible circuit board through the bulges and cut into single particle modules; and then the IC is combined with a base plate (PCB) in a front side ball array type or a back side ball array type (BGAorMu-BGA) orin a pin type. Therefore, the area and space of the lead out contact points (pad) of the IC are reduced; the crystal grain number of the unit wafer is increased; the interior IC storage capability inunit area or the number of data lead out points (data I/Opad) is increased; and the cost of unit wafer is reduced, the noise is reduced and the performance is improved, the sealing cost and the sealing area is diminished, and the IC package structure is light, thin, short and small.

Description

Crystal covering type IC packaging structure
Technical field
The utility model relates to electrical category, be particularly related to a kind of crystal covering type IC packaging structure, especially refer to present traditional ball array type encapsulation of a kind of breakthrough (BGA) or microminiature ball array type encapsulation (μ BGA/window BGA), cooperate the crystal covering type IC packaging structure of traditional wire bonder (Wire Bounder) technology with substrate (sub-tray).
Background technology
The manner of packing of common IC, as shown in Figure 1, be with traditional ball array type encapsulation (BGA) or microminiature ball array type encapsulation (μ-BGA/window BGA), the structure of its packing, system draws the pin 111 of contact 101 (Pad) by routing 12 (Wire Bounder) technology and substrate 11 with traditional wire bonder with IC10, again after IC10 sealing 13 after IC10 is placed a substrate 11 (sub-tray), constitute the IC module, when using, combine with substrate 15 by tin ball 14.There is following shortcoming in the packaging structure that this is common:
1.IC10 draw contact (Pad) area and spacing be difficult to reduce, the number of die of the unit's of making wafer (Wafer) (Gross Die) can't increase.
2. can't increase memory integrated circuits (memory IC) capacity per unit area or data leading point (dataI/O pad) quantity, the unit's of making crystal grain cost is higher, is difficult to eliminate noise and improves performance (performance).
3. packaging cost height, and package area is bigger, is not suitable for compact product design.
4. encapsulating material use amount height is not inconsistent environmental requirement, and the maintenance renewal part is difficult for.
The utility model content
The purpose of this utility model is to provide a kind of crystal covering type IC packaging structure, to break through present traditional ball array type encapsulation or the encapsulation of microminiature ball array type, the defective that cooperates traditional wire bonder technology with substrate, and then reduction manufacturing cost, eliminate noise and improve performance, and be applicable to compact product design.
A kind of crystal covering type IC packaging structure comprises:
IC, its leading point system is provided with the projection of metal;
Flexible circuit board is the lead-in wire that is provided with corresponding to the IC projection, adheres on this back for IC, makes each projection be pressed on lead-in wire, will other IC and flexible circuit board cutting, with sealing with IC, and flexible circuit board coat;
By aforesaid component composition, constitute single IC module, and combine with substrate with front ball array type or reverse side ball array type or pinned, draw contact area and spacing, increase the number of die of unit wafer thereby reduce IC, and stockpile IC capacity per unit area or data leading point quantity in increasing, the unit's of making crystal grain cost reduces, and more can reduce noise and improve performance, and reduce packaging cost, dwindle package area, be beneficial to compact product design;
Wherein the lead-in wire of the projection of this IC and flexible circuit board is to make projection and wire bond by anisotropic conductive;
Wherein, the top of this IC or the bottom surface of flexible circuit board are to be provided with metalwork, for the effect of protection IC and heat radiation;
Wherein, this metalwork is the material of metal or other hard;
Wherein, this flexible circuit board is single sided board or double sided board;
Crystal covering type IC packaging structure, system comprises the flexible circuit board that posts for IC, the sealing that is coated on IC, and the metalwork that repeatedly places the IC top, wherein, the leading point system of this IC is provided with the projection of metal, after making the wire bond of IC, be cut into single IC module, combine with substrate with front ball array type or reverse side ball array type or pinned again by projection and flexible circuit board; Thereby can reduce IC and draw contact area and spacing, and then the number of die of increase unit wafer, and the quantity that stockpiles IC capacity per unit area or data leading point in increasing, the unit's of making crystal grain cost reduces, more can reduce noise and improve performance, and the reduction packaging cost, dwindle package area, be beneficial to compact product design.
Aforesaid crystal covering type IC packaging structure, wherein this is located at the metalwork of IC top, is can be for metal or other hard material of protection IC and heat transmission;
Aforesaid crystal covering type IC packaging structure, wherein the lead-in wire of the projection of this IC and flexible circuit board is can be by anisotropic conductive (ACF) combination.
Advantage of the present utility model is: there is following advantage in the utility model than the traditional IC packaging structure:
1. can reduce IC and draw contact area and spacing, and then increase the number of die of unit wafer and increase memory integrated circuits capacity per unit area or data leading point quantity, the unit's of making crystal grain cost reduces, and more can reduce noise and improve performance.
2. can reduce packaging cost, dwindle package area, simplify framework, reach compact product design.
3. can reduce the encapsulating material use amount, thereby reach the purpose of environmental protection.
4. being easy to overhaul renewal part re-uses.
5, the utility model can be applicable to all types of IC, as Memory, SOC, Communication, Consumer .... wait the combination processing between IC and PCB.
The utility model is to be provided with the IC of leading point projection, cooperate flexible circuit board, break through present traditional ball array type encapsulation or the encapsulation of microminiature ball array type, cooperate the disappearance of traditional wire bonder technology with substrate, and then the reduction manufacturing cost, and be applicable to compact product design.
Description of drawings:
Accompanying drawing 1 is common IC packaging structure figure.
Accompanying drawing 2 is an IC plane graph of the present utility model.
Accompanying drawing 3 is an IC end view of the present utility model.
Accompanying drawing 4 is that IC of the present utility model combines figure with flexible circuit board.
Accompanying drawing 5 combines figure for the IC after the utility model cutting with flexible circuit board.
Accompanying drawing 6 is the first example structure figure of the present utility model.
Accompanying drawing 7 is the second example structure figure of the present utility model.
Accompanying drawing 8 is the 3rd example structure figure of the present utility model.
Accompanying drawing 9 is the first embodiment assembly drawing of the present utility model.
Accompanying drawing 10 is the second embodiment assembly drawing of the present utility model.
Accompanying drawing 11 is the 3rd an embodiment assembly drawing of the present utility model.
Accompanying drawing 12 is another assembly drawing of the 3rd embodiment of the present utility model.
Embodiment:
As accompanying drawing 1 to shown in the accompanying drawing 5, the utility model mainly comprises IC2 and flexible circuit board 3, in the leading point 21 of IC2 is the projection 22 that is provided with metal, 3 of this flexible circuit boards are provided with the lead-in wire 31 corresponding to projection 22, after IC2 adhered on this flexible circuit board 3, make each projection 22 be pressed on lead-in wire 31, or projection 22 is combined with lead-in wire 31, again with indivedual IC2 and flexible circuit board 3 cuttings by anisotropic conductive.Combination technology of the present utility model can reach line-spacing 20 ~ 25 μ m, so can be used for all IC, more is better than the restriction about the about 80 μ m of traditional wire bonder, therefore can increase the clean number of die of unit wafer.
As shown in Figure 6; after IC2 and flexible circuit board 3 combine and are cut into single module; a metalwork 4 is repeatedly put in the top that lies in IC2; and IC2, metalwork 4 and flexible circuit board 3 are coated with sealing 5; to constitute single IC module of positive lead type; wherein, this metalwork 4 is to be the material of metal or other hard for protection IC2 and heat transmission.
As shown in Figure 7, flexible circuit board 3 of the present utility model is to be made as a double sided board, makes the lead-in wire 31 of flexible circuit board 3 be distributed in upper and lower surface with perforation means, when the pin 31 in lower surface links tin ball 6, constitutes single IC module of reverse side ball array type.
As shown in Figure 8, being another embodiment of the present utility model, is can be according to the structure of accompanying drawing 6, is provided with tin ball 6 in the lead-in wire 31 of flexible circuit board 3, and will metalwork 4 wherein be located at the bottom surface of flexible circuit board 3, to constitute single IC module of front ball array type.
Because single IC module of the different types after the aforementioned packing, can be assembled in substrate for processing, its assembling mode has multiple, as shown in Figure 9, system places the IC module of accompanying drawing 6 on the substrate 7, be connected on the printed circuit 72 of substrate 7 by the lead-in wire 31 of scolding tin contact 71 with flexible circuit board 3, the assembly cost of present embodiment is minimum, only need change existing method of testing.Can do extension according to the leading point 21 of IC2 four limit layouts around the aforementioned flexible circuit board 3, the line-spacing line of engagement of its wiring and line-spacing are aimed to control both minimum clearance sides according to traditional alignment mark and technology, and the crack engages with scolding tin contact 71 during this time.
As shown in Figure 10, the IC module is placed on the substrate 8, the tin ball 6 that the pin 31 of being located at flexible circuit board 3 lower surfaces is linked is linked on the printed circuit 81 of substrate 8, and the assembling of present embodiment can replace traditional ball array type encapsulation or the encapsulation of microminiature ball array type.
As shown in Figure 11, it is the processing assembled embodiment of the IC module of accompanying drawing 8, its assembling mode system places the IC module on the substrate 9, the tin ball 6 that the pin 31 of being located at flexible circuit board 3 upper surfaces is linked, be linked on the printed circuit 91 of substrate 9, usefulness the best of present embodiment only need change existing testing tool.
The embodiment of aforementioned figures 11, system can be as accompanying drawing 12, be provided with a groove 92 in wherein substrate 9, make the IC module place this groove 92, the tin ball 6 same, that the pin 31 of being located at flexible circuit board 3 upper surfaces is linked is linked on the printed circuit 91 of substrate 9, thereby can dwindle whole height, with the circuit board miniaturization.

Claims (5)

1, a kind of crystal covering type IC packaging structure is characterized in that comprising:
IC, its leading point system is provided with the projection of metal;
Flexible circuit board is the lead-in wire that is provided with corresponding to the IC projection, adheres on this back for IC, makes each projection be pressed on lead-in wire, with the cutting of indivedual IC and flexible circuit board, with sealing with IC, and flexible circuit board coat.
2, according to the described crystal covering type IC of claim 1 packaging structure, it is characterized in that: the lead-in wire of the projection of this IC and flexible circuit board wherein, and can make projection and wire bond by anisotropic conductive.
3, according to the described crystal covering type IC of claim 1 packaging structure, it is characterized in that: the bottom surface of the top of this IC or flexible circuit board wherein is to be provided with metalwork.
4, according to the described crystal covering type IC of claim 1 packaging structure, it is characterized in that; Wherein this metalwork is the material of metal or other hard.
5, according to the described crystal covering type IC of claim 1 packaging structure, it is characterized in that; Wherein this flexible circuit board is single sided board or double sided board.
CN 200920093598 2009-05-12 2009-05-12 Flip chip IC package structure Expired - Fee Related CN201425939Y (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 200920093598 CN201425939Y (en) 2009-05-12 2009-05-12 Flip chip IC package structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN 200920093598 CN201425939Y (en) 2009-05-12 2009-05-12 Flip chip IC package structure

Publications (1)

Publication Number Publication Date
CN201425939Y true CN201425939Y (en) 2010-03-17

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN 200920093598 Expired - Fee Related CN201425939Y (en) 2009-05-12 2009-05-12 Flip chip IC package structure

Country Status (1)

Country Link
CN (1) CN201425939Y (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2012171240A1 (en) * 2011-06-17 2012-12-20 深圳市华星光电技术有限公司 Cof, cof carrier tape and driver circuit for liquid crystal television
CN102951596A (en) * 2012-11-12 2013-03-06 烟台睿创微纳技术有限公司 Vacuum packaging structure of semiconductor MEMS (Micro Electronic Mechanical System)
CN112071249A (en) * 2020-09-03 2020-12-11 深圳市华星光电半导体显示技术有限公司 Chip on film and display panel

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2012171240A1 (en) * 2011-06-17 2012-12-20 深圳市华星光电技术有限公司 Cof, cof carrier tape and driver circuit for liquid crystal television
CN102951596A (en) * 2012-11-12 2013-03-06 烟台睿创微纳技术有限公司 Vacuum packaging structure of semiconductor MEMS (Micro Electronic Mechanical System)
CN102951596B (en) * 2012-11-12 2015-05-13 烟台睿创微纳技术有限公司 Vacuum packaging structure of semiconductor MEMS (Micro Electronic Mechanical System)
CN112071249A (en) * 2020-09-03 2020-12-11 深圳市华星光电半导体显示技术有限公司 Chip on film and display panel

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C14 Grant of patent or utility model
GR01 Patent grant
C17 Cessation of patent right
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20100317

Termination date: 20120512