CN201369565Y

CN201369565Y - Static discharge protecting circuit

Info

Publication number: CN201369565Y
Application number: CNU200920145153XU
Authority: CN
Inventors: 石万文; 雷红军; 杭晓伟
Original assignee: SUZHOU HUAXIN MICRO-ELECTRONICS Co Ltd
Current assignee: Suzhou Huaxin Microelectronics Co., Ltd.
Priority date: 2009-03-10
Filing date: 2009-03-10
Publication date: 2009-12-23
Anticipated expiration: 2019-03-10

Abstract

The utility model discloses a static discharge protecting circuit, which comprises a resistance capacitance circuit and a discharge transistor, wherein the resistance capacitance circuit is connected between an input end or an output end of an integrate circuit and an earth lead, and the discharge transistor is connected between the input end or the output end of the integrate circuit and the earth lead, and the output end of the resistance capacitance circuit is connected with a control input electrode of the discharge transistor. The static discharge protecting circuit is characterized by further comprising a voltage detecting circuit, the voltage detecting circuit is connected between the input end or the output end of the integrate circuit and the earth lead, and the output end of the voltage detecting circuit is connected with the control input electrode of the discharge transistor. The static discharge protecting circuit of the utility model has simple structure, easy improvement, low cost and high economic benefits.

Description

A kind of ESD protection circuit

Technical field

The utility model relates to a kind of ESD protection circuit of integrated circuit fields.

Background technology

In daily production and life, static discharge (ESD, Electrostatic Discharge) is unusual common phenomena.In manufacturing, encapsulation, test and the use of integrated circuit, the electrostatic charge of accumulation discharges in the short time with bigger electric current, can bring destructive consequence to integrated circuit.Static discharge is the one of the main reasons that causes ic failure.So the design of ESD protection circuit is directly connected to the performance of chip in the integrated circuit (IC) design, and is very important.Integrated circuit electrostatic discharge protective circuit in the past nearly all is to adopt the spike of detection transient voltage to make the method for discharge tube conducting realize the effect of electrostatic protection; this method can only play a protective role to the static discharge of utmost point short time; and it is very poor for relatively long situation protective effect of the static discharge time of causing by various reasons; in this case, tend to integrated circuit is caused huge injury.

The utility model content

Purpose of the present invention just is to solve problems of the prior art, designs a kind of novel ESD protection circuit structure, can all play the better protect effect to the relative long static discharge situation with the time of transient voltage spike.

The utility model adopts following technical scheme:

A kind of ESD protection circuit; comprise resistor capacitor circuit and discharge transistor; resistor capacitor circuit is connected inputing or outputing between end and the earth connection of integrated circuit; discharge transistor is connected inputing or outputing between end and the earth connection of integrated circuit; the output of resistor capacitor circuit is connected with the control of the discharge transistor input utmost point; it is characterized in that described ESD protection circuit also comprises voltage detecting circuit; voltage detecting circuit is connected inputing or outputing between end and the earth connection of integrated circuit, and the output of voltage detecting circuit is connected with the control of the discharge transistor input utmost point.

Preferably, described voltage detecting circuit comprises bleeder circuit, current mirror and NMOS pipe, the output of bleeder circuit connects the grid of a NMOS pipe, the source electrode of the one NMOS pipe connects earth connection, current mirror is made up of PMOS pipe and the 2nd PMOS pipe, the source electrode of the one PMOS pipe connects the end that inputs or outputs of integrated circuit, its drain electrode connects the drain electrode of a NMOS pipe, the source electrode of the 2nd PMOS pipe connects the end that inputs or outputs of integrated circuit, and its drain electrode connects the output of resistor capacitor circuit.

ESD protection circuit of the present utility model is by increasing voltage detecting circuit on the basis of conventional electrostatic discharge protection circuit; except playing a protective role to transient voltage spike static discharge better, the situation relatively long for the static discharge time of being caused by various reasons also plays a very good protection.ESD protection circuit of the present utility model is simple in structure, improves easily, and is with low cost, the economic benefit height.

Description of drawings

Fig. 1 is an ESD protection circuit structured flowchart of the present utility model;

Fig. 2 is an ESD protection circuit schematic diagram of the present utility model.

Embodiment

The utility model will be further described below in conjunction with accompanying drawing.

According to the requirement that the relative long situation with the static discharge time of transient voltage spike is all played a protective role; adopt resistor capacitor circuit detection transient voltage spike and voltage detecting circuit acting in conjunction to control discharge tube and timely electrostatic charge is released, avoid damaging integrated circuit.Circuit structure is as shown in Figure 1:

ESD protection circuit comprises resistor capacitor circuit (being called for short the RC circuit), discharge transistor and voltage detecting circuit.The RC circuit is connected inputing or outputing between end and the earth connection GND of integrated circuit, discharge transistor is connected inputing or outputing between end and the earth connection GND of integrated circuit, the output of RC circuit is connected with the control of the discharge transistor input utmost point, voltage detecting circuit is connected inputing or outputing between end and the earth connection of integrated circuit, and the output of voltage detecting circuit is connected with the output of resistor capacitor circuit.

Operation principle: when the transient voltage spike of extraneous static formation acts on integrated circuit input or output port, open discharge transistor rapidly after the RC time network of RC circuit composition detects this due to voltage spikes on the one hand, voltage detecting circuit also can detect due to voltage spikes and open discharge transistor on the other hand.And, also can open discharge transistor by the effect of voltage detecting circuit when the long sphere of action that exceeds the RC time network of static discharge time.Voltage detecting circuit inputs or outputs the magnitude of voltage of port by the sampling integrated circuit, and judge whether this magnitude of voltage takes different actions greater than certain reference value, to distinguish this voltage is normal operating voltage signal or static: if this magnitude of voltage is less than reference value, can be judged as this voltage is normal operating voltage signal, and discharge transistor is kept closed condition; If it is static that this magnitude of voltage, can be judged as this voltage greater than reference value, discharge transistor is opened.Discharge transistor can be released electrostatic charge after opening timely, plays the electrostatic discharge (ESD) protection effect.

Be the circuit theory diagrams of the utility model one instantiation circuit as shown in Figure 2.

Wherein: discharge transistor N2 adopts the NMOS pipe, and its grid is the control input utmost point, and what drain electrode connected integrated circuit inputs or outputs port PIN, and source electrode connects earth connection GND.

Resistance R 1 and R2 are composed in series bleeder circuit, and the link of two resistance is the output of bleeder circuit.The output of bleeder circuit connects the grid of NMOS pipe N1, and the source electrode of a NMOS pipe connects earth connection GND.The one PMOS pipe P1 and the 2nd PMOS pipe P2 form current mirror, the source electrode of the one PMOS pipe P1 connects inputing or outputing of integrated circuit and holds PIN, it drains and connects the drain electrode of NMOS pipe N1, and the source electrode of the 2nd PMOS pipe P2 connects inputing or outputing of integrated circuit and holds PIN.The RC circuit that capacitor C 1 and resistance R 3 are formed is connected inputing or outputing between end PIN and the earth connection GND of integrated circuit, and the link of resistance R 3 and capacitor C 1 is the output of RC circuit, and this output is connected with the grid of discharge transistor N2.The drain electrode of the 2nd PMOS pipe P2 connects the output of the output formation voltage detecting circuit of RC circuit, and the output of voltage detecting circuit also is connected with the grid of discharge transistor N2.

Input or output end during PIN as what the electrostatic potential spike acted on integrated circuit, the time constant that capacitor C 1 and resistance R 3 are formed can determine speed that discharge transistor N2 opens and the time of keeping opening.Act on as the electrostatic potential spike and to input or output end PIN or the static discharge time when longer relatively, the voltage detecting circuit that resistance R 1, R2, R3 and PMOS pipe P1, the 2nd PMOS pipe P2 and NMOS pipe N1 form can be opened discharge transistor N2 till electrostatic charge has been released substantially.Its principle is: after resistance R 1, R2 sample the cut-in voltage of PIN terminal voltage greater than NMOS pipe N1, just have electric current to ground from the PIN end by a PMOS pipe P1, NMOS pipe N1, will on resistance R 3, form voltage behind this electric current of the 2nd PMOS pipe P2 mirror image, behind the cut-in voltage of this voltage greater than discharge transistor N2, static just can be released by discharge transistor N2.The very strong static of can well releasing of conductive capability of general discharge transistor N2 is regulated resistance R 1, R2, R3, and PMOS pipe P1, P2 and NMOS pipe N1 just can regulate reference value, and this reference value can be distinguished normal operating voltage signal or static reference value.

This embodiment only is an instantiation of the present utility model, must not be considered as restriction of the present utility model.

Claims

1. ESD protection circuit; comprise resistor capacitor circuit and discharge transistor; resistor capacitor circuit is connected inputing or outputing between end and the earth connection of integrated circuit; discharge transistor is connected inputing or outputing between end and the earth connection of integrated circuit; the output of resistor capacitor circuit is connected with the control of the discharge transistor input utmost point; it is characterized in that described ESD protection circuit also comprises voltage detecting circuit; voltage detecting circuit is connected inputing or outputing between end and the earth connection of integrated circuit, and the output of voltage detecting circuit is connected with the control of the discharge transistor input utmost point.

2. ESD protection circuit as claimed in claim 1; it is characterized in that described voltage detecting circuit comprises bleeder circuit, current mirror and NMOS pipe; the output of bleeder circuit connects the grid of a NMOS pipe; the source electrode of the one NMOS pipe connects earth connection; current mirror is made up of PMOS pipe and the 2nd PMOS pipe; the source electrode of the one PMOS pipe connects the end that inputs or outputs of integrated circuit; its drain electrode connects the drain electrode of a NMOS pipe; the source electrode of the 2nd PMOS pipe connects the end that inputs or outputs of integrated circuit, and its drain electrode connects the output of resistor capacitor circuit.

3. ESD protection circuit as claimed in claim 1 is characterized in that described discharge transistor is the NMOS pipe, and the grid of discharge transistor is the control input utmost point, and drain electrode connects the end that inputs or outputs of integrated circuit, and source electrode connects earth connection.

4. ESD protection circuit as claimed in claim 2 is characterized in that described bleeder circuit is composed in series by resistance.