CN201307970Y - Circuit board - Google Patents
Circuit board Download PDFInfo
- Publication number
- CN201307970Y CN201307970Y CNU2008201235381U CN200820123538U CN201307970Y CN 201307970 Y CN201307970 Y CN 201307970Y CN U2008201235381 U CNU2008201235381 U CN U2008201235381U CN 200820123538 U CN200820123538 U CN 200820123538U CN 201307970 Y CN201307970 Y CN 201307970Y
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- chip
- circuit board
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- integrated circuit
- control chip
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Abstract
The utility model discloses a circuit board, which is characterized in that the circuit board comprises at least two groups of integrated circuit chips and at least one memorizing unit, wherein, at least one group of the integrated circuit chips is of a control chip, and each memorizing unit is respectively connected with the group of control chips, and each control chip is respectively connected with an external receiving card; each group of integrated circuit chip respectively comprises at least one chip; the integrated circuit chips and the memorizing units are arranged according to the pre-determined positions. By adopting the above technical proposal, the user can select the driver or the control chip to perform the welding according to the requirements; the memorizing unit on a unit plate can realize the storage of the adjusted data, thereby realizing the disorder arrangement of the display screens which consists of the unit plate, and saving cost, and saving the screen assembling time; the memorizing unit stores the parameters of the unit plate, and can realize the reading of the parameters of the unit plate, thereby realizing the intelligence of the unit plate.
Description
Technical field
The utility model relates to the board design technical field, particularly a kind of circuit board.
Background technology
Along with the development of society and the progress of science and technology, the design of circuit board has become particularly important in the various electronic products.On the circuit board, contain power interface, signal input interface module and signal output interface usually, and can be connected with various electronic devices, for example be connected with resistance, electric capacity, inductance coil, power supply chip, chip for driving or the like.At present, usually according to the needs of determining element and function, consider to reserve the position of pad in the process of board design, after the ifs circuit plate completes, want to realize that other functions or chip connect, can only change circuit board again.Will cause the huge waste of cost like this; In addition, realize that on cell board storage also is a great problem that present technology solves.
With reference to Fig. 1, scanning board by the input interface on the cell board (101) with control signal input unit plate.Driver on the cell board (103) and driver (104) are arranged between input interface 101 and the output interface 102, its effect just to control signal amplify, shaping, and do not play any processing effect.
Therefore, there is defective in prior art, needs to improve.
The utility model content
Technical problem to be solved in the utility model is a kind of circuit board.
The technical solution of the utility model is as follows:
A kind of circuit board, comprise at least two group integrated circuit (IC) chip and at least one memory cell, wherein, at least one group of integrated circuit (IC) chip is control chip, each memory cell is connected with one group of control chip respectively, and each control chip is connected with the receiving card of outside respectively; Wherein, each is organized integrated circuit (IC) chip and comprises at least one chip respectively; Arrange according to predeterminated position and respectively to organize integrated circuit (IC) chip and each memory cell.
Described circuit board, wherein, each is organized in the integrated circuit (IC) chip, and the type of integrated circuit (IC) chip is identical on the same group, and it is different that each organizes the type of integrated circuit (IC) chip.
Described circuit board, wherein, each memory cell links to each other with arbitrary control chip in one group of control chip, and other control chips in this group control chip are connected with each memory cell by this control chip.
Described circuit board, wherein, each memory cell is arranged on this control chip inside.
Described circuit board; wherein; described control chip comprise at least pointwise adjusting module, overturn row-by-row module, Trouble Report module, cascade report an error module, blank screen protection module one of them; the receiving card that is connected with the outside is connected respectively, is used for realizing respectively that pointwise adjustment, overturn row-by-row, Trouble Report, cascade report an error or the function of blank screen protection.
Described circuit board, wherein, described memory cell setting with lower module one of them: adjust data memory module, cascade data memory module, template parameter memory module, be respectively applied for storage and adjust data, cascade data, template parameter.
Described circuit board wherein, is describedly arranged by predeterminated position, comprise by straight line arrange, non-rectilinear is arranged or staggered; Wherein, each chip in each integrated circuit (IC) chip group, it is spaced apart the standard soldering board spacing of at least 1 pin; Perhaps, the standard soldering board spacing that is spaced apart at least 1 pin between each integrated circuit (IC) chip group.
Described circuit board wherein, is arranged on the pad of described circuit board arbitrary group of integrated circuit (IC) chip is corresponding one by one, and each pad independently uses the circuit board line, or the identical circuit board line of shared at least one definition.
Described circuit board, wherein, the identical circuit board line of described shared at least one definition, comprise for having at least and belong to not two chips of integrated circuit (IC) chip on the same group respectively, there are at least one pin and the pin of other chip to be made as one group of corresponding pin respectively each chip, every group of identical circuit board line of the shared definition of corresponding pin connects every group of corresponding pin; Wherein, each organizes the identical circuit board line of the shared definition of corresponding pin, and comprise and adopt physics mode to connect, perhaps, circuit, solder joint or element on the shared described circuit board.
Described circuit board, wherein, each is organized, and integrated circuit (IC) chip is independent respectively to be used, or the circuit on the partial common circuit board, solder joint or element.
Described circuit board, wherein, described integrated circuit (IC) chip adopt at least following packing forms one of them, each group chip in integrated circuit (IC) chip is encapsulated: described packing forms comprises that DIP dual in-line package, the little external form encapsulation of SOP, PLCC plastic leaded chip carrier, LCCC do not have lead-in wire ceramic packaging carrier, QFP quad-flat-pack, BGA BGA Package and PGA pin grid array and encapsulate.
Adopt such scheme, the user can select driver or control chip to weld the memory cell on the utility model cell board as required, can realize adjusting the storage of data, thereby realize putting, save cost, save the time of assembling screen by the display screen out-of-order that this cell board is formed; Memory cell is cell board parameter storage, can realize the reading of cell board parameter realized the intellectuality of cell board; Memory cell is stored cascade data, can realize reporting an error to the cell board cascade data.
Description of drawings
Fig. 1 is the schematic diagram of prior art;
Fig. 2 is the schematic diagram of embodiment 1 of the present utility model;
Fig. 3 is the schematic diagram of embodiment 2 of the present utility model;
Fig. 4 is the schematic diagram of embodiment 3 of the present utility model.
Embodiment
Below in conjunction with the drawings and specific embodiments, the utility model is elaborated.
As shown in Figure 2, present embodiment provides a kind of circuit board, and it comprises at least two group integrated circuit (IC) chip; Wherein, the first core assembly sheet is driver chip 103 and driver chip 104; The second core assembly sheet is a control chip 107, is provided with at least one memory cell 105 in control chip 107 inside, and control chip 107 is connected by the receiving card of input interface 101 with the outside; Wherein, with driver chip 103 and driver chip 104 is arranged up and down and in line, control chip 107 is positioned at the right side of driver chip 103 and driver chip 104; During each chip in each chipset of arranging, it is made as the standard soldering board spacing of at least 1 pin at interval; Perhaps, the interval between each chipset is made as the standard soldering board spacing of at least 1 pin.Be arranged on the pad of described circuit board arbitrary group of integrated circuit (IC) chip is corresponding one by one, each pad independently uses the circuit board line, or circuit, solder joint or element on the independence use circuit board.
Wherein, control chip 107 comprise at least pointwise adjusting module, overturn row-by-row module, Trouble Report module, cascade report an error module, blank screen protection module one of them; the receiving card that is connected with the outside is connected respectively, is used for realizing respectively that pointwise adjustment, overturn row-by-row, Trouble Report, cascade report an error or the function of blank screen protection.
Wherein, memory cell 105 be provided with lower module one of them: adjust data memory module, cascade data memory module, template parameter memory module, be respectively applied for storage and adjust data, cascade data, template parameter.
Adopt such scheme, the user can select driver or control chip to weld the memory cell on the utility model cell board as required, can realize adjusting the storage of data, thereby realize putting, save cost, save the time of assembling screen by the display screen out-of-order that this cell board is formed; Memory cell is cell board parameter storage, can realize the reading of cell board parameter realized the intellectuality of cell board; Memory cell is stored cascade data, can realize reporting an error to the cell board cascade data.
Embodiment 2
As shown in Figure 3, present embodiment provides a kind of circuit board, and it comprises at least two core assembly sheets, is respectively: the first set drive chip 103 and driver chip 104; Second group is control chip 107, and the inside that at least one memory cell 105 is arranged on control chip 107 is set, and driver chip 103 and driver chip are about in the of 104 and arrange in line, and control chip is positioned at its right side; Wherein, during each chip in each chipset of arranging, it is made as the standard soldering board spacing of at least 1 pin at interval; Perhaps, the interval between each chipset is made as the standard soldering board spacing of at least 1 pin.Need to prove that though only adopted a control chip 107 in this example, in actual applications, the second core assembly sheet can comprise a plurality of; Same, the utility model can also comprise the 3rd core assembly sheet, realizing various function, the utility model to this without any additional limits.
Be arranged on the pad of described circuit board each core assembly sheet is corresponding one by one, the circuit board line that the shared at least one definition of each pad is identical, comprise for having at least and belong to not two chips of integrated circuit (IC) chip on the same group respectively, there are at least one pin and the pin of other chip to be made as one group of corresponding pin respectively each chip, every group of identical circuit board line of the shared definition of corresponding pin connects every group of corresponding pin; Wherein, each organizes the identical circuit board line of the shared definition of corresponding pin, and comprise and adopt physics mode to connect, perhaps, circuit, solder joint or element on the shared described circuit board.
Wherein, memory cell 105 is arranged on the inside of control chip 107, has a plurality ofly as this group control chip, then can in a plurality of control chips at least one memory cell be set, also can be connected with the control chip that has memory cell by a plurality of control chips.
Wherein, one of them is arranged in the described control chip 107 to the following module of major general; comprise pointwise adjusting module, overturn row-by-row module, Trouble Report module, cascade report an error module, blank screen protection module; with each module in the control chip 107, be connected to outside receiving card by described control chip respectively.
Wherein, one of them is arranged in the described memory cell 105 to the following module of major general, comprises adjusting data memory module, cascade data memory module, template parameter memory module.
Chip in each core assembly sheet adopt at least following packing forms one of them, comprising: DIP dual in-line package, the little external form encapsulation of SOP, PLCC plastic leaded chip carrier, LCCC do not have lead-in wire ceramic packaging carrier, QFP quad-flat-pack, BGA BGA Package and the encapsulation of PGA pin grid array.
Adopt such scheme, the user can select driver or control chip to weld the memory cell on the utility model cell board as required, can realize adjusting the storage of data, thereby realize putting, save cost, save the time of assembling screen by the display screen out-of-order that this cell board is formed; Memory cell is cell board parameter storage, can realize the reading of cell board parameter realized the intellectuality of cell board; Memory cell is stored cascade data, can realize reporting an error to the cell board cascade data.
Embodiment 3
As shown in Figure 4, on the basis of embodiment 2, the utility model provides a kind of circuit board, comprises at least two core assembly sheets, is respectively: the first set drive chip 103 and driver chip 104; Second group is control chip 107, and the outside that at least one memory cell 105 is arranged on control chip 107 is set, and is connected with control chip 107, and control chip 107 links to each other with the outside by input interface 101.
Be arranged on the pad of circuit board 100 each core assembly sheet is corresponding one by one, the circuit board line that the shared at least one definition of each pad is identical, comprise for having at least and belong to not two chips of integrated circuit (IC) chip on the same group respectively, there are at least one pin and the pin of other chip to be made as one group of corresponding pin respectively each chip, every group of identical circuit board line of the shared definition of corresponding pin connects every group of corresponding pin; Wherein, each organizes the identical circuit board line of the shared definition of corresponding pin, and comprise and adopt physics mode to connect, perhaps, circuit, solder joint or element on the shared described circuit board.
Other principle of present embodiment is identical with embodiment 2, does not repeat them here.
Should be understood that, for those of ordinary skills, can be improved according to the above description or conversion, and all these improvement and conversion all should belong to the protection range of the utility model claims.
Claims (11)
1, a kind of circuit board is characterized in that, comprises at least two group integrated circuit (IC) chip and at least one memory cell, wherein, at least one group of integrated circuit (IC) chip is control chip, and each memory cell is connected with one group of control chip respectively, and each control chip is connected with the receiving card of outside respectively; Wherein, each is organized integrated circuit (IC) chip and comprises at least one chip respectively; Arrange according to predeterminated position and respectively to organize integrated circuit (IC) chip and each memory cell.
According to the described circuit board of claim 1, it is characterized in that 2, each is organized in the integrated circuit (IC) chip, the type of integrated circuit (IC) chip is identical on the same group, and it is different that each organizes the type of integrated circuit (IC) chip.
According to the described circuit board of claim 1, it is characterized in that 3, each memory cell links to each other with arbitrary control chip in one group of control chip, other control chips in this group control chip are connected with each memory cell by this control chip.
According to the described circuit board of claim 1, it is characterized in that 4, each memory cell is arranged on this control chip inside.
5, according to the described circuit board of claim 1; it is characterized in that; described control chip comprise at least pointwise adjusting module, overturn row-by-row module, Trouble Report module, cascade report an error module, blank screen protection module one of them; the receiving card that is connected with the outside is connected respectively, is used for realizing respectively that pointwise adjustment, overturn row-by-row, Trouble Report, cascade report an error or the function of blank screen protection.
6, according to the described circuit board of claim 1, it is characterized in that, described memory cell setting with lower module one of them: adjust data memory module, cascade data memory module, template parameter memory module, be respectively applied for storage and adjust data, cascade data, template parameter.
7, according to the described circuit board of claim 1, it is characterized in that, describedly arrange by predeterminated position, comprise by straight line arrange, non-rectilinear is arranged or staggered; Wherein, each chip in each integrated circuit (IC) chip group, it is spaced apart the standard soldering board spacing of at least 1 pin; Perhaps, the standard soldering board spacing that is spaced apart at least 1 pin between each integrated circuit (IC) chip group.
According to the described circuit board of claim 1, it is characterized in that 8, be arranged on the pad of described circuit board arbitrary group of integrated circuit (IC) chip is corresponding one by one, each pad independently uses the circuit board line, or the identical circuit board line of shared at least one definition.
9, described according to Claim 8 circuit board, it is characterized in that, the identical circuit board line of described shared at least one definition, comprise for having at least and belong to not two chips of integrated circuit (IC) chip on the same group respectively, there are at least one pin and the pin of other chip to be made as one group of corresponding pin respectively each chip, every group of identical circuit board line of the shared definition of corresponding pin connects every group of corresponding pin; Wherein, each organizes the identical circuit board line of the shared definition of corresponding pin, and comprise and adopt physics mode to connect, perhaps, circuit, solder joint or element on the shared described circuit board.
10, described according to Claim 8 circuit board is characterized in that, each is organized, and integrated circuit (IC) chip is independent respectively to be used, or the circuit on the partial common circuit board, solder joint or element.
11, according to the arbitrary described circuit board of claim 1 to 10, it is characterized in that, described integrated circuit (IC) chip adopt at least following packing forms one of them, each group chip in integrated circuit (IC) chip is encapsulated: described packing forms comprises that DIP dual in-line package, the little external form encapsulation of SOP, PLCC plastic leaded chip carrier, LCCC do not have lead-in wire ceramic packaging carrier, QFP quad-flat-pack, BGA BGA Package and PGA pin grid array and encapsulate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU2008201235381U CN201307970Y (en) | 2008-11-03 | 2008-11-03 | Circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU2008201235381U CN201307970Y (en) | 2008-11-03 | 2008-11-03 | Circuit board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN201307970Y true CN201307970Y (en) | 2009-09-09 |
Family
ID=41100435
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNU2008201235381U Expired - Fee Related CN201307970Y (en) | 2008-11-03 | 2008-11-03 | Circuit board |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN201307970Y (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101404854B (en) * | 2008-11-03 | 2012-12-19 | 李鑫 | Circuit board and its design method |
-
2008
- 2008-11-03 CN CNU2008201235381U patent/CN201307970Y/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101404854B (en) * | 2008-11-03 | 2012-12-19 | 李鑫 | Circuit board and its design method |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| ASS | Succession or assignment of patent right |
Owner name: SHENZHEN ZHONGQINGWEI TECHNOLOGY DEVELOPMENT CO., Free format text: FORMER OWNER: BEIJING JUSHU DIGITAL TECHNOLOGY DEVELOPMENT CO., LTD. Effective date: 20110720 |
|
| C41 | Transfer of patent application or patent right or utility model | ||
| COR | Change of bibliographic data |
Free format text: CORRECT: ADDRESS; FROM: 100085 ROOM 402B, TOWER E, YINGCHUANG POWER PARK, NO. 1, SHANGDI EAST ROAD,HAIDIAN DISTRICT, BEIJING TO: 518040 706, TAIRAN FACTORY BUILDING 211, CHEGONGMIAO INDUSTRIAL ZONE, FUTIAN DISTRICT, SHENZHEN CITY, GUANGDONG PROVINCE |
|
| TR01 | Transfer of patent right |
Effective date of registration: 20110720 Address after: Futian District Che Kung Temple Tairan Industrial Zone in Shenzhen city of Guangdong province 518040 211 industrial buildings 706 Patentee after: Shenzhen Zhongqingwei Technology Development Co., Ltd. Address before: 100085 Beijing city Haidian District East Road No. 1 building E room 402B power Creative Park Patentee before: Beijing Jushu Digital Technology Development Co., Ltd. |
|
| DD01 | Delivery of document by public notice |
Addressee: Shenzhen Zhongqingwei Technology Development Co., Ltd. Document name: Notification to Pay the Fees |
|
| DD01 | Delivery of document by public notice |
Addressee: Shenzhen Zhongqingwei Technology Development Co., Ltd. Document name: Notification of Termination of Patent Right |
|
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20090909 Termination date: 20131103 |