CN201294607Y - Debug circuit - Google Patents
Debug circuit Download PDFInfo
- Publication number
- CN201294607Y CN201294607Y CNU2008202258037U CN200820225803U CN201294607Y CN 201294607 Y CN201294607 Y CN 201294607Y CN U2008202258037 U CNU2008202258037 U CN U2008202258037U CN 200820225803 U CN200820225803 U CN 200820225803U CN 201294607 Y CN201294607 Y CN 201294607Y
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- analog
- potentiometer
- operational amplifier
- digital converter
- resistance
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Abstract
The utility model discloses a debugging circuit, which comprises an operational amplifier and an analogue/digital converter which is connected with an output end of the operational amplifier, wherein a common mode voltage input end of the operational amplifier is connected with a first power supply through a first potentiometer, and a reference voltage input foot of the analogue/digital converter is connected with a second power supply through a second potentiometer. The debugging circuit adjusts the amplitude of common mode voltage which is input into the operational amplifier and the amplitude of reference voltage which is input into the analogue/digital converter through changing switch-in resistance of the potentiometer, thereby finishing debugging a circuit board on the basis of not replacing any devices on the circuit board, the flexibility and the efficiency of debugging work are effectively improved, and the unfavorable influence on the work reliability of whole circuit board due to replacing devices repeatedly is avoided.
Description
Technical field
The utility model belongs to the debug circuit technical field, and specifically, relating to a kind of being used for amplifies and carry out the circuit structure that the system of analog-to-digital conversion process debugs analog signal.
Background technology
For the television set that is used to receive analog video signal at present, analog video signal is by utilizing digital processing technology that vision signal is carried out conversion and processing after operational amplifier and ADC (analog to digital converter) sampling.In present TV signal receiving processing system, analog-to-digital conversion is the major function of AFE (AFE (analog front end)) part.Along with the development of technology, present vision signal processing scheme has been a system-on-a-chip, is about in the digital processing segment set Cheng Zaiyi chips of AFE (AFE (analog front end)) part and rear end.But, for the debugging and the application of chip, module separately need be debugged, can help the discovery and the location of problem like this.
In the process that analog video signal is debugged, the resistance value that need to change operational amplifier and ADC periphery comes respectively the value of the reference input voltage of the input common mode voltage of operational amplifier and analog to digital converter is configured, so that the different operating state is debugged, and the condition of work of system's the best also needs by adjusting satisfied.
Existing debugging technique is to change the value of input common mode voltage and reference input voltage by the resistance on the reference voltage input pin Vref of common-mode voltage input Vcm that changes operational amplifier and analog to digital converter, thereby different operating states is debugged.This adjustment method need repeat to change the resistance on the circuit board, has not only wasted a lot of times, and often changes resistance and also can influence the reliability of entire circuit plate work, thereby machine system is caused adverse effect.
Based on this, how designing a kind of debug system simple to operate, that reliability is high is subject matter to be solved in the utility model.
The utility model content
The purpose of this utility model has been to provide a kind of simple to operate, analog signal debug circuit that reliability is high, needs to change repeatedly the technical problem that the debugging efficiency that peripheral resistance was caused of operational amplifier and ADC is low, the reliability of entire circuit plate work caused adverse effect in the course of the work to solve existing debug circuit.
For solving the problems of the technologies described above, the utility model is achieved by the following technical solutions:
A kind of debug circuit, comprise operational amplifier and the analog to digital converter that is connected with its output, wherein, the common-mode voltage input of described operational amplifier connects first power supply by first potentiometer, and the reference voltage input pin of described analog to digital converter connects second source by second potentiometer.
Further, the common-mode voltage input of described operational amplifier is by a divider resistance ground connection, and the described divider resistance and first potentiometer constitute resistance pressure-dividing network, are input to the amplitude of the common-mode voltage of operational amplifier with adjusting.
Further again, described first power supply connects described first potentiometer by a resistance, is connected with a voltage stabilizing didoe at the connected node place of the described resistance and first potentiometer, with the clamped voltage that is input to above-mentioned resistance pressure-dividing network.
In like manner, be connected with another divider resistance at the reference voltage input pin of described analog to digital converter, the described divider resistance and second potentiometer constitute resistance pressure-dividing network, are input to the amplitude of the reference voltage of analog to digital converter with adjusting.
Same, described second source connects described second potentiometer by another resistance, is connected with another voltage stabilizing didoe at the connected node place of the described resistance and second potentiometer, with the stable voltage that is input to described resistance pressure-dividing network.
In addition, the reference voltage input pin at described analog to digital converter also is connected with a filter capacitor.
Preferably, described first power supply and second source adopt same low-voltage dc power supply to realize.
Further again, described operational amplifier is the low voltage difference operational amplifier, and its in-phase input end receives analog video signal, reverse inter-input-ing ending grounding, and the output differential signal connects the differential signal input pin of described analog to digital converter.
Further, the signal amplification circuit of being made up of described operational amplifier and peripheral circuit thereof with the analog to digital conversion circuit of being made up of described analog to digital converter and peripheral circuit thereof altogether.
Compared with prior art, advantage of the present utility model with good effect is: debug circuit of the present utility model is by being connected a potentiometer respectively at the common-mode voltage input of operational amplifier and the reference voltage input pin of analog to digital converter, regulate the amplitude and the amplitude that is input to the reference voltage of analog to digital converter of the common-mode voltage that is input to operational amplifier by the access resistance that changes potentiometer, thereby on the basis that need not to change any device on the circuit board, finished debugging to circuit board, effectively improved the flexibility and the efficient of debugging work, avoided because of changing the adverse effect that device causes the reliability of entire circuit plate work repeatedly.
After reading the detailed description of the utility model execution mode in conjunction with the accompanying drawings, other characteristics of the present utility model and advantage will become clearer.
Description of drawings
Fig. 1 is the schematic block circuit diagram of a kind of embodiment of the debug circuit that proposes of the utility model;
Fig. 2 is a kind of physical circuit schematic diagram of debug circuit shown in Figure 1.
Embodiment
Below in conjunction with accompanying drawing embodiment of the present utility model is described in detail.
Debug circuit of the present utility model uses potentiometer to replace fixed resistance to connect and treats debugging module, realize treating the adjusting of debugging module input by the access resistance that changes potentiometer, thereby many drawbacks of being caused because of changing fixed resistance have repeatedly been avoided, improve the flexibility and the efficient of debugging work, guaranteed the reliability of entire circuit plate work.
Be the concrete syndeton of described debug circuit of setting forth of example with the Circuits System of analog signal being amplified and carry out analog-to-digital conversion process below.
Embodiment one, referring to shown in Figure 1, in the debug circuit of present embodiment, comprise operational amplifier and analog to digital converter, described operational amplifier receives analog signal, it is carried out the input pin of connection mode number converter after the processing and amplifying, and then, export in the follow-up digital processing circuit by described analog to digital converter conversion generation digital signal.For example: in the television receiver that can receive analog video signal, analog video signal by tuner demodulation output is transferred to and carries out processing and amplifying in the operational amplifier, and then the vision signal after will amplifying exports to and carries out the conversion of analog signal to digital signal in the follow-up analog to digital converter, export decoder module to the digital signal that generates 10bit and carry out decoding processing, finally generate rgb signal by display module output video program.
In the process that described analog signal processing circuit is debugged, need regulate on the one hand, to adjust the scope of operational amplifier output voltage to the amplitude of the input common mode voltage of operational amplifier; Also need on the other hand the size of the reference voltage that is input to analog to digital converter is regulated, to realize qualification to the maximum sampled voltage of analog to digital converter.Have only and regulate the running parameter of two parts modular circuit to such an extent that mate mutually, can guarantee that just circuitry has good working performance.
In traditional debug circuit, usually the common-mode voltage input Vcm of operational amplifier and the reference voltage input pin Vref of analog to digital converter are connected DC power supply by fixing resistance pressure-dividing network, in debug process, realize adjusting by the divider resistance of changing different resistances repeatedly, to satisfy the job requirement of system to operational amplifier output voltage range and analog to digital converter input voltage range.This adjustment method not only debugging efficiency is low, and influences the reliability of entire circuit plate work easily.
In order to address the above problem, present embodiment adopts potentiometer to replace fixed resistance to set up debug circuit, the common-mode voltage input Vcm that is about to operational amplifier connects first power supply by first potentiometer, and the reference voltage input pin Vref of analog to digital converter connects second source by second potentiometer.In debug process, by regulating the access resistance of first potentiometer or second potentiometer, change common-mode voltage amplitude or the reference voltage amplitude that is input to operational amplifier or analog to digital converter, thereby finish debugging task flexibly, easily to AFE (analog front end).
Here, first power supply and second source can be two kinds of low-voltage dc power supplies with different potentials value, can certainly select same low-voltage dc power supply to realize that present embodiment does not specifically limit this.
Among Fig. 1, VCC is a dc power supply, for operational amplifier and analog to digital converter provide dc supply.Certainly, described first power supply and second source also can directly adopt dc power supply VCC to realize, to simplify circuit structure.
Be example with the television receiver that can receive analog video signal below, the wire connection structure of debug circuit shown in concrete the elaboration.
Present embodiment is debugged the big system module circuitization in the television receiver respectively.As shown in Figure 2, promptly formed an independently ADC system, formed by operational amplifier U2 and analog to digital converter U1.Wherein, described operational amplifier U2 adopts the low voltage difference operational amplifier to realize, its in-phase input end IN+ passes through by resistance R 604, the resistance pressure-dividing network that R605 forms connects simulation video signal input terminal TV_video_ADC, reception is through the analog video signal of tuner demodulation output, inverting input IN-is by resistance R 608 ground connection, differential signal after operational amplifier U2 processing and amplifying is through its differential signal output+OUT,-OUT output is respectively by resistance R 611, R612 and resistance R 607, the differential signal input pin Vin+ of R613 and analog to digital converter U1, Vin-is corresponding to be connected.Among Fig. 2, C620, C621 are filter capacitor.
In order to regulate the output voltage range of operational amplifier U2, need regulate the amplitude of the common-mode voltage that is input to operational amplifier U2.In the present embodiment, adopt the 5V power supply, connect the negative electrode of voltage stabilizing didoe D600 on the one hand, and pass through the plus earth of voltage stabilizing didoe D600 through resistance R 660 as first power supply; Connect the first potentiometer RP01 on the other hand, and connect divider resistance R661 by the described first potentiometer RP01.Described first potentiometer RP01 and divider resistance R661 constitute resistance pressure-dividing network, and its dividing potential drop node connects the common-mode voltage input Vcm of described operational amplifier U2.The 5V power supply is under the amplitude limit effect of the dividing potential drop of resistance R 660 and voltage stabilizing didoe D600, to be input to the voltage clamping of follow-up resistance pressure-dividing network at 3.9V, and then, realize effective adjusting to operational amplifier U2 output voltage range by changing the access resistance of the first potentiometer RP01.
In the present embodiment, described 5V power supply equally can be as the dc power supply of operational amplifier U2 and analog to digital converter U1, the power end V+ of difference concatenation operation amplifier U2 and the power supply input pin VA of analog to digital converter U1, when the ADC system moves, for it provides stable dc supply.Wherein, a plurality of shunt capacitance C601, C602, C603, the C630 that are connected on the analog to digital converter U1 power supply input pin VA are filter capacitor, and be pure with the dc power supply of guaranteeing to be input to analog to digital converter U1.
In analog to digital converter U1, the maximum that the voltage magnitude decision ADC that introduces by its reference voltage input pin Vref can change, promptly be used to limit the maximum sampled voltage of ADC, the definite of this value has important effect to the inner steady operation of single-chip (being the decoding chip in the television set) that is integrated with described analog to digital converter U1.Therefore, in the debugging work to the television set AFE (analog front end), reference input voltage is a very important debug-item.In the present embodiment, regulate the amplitude of reference input voltage for convenience, on the reference voltage input pin Vref of described analog to digital converter U1, connect the second potentiometer RP02, and through divider resistance R616 ground connection.Described second potentiometer RP02 and divider resistance R616 constitute resistance pressure-dividing network, connect second source by resistance R 614 on the one hand, on the other hand through voltage stabilizing didoe D602 ground connection.Described second source can adopt above-mentioned 5V power supply to realize equally, under the amplitude limit effect of the dividing potential drop of resistance R 614 and voltage stabilizing didoe D602, to be input to the voltage clamping of resistance pressure-dividing network at 3.9V, and then by changing the access resistance of the second potentiometer RP02, regulate the amplitude of reference input voltage, to realize effective adjusting to the maximum sampled voltage of analog to digital converter U1.In actual debug process, by common-mode voltage that is input to operational amplifier U2 and the reference voltage that is input to analog to digital converter U1 are united adjusting, with the input of coupling two parts modular circuit.
In addition, on the reference voltage input pin Vref of described analog to digital converter U1, also be connected with filter capacitor C608.After described analog to digital converter U1 is converted to the digital signal of 10bit with the differential signal that receives, transfers to decoder module by its output pin D2～D11 and carry out the digitlization decoding processing.
In order to improve the stability of AFE (analog front end) system works shown in Figure 2, the signal amplification circuit of being made up of described operational amplifier U2 and peripheral circuit thereof with the analog to digital conversion circuit of being made up of described analog to digital converter U1 and peripheral circuit thereof altogether.
Behind the debugging end-of-job, the access resistance of potentiometer RP01, RP02 is promptly decided, and the fixed resistance of selecting to have this resistance is connected the position of described potentiometer RP01, RP02, can form final system board.
Certainly; the above only is a kind of preferred implementation of the present utility model; should be understood that; for those skilled in the art; under the prerequisite that does not break away from the utility model principle; can also make some improvements and modifications, these improvements and modifications also should be considered as protection range of the present utility model.
Claims (10)
1, a kind of debug circuit, comprise operational amplifier and the analog to digital converter that is connected with its output, it is characterized in that: the common-mode voltage input of described operational amplifier connects first power supply by first potentiometer, and the reference voltage input pin of described analog to digital converter connects second source by second potentiometer.
2, debug circuit according to claim 1 is characterized in that: the common-mode voltage input of described operational amplifier is by a divider resistance ground connection, and the described divider resistance and first potentiometer constitute resistance pressure-dividing network.
3, debug circuit according to claim 2 is characterized in that: described first power supply connects described first potentiometer by a resistance, is connected with a voltage stabilizing didoe at the connected node place of the described resistance and first potentiometer.
4, according to each described debug circuit in the claim 1 to 3, it is characterized in that: the reference voltage input pin of described analog to digital converter is by another divider resistance ground connection, and the described divider resistance and second potentiometer constitute resistance pressure-dividing network.
5, debug circuit according to claim 4 is characterized in that: described second source connects described second potentiometer by another resistance, is connected with another voltage stabilizing didoe at the connected node place of the described resistance and second potentiometer.
6, debug circuit according to claim 5 is characterized in that: the reference voltage input pin at described analog to digital converter also is connected with a filter capacitor.
7, debug circuit according to claim 5 is characterized in that: described first power supply and second source are low-voltage dc power supply, and amplitude equates.
8, debug circuit according to claim 1, it is characterized in that: described operational amplifier is the low voltage difference operational amplifier, its in-phase input end receives analog signal, reverse inter-input-ing ending grounding, and the output differential signal connects the differential signal input pin of described analog to digital converter.
9, debug circuit according to claim 8 is characterized in that: described analog signal is an analog video signal.
10, debug circuit according to claim 8 is characterized in that: the signal amplification circuit of being made up of described operational amplifier and peripheral circuit thereof with the analog to digital conversion circuit of being made up of described analog to digital converter and peripheral circuit thereof altogether.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU2008202258037U CN201294607Y (en) | 2008-11-11 | 2008-11-11 | Debug circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU2008202258037U CN201294607Y (en) | 2008-11-11 | 2008-11-11 | Debug circuit |
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| Publication Number | Publication Date |
|---|---|
| CN201294607Y true CN201294607Y (en) | 2009-08-19 |
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| Application Number | Title | Priority Date | Filing Date |
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| CNU2008202258037U Expired - Fee Related CN201294607Y (en) | 2008-11-11 | 2008-11-11 | Debug circuit |
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| CN (1) | CN201294607Y (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103378846A (en) * | 2012-04-20 | 2013-10-30 | 中国科学院电子学研究所 | Device for converting logic signal into low voltage differential signal |
| CN104252621A (en) * | 2014-09-29 | 2014-12-31 | 深圳市汇顶科技股份有限公司 | Fingerprint identification device and fingerprint identification method |
| CN106199309A (en) * | 2016-07-06 | 2016-12-07 | 南京国电南自电网自动化有限公司 | A kind of loop self-checking circuit for ADC sampled data and method |
| CN106199386A (en) * | 2016-07-25 | 2016-12-07 | 苏州福莱盈电子有限公司 | A kind of simple adjustment method of wiring board |
-
2008
- 2008-11-11 CN CNU2008202258037U patent/CN201294607Y/en not_active Expired - Fee Related
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103378846A (en) * | 2012-04-20 | 2013-10-30 | 中国科学院电子学研究所 | Device for converting logic signal into low voltage differential signal |
| CN103378846B (en) * | 2012-04-20 | 2016-06-29 | 中国科学院电子学研究所 | A kind of device that logical signal is converted to Low Voltage Differential Signal |
| CN104252621A (en) * | 2014-09-29 | 2014-12-31 | 深圳市汇顶科技股份有限公司 | Fingerprint identification device and fingerprint identification method |
| CN106199309A (en) * | 2016-07-06 | 2016-12-07 | 南京国电南自电网自动化有限公司 | A kind of loop self-checking circuit for ADC sampled data and method |
| CN106199309B (en) * | 2016-07-06 | 2019-01-18 | 南京国电南自电网自动化有限公司 | A kind of circuit self-checking circuit and method for ADC sampled data |
| CN106199386A (en) * | 2016-07-25 | 2016-12-07 | 苏州福莱盈电子有限公司 | A kind of simple adjustment method of wiring board |
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| Date | Code | Title | Description |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20090819 Termination date: 20111111 |