CN201266286Y - Liquid crystal display module test system - Google Patents

Liquid crystal display module test system Download PDF

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Publication number
CN201266286Y
CN201266286Y CNU2008201469308U CN200820146930U CN201266286Y CN 201266286 Y CN201266286 Y CN 201266286Y CN U2008201469308 U CNU2008201469308 U CN U2008201469308U CN 200820146930 U CN200820146930 U CN 200820146930U CN 201266286 Y CN201266286 Y CN 201266286Y
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China
Prior art keywords
control circuit
liquid crystal
crystal display
links
test control
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Expired - Fee Related
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CNU2008201469308U
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Chinese (zh)
Inventor
于海涛
龚夺
何志强
杨云
冯卫
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BYD Co Ltd
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BYD Co Ltd
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Priority to CNU2008201469308U priority Critical patent/CN201266286Y/en
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  • Liquid Crystal Display Device Control (AREA)

Abstract

The utility model provides a liquid crystal display module test system which comprises a PC, a test control circuit driving a tested LCM to work, a JTAG interface, a power module and a serial adaptation unit, wherein the PC is connected with the JTAG interface through the serial adaptation unit, the JTAG interface is connected with the test control circuit, and the power module is connected with the test control circuit and the serial adaptation unit to supply power to the test control circuit and the serial adaptation unit. The liquid crystal display module test system utilizes the serial adaptation unit and the JTAG interface to support the system debugging in a non-invasive way (no resource in chips is tied up) and at full speed. The test system supports observing and amending a memorizer and a register, and supports breakpoint, one-step, working and stop commands. When the JTAG is used for debugging, all simulation and digital peripheral devices can work in full function.

Description

A kind of liquid crystal display module test system
Technical field
The utility model relates to the test of LCD MODULE, relates in particular to a kind of test macro of LCD MODULE.
Background technology
LCD MODULE (LCD Module, be called for short LCM) be a kind of assembly that liquid crystal display device, web member, integration member, integrated circuit, FPC, backlight and structural member are assembled together, it is that three primary colors mode of operation and VSYNCInterface pattern are the high speed operation pattern that the chip for driving of TFT screen generally has system interface mode of operation, RGB Interface pattern; The chip for driving of CSTN screen does not have RGB Interface pattern.The test macro of general LCD MODULE when debugging program at every turn, and revised program also must be gone into singlechip chip with the HEX file programming of preserving the single-chip microcomputer program codes, and operation steps is many, and efficient is low.
The utility model content
The purpose of this utility model be to provide a kind of adopt jtag interface with realize at full speed, the test macro in the LCD MODULE of system debug of non-intrusion type.
The utility model is achieved in that a kind of liquid crystal display module test system, and described test macro comprises:
Test control circuit, jtag interface, power module and the Serial Adaptation Unit of PC, the tested LCM work of driving, described PC links to each other with described jtag interface by described Serial Adaptation Unit, described jtag interface links to each other with described test control circuit, described power module links to each other with Serial Adaptation Unit with described test control circuit, for described test control circuit and described Serial Adaptation Unit provide working power.
The liquid crystal display module test system that the utility model provides utilize Serial Adaptation Unit and a door AG interface back-up system non-intrusion type (not taking resource in the sheet), at full speed, in system debug.Storer and register are observed and are revised in this test macro support, support breakpoint, single step, operation and halt command.When using the JTAG debugging, but all global function operations of all analog-and digital-peripheral hardwares.
Description of drawings
Fig. 1 is the structural drawing of the liquid crystal display module test system that provides of the utility model first embodiment;
Fig. 2 is the test control circuit structural drawing that the utility model first embodiment provides;
Fig. 3 is the test control circuit structural drawing that the utility model second embodiment provides;
Fig. 4 is the test control circuit structural drawing that the utility model the 3rd embodiment provides;
Fig. 5 is the circuit diagram of FLASH storer among Fig. 3 and Fig. 4;
Fig. 6 is the circuit diagram of the power-switching circuit that provides of the utility model embodiment;
Fig. 7 is the reset circuit figure among Fig. 2, Fig. 3 and Fig. 4.
Embodiment
In order to make the purpose of this utility model, technical scheme and advantage clearer,, the utility model is further elaborated below in conjunction with drawings and Examples.Should be appreciated that specific embodiment described herein only in order to explanation the utility model, and be not used in qualification the utility model.
Fig. 1 and Fig. 2 show the structural drawing and the test control circuit structural drawing of the liquid crystal display module test system that the utility model provides, and for convenience of explanation, only show the part relevant with the utility model.
This liquid crystal display module test system comprises PC 1, the Serial Adaptation Unit 2 that is connected with PC, power module 3, door AG interface 12 and the test control circuit 4 that is connected with Serial Adaptation Unit, this PC 1 is provided with the driver that can discern test control circuit 2, and provide the application programming interface api function to call to application software, power module 3 is connected with test control circuit 4, provide power supply by power module 3 for test control circuit 4, jtag interface 12 links to each other with the output terminal of Serial Adaptation Unit 2, the signal of PC 1 output links to each other with Serial Adaptation Unit by Serial Port Line, Serial Adaptation Unit 2 is converted into the JTAG standard with rs-232 standard, so that communicate by letter with test control circuit.
Test control circuit 4 comprises microcontroller MCU6, and the connector, clock circuit and the reset circuit that link to each other with microcontroller MCU6 respectively, and wherein microcontroller MCU6MCU6 adopts the C8051F1 series monolithic of SiliconLaboratories company,
What it adopted Silicon Lab is CIP-51 microcontroller kernel, CIP-51 is compatible fully with MCS-51TM instruction, can use assembler and the compiler of standard 803x/805x to carry out software development, CIP-51 adopts the streamline result, and its instruction execution speed improves a lot.When CIP-51 was operated in maximum system clock frequency 100MHz, the peak performance of MCU reached 100MIPS.By the difference configuration to MCU inside PLL (phase-locked loop), the designing requirement that reaches the LCD chip for driving can operate as normal speed.
As shown in Figure 3, test control circuit 4 also comprises FLASH storer 10, and described FLASH storer 10 links to each other with described connector, and described connector links to each other with test LCM interface, the FLASH storer links to each other with power module, provides power supply by power module 3 for the FLASH storer.PC 1 is decoded by the data that Serial Adaptation Unit is sent to microcontroller MCU6, corresponding different LCM5 and the different working modes of LCM5 form corresponding data layout respectively and drive LCM5, the picture that on the LCD screen, shows corresponding format, utilize the FLASH storer to store a large amount of image datas in advance, can on the LCD screen, carry out the demonstration of different pictures, improve the internal memory of total system.
As shown in Figure 4, test control circuit also comprises detection module 11, and detection module 11 links to each other with microcontroller MCU6, detects the whole system operation situation in real time, detection module 11, control VDD monitor, when power vd D during less than VRST forced system reset.
Fig. 5 shows the circuit diagram of FLASH storer, the model that the FLASH storer has adopted SUMSAUG company to produce is the K9F1208UOC chip, it is a 64M*8Bit NAND FLASH storer Memory, the storage space of its 64M can be stored the demonstration of several pictures, it can store lot of data, image data just can store in the FLASH storer in advance, by Silicon Laboratories.IDE Integrated Development Environment, realization so just can show the image of whole screen and show several images the control of FLASH storer.
The initialization value of tested LCM6 is delivered to by the application software on the PC 1 by the user in the corresponding registers of LCD chip for driving of LCM5, makes its initialization.
Microcontroller MCU6 downloads from the IDE Integrated Development Environment after being Default device by jtag interface identification PC 1 automatically, and it finishes the initialization of microcontroller MCU6 by the initialization function, also sets up transmission mode by output function.
POTR I/O mouth will be comprised in the microcontroller MCU6 sheet, POTR I/O mouth is connected on the connector, and to I/O pin pull-up resistance, POTR I/O mouth is set to out the leakage mode, realization drives the test of the different voltage condition of I/O mouth to LCD, simultaneously, all POTR I/O mouths all are connected to connector, provide enough I/O that LCD is driven and have controlled.
Wherein power module 3 comprises: power interface and power-switching circuit, and the power interface external power supply, power-switching circuit links to each other with power interface, converts external power supply to operating voltage, and Fig. 6 shows the circuit diagram of power-switching circuit.
Wherein the model of power-switching circuit employing NIKO-SEM company product is the lowering and stabilizing blood pressure of AZ1117, and it is needed operating voltage 3.3V with external 5V voltage step-down.
Fig. 7 shows the circuit diagram of reset circuit, the reset circuit of microcontroller MCU6 carries out low level and resets, and adopted the button reset mode, by enumerating to PC 1, identification PC 1 is the Default device of SiliconLaboratories company then, and from the IDE Integrated Development Environment downloaded software, the microcontroller MCU6 software that brings into operation, test control circuit 4 is enumerated again, is that PC 1 operating means is identified as user-defined equipment again, reloads user-defined driver.
When no datat is transmitted, microcontroller MCU6 enters suspended state, to reduce the loss of test control circuit 4, when data transmission is arranged, microcontroller MCU6 through one section duration of oscillation, returns to normal duty by clock circuit, and we can select to use external oscillator when using, also can use internal oscillator, the circuit generation clock that external oscillator is connected with electric capacity by using crystal oscillator.
Microcontroller MCU6 has 64 universaling I/O ports, each I/O mouth is configured to recommend or drains out and leaks output, directly be connected with the control signal mouth with the data port of FPC end by these I/O mouths, realize the control to LCM5, realization can be tested the mode of operation of multiple LCM.
Microcontroller MCU6 comprises jtag boundary sweep circuit and debug circuit, carry out the on-line system debugging of non-intrusion type, full speed by jtag interface, storer and register are observed and are revised in the debug system support of Silicon Lab, support breakpoint, observation point, stack pointer and single step to carry out, do not need extra target RAM, program storage, timer and communication port.
The course of work of this embodiment is as follows:
At first the data-interface of test control circuit 4 in the test macro of native system, control interface are connected with data-interface, the control interface of tested LCM5 respectively, again test control circuit 4 is connected to Serial Adaptation Unit by jtag interface, Serial Adaptation Unit links to each other with PC, power module is to Serial Adaptation Unit and test control circuit power supply, transmit data by jtag interface to test control circuit, test control circuit 4 is finished enumerating of equipment in the moment that powers on.Operating means on the PC 1 is discerned automatically, load driver, finishes being connected of physical connection that software and test control circuit communicate by letter and communication protocol.
Then move the application software of PC, application software is searched corresponding apparatus earlier, finish the handle of discerning and obtain equipment again to equipment in the part, then by the application software on the PC initialization value of tested LCM5 is delivered in the corresponding registers of LCD chip for driving of LCM5 by the user, make its initialization, and select the mode of operation of LCD chip for driving and technical parameter to be tested.
The file that application software becomes LCM5 to require file conversion, on PC, show, determine to select whether data are sent to LCM5 by the user, if select be, data are sent to test control circuit 4 by the jtag interface of PC, and control circuit is handled and is sent to the interface that is connected with the lcd driver chip after tested again, the LCD chip for driving of control LCM5, display file synchronously on the LCD screen, the user can compare with the file on the PC.
The above only is preferred embodiment of the present utility model; not in order to restriction the utility model; all any modifications of within spirit of the present utility model and principle, being done, be equal to and replace and improvement etc., all should be included within the protection domain of the present utility model.

Claims (7)

1, a kind of liquid crystal display module test system, it is characterized in that, comprise PC, drive test control circuit, jtag interface, power module and Serial Adaptation Unit that tested LCM works, described PC links to each other with described jtag interface by described Serial Adaptation Unit, described jtag interface links to each other with described test control circuit, described power module links to each other with Serial Adaptation Unit with described test control circuit, for described test control circuit and described Serial Adaptation Unit provide working power.
2, liquid crystal display module test system as claimed in claim 1 is characterized in that, described test control circuit comprises:
Microcontroller and the connector, clock circuit and the reset circuit that link to each other with described microcontroller respectively, described connector links to each other with test LCM, and described jtag interface links to each other with described microcontroller.
3, liquid crystal display module test system as claimed in claim 2 is characterized in that, described test control circuit also comprises:
The FLASH storer, described FLASH storer links to each other with described connector.
4, liquid crystal display module test system as claimed in claim 3 is characterized in that, described test control circuit also comprises:
Detection module, described detection module links to each other with described microcontroller, detects the whole system operation state in real time.
5, liquid crystal display module test system as claimed in claim 1 is characterized in that: described power module comprises:
Power interface and power-switching circuit, described power interface external power supply, described power-switching circuit links to each other with described power interface, converts external power supply to operating voltage.
6, as each described liquid crystal display module test system of claim 1 to 5, it is characterized in that: described microcontroller has the corresponding I/O mouth that links to each other with tested LCM interface, and described I/O mouth is that the leakage way of output is opened in push pull mode or drain electrode.
7, liquid crystal display module test system as claimed in claim 7 is characterized in that: described microcontroller comprises jtag boundary sweep circuit and debug circuit.
CNU2008201469308U 2008-08-23 2008-08-23 Liquid crystal display module test system Expired - Fee Related CN201266286Y (en)

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Application Number Priority Date Filing Date Title
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103487736A (en) * 2013-09-18 2014-01-01 大唐移动通信设备有限公司 Method and device for detecting TVS pipe
CN106710496A (en) * 2017-01-18 2017-05-24 深圳市视显光电技术有限公司 Device and method for online debugging of parameters of LCD logic board

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103487736A (en) * 2013-09-18 2014-01-01 大唐移动通信设备有限公司 Method and device for detecting TVS pipe
CN103487736B (en) * 2013-09-18 2015-10-14 大唐移动通信设备有限公司 A kind of method and device detecting TVS pipe
CN106710496A (en) * 2017-01-18 2017-05-24 深圳市视显光电技术有限公司 Device and method for online debugging of parameters of LCD logic board

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C14 Grant of patent or utility model
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CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20090701

Termination date: 20150823

EXPY Termination of patent right or utility model