CN107835108B - OpenWrt-based MAC (media Access control) layer protocol stack verification platform - Google Patents
OpenWrt-based MAC (media Access control) layer protocol stack verification platform Download PDFInfo
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L43/00—Arrangements for monitoring or testing data switching networks
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- H04W—WIRELESS COMMUNICATION NETWORKS
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- H—ELECTRICITY
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Abstract
The invention discloses an OpenWrt-based MAC (media access control) layer protocol stack verification platform, which mainly solves the problem that the conventional MAC protocol stack verification needs to design a complete verification platform. The system comprises a mainboard, an MAC protocol stack hardware module and a control unit; the mainboard is provided with a high-performance processor, is reserved with various universal bus interfaces and is communicated with the MAC protocol stack hardware module through the universal bus interfaces; the MAC protocol stack hardware module consists of an MAC protocol stack chip and a peripheral circuit; the control unit comprises an operating system module, a driving module and an MAC protocol stack, wherein the operating system manages software and hardware, the driving module drives an MAC protocol stack chip to normally work, and the MAC protocol stack realizes a media intervention control function. The method reduces the workload of hardware circuit design, reduces the probability of failure of the verification platform, accelerates the test and verification of the protocol stack, and can be used for verifying and testing the protocol stack of the MAC layer of the WIFI chip.
Description
Technical Field
The invention relates to the technical field of wireless communication, in particular to a verification platform for an MAC layer protocol stack, which can be used for verifying and testing the MAC layer protocol stack of a WIFI chip.
Background
With the rapid development of scientific technology and the maturity of wireless communication technology, the typical application branch WIFI is widely applied by virtue of the advantages of the WIFI, and the WIFI is developed into a technical hotspot, is covered by large-scale WIFI in both businesses and families, and becomes an indispensable component in daily life. As another branch of the wireless communication technology, the internet of things technology is taken as a development hotspot in recent years, more and more intelligent devices of the internet of things are connected to a network through the wireless communication technology, and the intelligent home products are focused by people. The intelligent home equipment is connected to the intelligent home server through the WIFI technology, and the intelligent home server is used for managing the family intelligence in a unified mode, so that the daily life is more convenient and faster. The wireless communication technology accelerates the development of digitalization, wireless and intellectualization of home life.
The WIFI technology has been developed for many generations since the formal implementation of IEEE802.11 standard in month 6 1997, and the technology has been rapidly innovated. Rates also range from 1 or 2Mbps for 802.11 to 11Mbps for 802.11b, 54Mbps for 802.11a (g), 450Mbps for 802.11n and 1300Mbps for the current mainstream standard 802.11ac and 802.11ah for long range communications. Each innovation in physical layer communication technology requires technological upgrades of the mac layer protocol to meet the physical layer rate requirements.
The MAC layer protocols applied to different services are different due to different requirements, such as voice, and the service is required to have a high priority in the MAC protocol stack in order to ensure real-time performance, background data transmission has a relatively low requirement on real-time performance, retransmission can be performed after transmission failure, and user experience is not greatly affected, so that the priority of the service in the MAC protocol stack can be relatively low. Different service priorities need to be determined through simulation, verification and testing, the simulation can be performed through corresponding software, and the verification and the testing need to be performed on corresponding software and hardware platforms. The MAC layer protocol stacks developed by different science and technology companies need to be optimized and improved according to the related standards and the corresponding service requirements, so as to develop WIFI chips suitable for different application scenarios. Verification and test required by the developed WIFI chip are completed on a specific software and hardware platform. With the popularization of personal portable computers, smart phones and smart home devices, devices accessing the internet through the WIFI technology are growing in a well-jet manner, and how to optimize an MAC protocol stack to reduce network congestion and improve channel utilization rate is a problem to be solved urgently.
To address the above issues, different vendors have their own solutions and testing solutions. A manufacturer carries out research design and realization according to different service requirements and IEEE802.11 protocol standards, then a special hardware test circuit and a corresponding software module are designed according to an application scene of an MAC layer protocol stack to build an MAC layer protocol stack test platform, and the function and the performance of the MAC protocol stack are tested and verified by means of corresponding tools, so that whether the function and the performance of the MAC protocol stack meet the design requirements or not is determined. The traditional test platform designs a special hardware circuit and a corresponding software module according to different service scenes and different MAC layer protocol stack standards, and tests and verifies the designed and realized MAC layer protocol stack, so that the difficulty and complexity of verification and test work are increased invisibly, the utilization degree of the hardware platform is not high, and the uncertainty and instability in the verification and test process are also increased.
Disclosure of Invention
The invention aims to provide an OpenWrt-based MAC (media access control) layer protocol stack verification platform aiming at the defects of the prior art, so as to reduce the work difficulty and complexity caused by redesigning hardware and software due to the fact that the OpenWrt-based MAC layer protocol stack verification platform is suitable for different protocol standards, improve the work efficiency and ensure the smooth operation of verification and test work.
In order to solve the technical problems, the invention completes the corresponding test and verification work of the MAC layer protocol stack by replacing different MAC protocol stack hardware modules, which comprises the following steps:
mainboard 1, MAC protocol stack hardware module 2 and the control unit 3, its characterized in that:
the main board 1 is reserved with various universal bus interfaces 12, is communicated with the MAC protocol stack hardware module 2 through the universal bus interfaces 12, and stores and operates the control unit 3;
the MAC protocol stack hardware module 2 is composed of an MAC protocol stack chip and a peripheral circuit, and a universal bus interface is led out of the MAC protocol stack chip and is communicated with the mainboard 1.
Further, the control unit 3 includes:
an operating system module 31, which is an OpenWrt system and is used for managing software and hardware resources;
the driving module 32 is used for driving the MAC protocol stack chip to normally work;
and the MAC protocol stack module 33 is protocol stack software for implementing a media access control function according to an IEEE802.11 protocol.
Further, the main board 1 includes: the system comprises a high-performance processor 11, a general bus interface 12, a power supply circuit 13, a JTAG debugging interface 14, a storage module 15, an Ethernet module 16 and a serial port communication module 17; the high-performance processor 11 is respectively connected with a general bus interface 12, a JTAG debugging interface 14, a storage module 15, an Ethernet module 16 and a serial port communication module 17; the other end of the universal bus interface 12 is connected with the MAC protocol stack hardware module 2; the other end of the JTAG debug interface 14 is connected with a JTAG debugger; the other end of the Ethernet module 16 is connected with the Internet; the other end of the serial port communication module 17 is connected with a PC; the storage module 15 is used for storing the control unit 3; the power supply circuit 13 is used for supplying power to the main board 1.
Further, the high performance processor 11 selects a chip capable of supporting a PCI-E or USB or SDIO or RGMII bus protocol for operating the control unit 3.
Further, the general bus interface 12 adopts a PCI-E interface, a USB interface, or an SDIO interface.
Further, the power supply circuit 13 adopts a 5-way switching power supply circuit, and is configured to convert an input power supply voltage into 12V, 5V, 3.3V, 1.8V, and 1.2V required by the motherboard 1.
Further, the storage module 15 adopts a NAND Flash chip or an SPI Flash chip for storing the control unit 3.
Further, the ethernet module 16, which employs a GiGE PHY chip, communicates with the high-performance processor 11 through an RGM II protocol.
Further, the serial port module 17 is connected with a PC computer through an RS232 protocol, and is used for controlling and acquiring corresponding information of the motherboard 1.
The invention has the following advantages:
1. the invention adopts the separated design of the mainboard and the MAC protocol stack hardware module, and the connection is carried out through the universal bus; the probability of faults existing in the verification platform is reduced, and debugging of a hardware circuit is facilitated.
2. Aiming at protocol stack chips of different versions, the invention only needs to design an MAC protocol stack hardware module according to the protocol stack chips, leads out a universal bus interface, and is communicated with the mainboard through the universal bus, thereby reducing the workload of circuit design of the related protocol stack chips and reducing the cost.
3. The invention builds a corresponding verification system through the control unit, accelerates protocol verification and test work, and accelerates product marketing.
Drawings
FIG. 1 is an overall block diagram of the present invention;
FIG. 2 is a block diagram of the motherboard hardware of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments.
Referring to fig. 1, the OpenWrt-based MAC layer protocol stack verification platform of the present invention includes a motherboard 1, a MAC protocol stack hardware module 2, and a control unit 3.
The mainboard 1 comprises a core processor 11, a general bus interface 12, a power supply circuit 13, a JTAG debugging interface 14, a storage module 15, a wired Ethernet module 16 and a serial port communication module 17; the high-performance processor 11 is respectively connected with a general bus interface 12, a JTAG debugging interface 14, a storage module 15, an Ethernet module 16 and a serial port communication module 17; the other end of the general bus interface 12 is connected with the MAC protocol stack hardware module 2; the other end of the JTAG debug interface 14 is connected with a JTAG debugger; the other end of the ethernet module 16 is connected to the internet; the other end of the serial port communication module 17 is connected with a PC; the storage module 15 is used for storing the control unit 3; the power supply circuit 13 is used for supplying power to the main board 1.
The MAC protocol stack hardware module 2 is composed of an MAC layer protocol stack chip to be verified and a peripheral circuit thereof, and the MAC protocol stack chip is led out of the universal bus interface 12, and is communicated with the motherboard 1 through the universal bus 12, so as to implement communication between the MAC protocol stack hardware module 12 and the motherboard 1.
The control unit 3 is composed of an operating system module 31, a driving module 32 and an MAC protocol stack 33; the operating system module 31 is an open source operating system OpenWrt; the driving module 32 is a driver of the MAC protocol stack chip to be verified, and is configured to drive the MAC protocol stack chip to normally operate; the MAC protocol stack 33 is protocol stack software that implements a media access control function according to the IEEE802.11 protocol standard.
Referring to fig. 2, the components in the main board 1 of the present invention are selected as follows:
the high-performance processor 11 selects a chip capable of supporting a PCI-E or USB or SDIO or RGMII bus protocol to operate the control unit 3, and this embodiment adopts but is not limited to Marvell 88F6281, which supports PCI-E, USB, SDIO and RGM II bus interfaces.
The general bus interface 12 adopts a PCI-E interface, a USB interface or an SDIO interface. The universal bus interface 12 led out by the Marvell 88F6281 of the high-performance processor of this embodiment includes a PCI-E interface, a USB interface and an SDIO interface.
The power supply circuit 13 adopts a 5-way DC/DC converter, and converts an input power supply into a voltage required by the motherboard 1 through the converter, including but not limited to 12V, 5V, 3.3V, 1.8V and 1.2V; the model of the DC/DC chip of this embodiment is not limited to AOZ1094, and the main board voltage is not limited to the 5-way voltage.
The storage module 15 adopts a NAND Flash chip or an SPI Flash chip and is used for storing the control unit 3; the storage module 15 of the present embodiment is a NAND Flash chip.
The ethernet module 16, which uses GiGE PHY chip, communicates with the high-performance processor 11 via RGM II protocol. The ethernet module 16 of this embodiment is implemented by, but not limited to, a MV88E6171R chip, and has one end connected to the high performance processor 11Marvell 88F6281 through an RGMII bus and the other end connected to the internet.
The serial port module 17 is connected with a PC computer through an RS232 protocol and used for controlling and collecting corresponding information of the motherboard 1, the serial port communication module 17 of the embodiment adopts but is not limited to an FT2232D serial port chip, one end of the chip is connected with the high performance processor 11Marvell 88F6281, and the other end is connected with the PC computer.
While the foregoing is directed to embodiments of the present invention, other and further embodiments of the invention may be devised without departing from the basic scope thereof, and the scope thereof is determined by the claims that follow.
Claims (7)
1. OpenWrt-based MAC (media access control) layer protocol stack verification platform comprises a mainboard (1), an MAC protocol stack hardware module (2) and a control unit (3), and is characterized in that:
the main board (1) comprises: the device comprises a high-performance processor (11), a universal bus interface (12), a power supply circuit (13), a JTAG debugging interface (14), a storage module (15), an Ethernet module (16) and a serial port communication module (17); the high-performance processor (11) is respectively connected with the universal bus interface (12), the JTAG debugging interface (14), the storage module (15), the Ethernet module (16) and the serial port communication module (17); the other end of the universal bus interface (12) is connected with the MAC protocol stack hardware module (2); the other end of the JTAG debugging interface (14) is connected with a JTAG debugger; the other end of the Ethernet module (16) is connected with the Internet; the other end of the serial port communication module (17) is connected with a PC; the storage module (15) is used for storing the control unit (3); the power supply circuit (13) is used for supplying electric energy to the mainboard (1);
the MAC protocol stack hardware module (2) consists of an MAC protocol stack chip and a peripheral circuit, and the MAC protocol stack chip leads out a universal bus interface (12) and is communicated with the mainboard (1);
the control unit (3) comprises: an operating system module (31) which adopts an OpenWrt system and is used for managing software and hardware resources; the driving module (32) is used for driving the MAC protocol stack chip to normally work; and the MAC protocol stack module (33) is used for realizing protocol stack software of a media access control function according to an IEEE802.11 protocol.
2. Platform according to claim 1, characterized in that the high performance processor (11) is chosen as a chip capable of supporting the PCI-E or USB or SDIO or RGMII bus protocols for running the control unit (3).
3. Platform according to claim 1, characterized in that the general bus interface (12) is a PCI-E interface or a USB interface or a SDIO interface.
4. The platform according to claim 1, characterized in that the power supply circuit (13) employs a 5-way switching power supply circuit for converting the input supply voltage to 12V, 5V, 3.3V, 1.8V and 1.2V required by the motherboard (1).
5. Platform according to claim 1, characterized in that the memory module (15), which employs NANDFlash or spilash chips, is used for storing the control unit (3).
6. The platform of claim 1, wherein the ethernet module (16) employs a GiGEPHY chip and communicates with the high performance processor (11) via RGMII protocol.
7. The platform of claim 1, wherein one end of the serial port communication module (17) is connected with a PC computer through an RS232 protocol, and is used for controlling and collecting corresponding information of the mainboard (1).
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| CN201711143572.5A CN107835108B (en) | 2017-11-17 | 2017-11-17 | OpenWrt-based MAC (media Access control) layer protocol stack verification platform |
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| CN110275857A (en) * | 2019-06-13 | 2019-09-24 | 天津市英贝特航天科技有限公司 | A kind of 5 port PCIE bus switch plates based on XMC standard interface |
| CN112469068B (en) * | 2020-11-24 | 2023-05-09 | 展讯半导体(成都)有限公司 | Test method and device |
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| KR101460665B1 (en) * | 2008-07-16 | 2014-11-12 | 삼성전자주식회사 | SoC DEVICE VERIFICATION MODEL USING MEMORY INTERFACE |
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| CN102681923A (en) * | 2011-03-16 | 2012-09-19 | 中国科学院微电子研究所 | Hardware platform device for verifying system-on-chips |
| CN103576073A (en) * | 2012-07-30 | 2014-02-12 | 合肥科盛微电子科技有限公司 | System and method for testing functions of chips |
| CN205176829U (en) * | 2013-07-25 | 2016-04-20 | 中国航天科工集团第三研究院第八三五七研究所 | Multiple communications protocol's of test configuration system on a chip's test system |
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Effective date of registration: 20220419 Address after: B201, zero one square, Xi'an Software Park, 72 Keji 2nd Road, high tech Zone, Xi'an City, Shaanxi Province, 710000 Patentee after: Tuoer Microelectronics Co.,Ltd. Address before: 710071 Taibai South Road, Yanta District, Xi'an, Shaanxi Province, No. 2 Patentee before: XIDIAN University |