CN201255865Y

CN201255865Y - Keyboard interface circuit

Info

Publication number: CN201255865Y
Application number: CNU2008201512859U
Authority: CN
Inventors: 徐平均
Original assignee: Shanghai Yaohua Weighing System Co Ltd
Current assignee: Shanghai Yaohua Weighing System Co Ltd
Priority date: 2008-07-25
Filing date: 2008-07-25
Publication date: 2009-06-10
Anticipated expiration: 2018-07-25

Abstract

The utility model discloses a keyboard interface circuit, comprising an interface circuit and a keyboard matrix, wherein the interface circuit is provided with n lead wires, via resistors, each lead wire is connected with low potential or high potential indicating the invalidity of keys. The keyboard interface circuit is characterized in that the keyboard matrix comprises a plurality of keys, wherein each key is marked as Kij, I means row and j means column, one end of each key of the i-th column is connected with the i-th lead wire, the another end of the key of the j-th row is connected with the j-th lead wire. The keyboard interface circuit has the advantages that one lead wire is adopted as an output pin and is driven as effective potential, and the other lead wires are adopted as input ends, which potentials are checked, to find closed keys, via the method, n IO pins of a single chip can connect more keys.

Description

A kind of keyboard interface circuit

Technical field

The utility model relates to circuit field, is specifically related to a kind of keyboard interface circuit.

Background technology

The schematic diagram of conventional keyboard as shown in Figure 1.1 is keyboard matrix, and 2 is the sweep signal buffer circuit, and 3 is the level prewired circuit, and 4 is the interface with single-chip microcomputer or other keyboard drive circuit.Conventional keyboard all adopts square matrix as shown in Figure 1 to arrange.The input of keyboard scan output and key signals is finished with different pins respectively.As shown in Figure 1,8 general purpose I of single-chip microcomputer/O pin P00～P07 is connected on the interface line of keyboard circuit, wherein pin P00～P03 is the keyboard scanning signal output of single-chip microcomputer, diode D1～D4 forms buffer circuit 2, prevent that several keys from making the short circuit of scanning output signal when closed simultaneously, damage circuit; Pin P04～P07 is the input pin of single-chip microcomputer, and resistance R 1～R4 has formed level prewired circuit 3, and making does not have the pin of key closure signal output to remain inactive level.It is significant level (being high level in Fig. 1) that single-chip microcomputer makes the pin of one of 4 output pins successively, and whether the level that detects each pin of P04～P07 again is effective, can judge which button closure.With the keyboard circuit of routine, the n of single-chip microcomputer IO pin connects n at most ²/ 4 keys.

Summary of the invention

The purpose of this utility model is to provide a kind of keyboard interface circuit that can connect more buttons.

To achieve these goals, the technical solution of the utility model is as follows: a kind of keyboard interface circuit, comprise interface circuit and keyboard matrix, interface circuit is provided with n root lead-in wire, be numbered 0～n-1, every lead-in wire connects invalid ground level or the high level of expression key by resistance respectively, it is characterized in that keyboard matrix comprises a plurality of buttons, and each marking keys is K _Ij, wherein i represents row, j represents row, 0≤i＜n, 0≤j＜n, i ≠ j.One end of the button of i row all is connected with i root lead-in wire, and the other end of the button that j is capable all is connected with j root lead-in wire.

Advantage of the present utility model is to adopt wherein a lead-in wire to be output pin and to drive and be significant level, makes other lead-in wire be input end simultaneously, and whether the level that detects these lead-in wires again is effective, can judge which button closure.Use this method, the n of single-chip microcomputer IO pin can connect more button, i.e. the individual button of n * (n-1).

Description of drawings

Fig. 1 is the circuit diagram of prior art

Fig. 2 is the circuit diagram of the utility model one embodiment

Fig. 3 is the circuit diagram of another embodiment of the utility model

Fig. 4 is the process flow diagram of the utility model one embodiment

Fig. 5 is the process flow diagram of another embodiment of the utility model

Embodiment

Below in conjunction with drawings and Examples the utility model is elaborated.

According to an embodiment of the present utility model, this keyboard interface circuit, comprise interface circuit and keyboard matrix, interface circuit is provided with n root lead-in wire, be numbered 0～n-1, every lead-in wire connects invalid ground level or the high level of expression key by resistance respectively, it is characterized in that keyboard matrix comprises a plurality of buttons, and each marking keys is K _Ij, wherein i represents row, j represents row, i=0～n-2, j=1～n-1, i＜j.Wherein an end of the button of i row all is connected in parallel with i root lead-in wire, and the other end of the button that j is capable all is connected in parallel with j root lead-in wire.In general, 4≤n≤16.

As shown in Figure 2, the keyboard matrix of these 8 lead-in wires comprises 28 buttons, and each button is represented K _Ij, i=0～6 wherein, j=1～7, i＜j.One end of the 0th row button all is connected with the 0th lead-in wire P0.0, one end of the 1st row button all is connected with the 1st lead-in wire P0.1, one end of the 2nd row button all is connected with the 2nd lead-in wire P0.2, one end of the 3rd row button all is connected with the 3rd lead-in wire P0.3, one end of the 4th row button all is connected with the 4th lead-in wire P0.4, one end of the 5th row button all is connected with the 5th lead-in wire P0.5, one end of the 6th row button all is connected with the 6th lead-in wire P0.6, one end of the 7th row button is connected with the 7th lead-in wire P0.7, the other end of the 1st row button is connected with the 1st lead-in wire P0.1, another end of the 2nd row button all is connected with the 2nd lead-in wire P0.2, the other end of the 3rd row button all is connected with the 3rd line lead P0.3, the other end of the 4th row button all is connected with the 4th lead-in wire P0.4, the other end of the 5th row button all is connected with the 5th lead-in wire P0.5, the other end of the 6th row button all is connected with the 6th lead-in wire P0.6, and the other end of the 7th row button all is connected with the 7th lead-in wire P0.7.

Single-chip microcomputer uses wherein a lead-in wire as output pin and drive and be significant level successively, makes other lead-in wire be input end simultaneously, and whether the level that detects these lead-in wires again is effective, can judge which button closure.Because arbitrary moment, it is output state that a lead-in wire is only arranged, and can not cause short circuit to damage so can save buffer circuit.Use this method, the n of single-chip microcomputer IO pin can connect the button of n * (n-1)/2 at most.

According to another embodiment of the present utility model, as shown in Figure 3, the keyboard matrix of these 8 lead-in wires comprises 56 buttons, and each button is expressed as K _Ij, i=0～7 wherein, j=0～7, i ≠ j, an end of the button of i row all is connected with the negative pole of i+1 diode, and the positive pole of i+1 diode goes between with the i root and is connected, and the other end of the button that j is capable all goes between with the j root and is connected.

Single-chip microcomputer uses wherein a lead-in wire as output pin and drive and be significant level successively, makes other lead-in wire be input end simultaneously, and whether the level that detects these lead-in wires again is effective, can judge which button closure.Use this method, the n of single-chip microcomputer IO pin can connect the individual button of n * (n-1) at most.

Single-chip microcomputer uses wherein a lead-in wire as output pin and drive and be significant level successively, makes other lead-in wire be input end simultaneously, and whether the level that detects these lead-in wires again is effective, can judge which button closure.Use this method, the n of single-chip microcomputer IO pin can connect the individual button of n * (n-1) at most.Particular flow sheet is seen Fig. 4 and Fig. 5.Suppose that keyboard matrix has n lead-in wire, 1 is significant level.Among first embodiment, use i root lead-in wire Pi to be significant level successively as output lead and driving, use the lead-in wire Pi+1～Pn-1 of i root lead-in wire back to be input end, whether detect leaded is 1, it is significant level, if the j line is a significant level, then explanation is listed as j line unit closure, calculation key=i*n+j with the i that this root lead-in wire is connected.Among second embodiment, use i root lead-in wire Pi to be significant level successively as output lead and driving, use other lead-in wire except that i root lead-in wire Pi to be input end, whether detect leaded is 1, if have, then explanation is listed as j line unit closure, calculation key=i*n+j with the i that this root lead-in wire is connected.

Need to prove that in this manual, the numbering of button, lead-in wire, pin is all from 0 to n-1, and the numbering of diode from 1 to n.

Claims

1, a kind of keyboard interface circuit comprises interface circuit and keyboard matrix, and interface circuit is provided with n root lead-in wire, and every lead-in wire connects invalid ground level or the high level of expression key by resistance respectively, it is characterized in that keyboard matrix comprises a plurality of buttons, and each marking keys is K _Ij, wherein i represents row, and j represents row, and wherein an end of the button of i row all is connected with i root lead-in wire, and an end of the button that j is capable all is connected with j root lead-in wire.

2, keyboard interface circuit as claimed in claim 1, the keyboard matrix that it is characterized in that this n bar lead-in wire comprise the button of n * (n-1)/2, and each button is expressed as K _Ij, i=0～n-2 wherein, j=1～n-1, i＜j.

3, keyboard interface circuit as claimed in claim 2, the keyboard matrix that it is characterized in that this n bar lead-in wire comprise the individual button of n * (n-1), and each button is expressed as K _Ij, i=0～n-1 wherein, j=0～n-1, i ≠ j, an end of the button of i row all is connected with a certain utmost point of i+1 diode, and another utmost point of i+1 diode goes between with the i root and is connected, and the other end of the button that j is capable all goes between with the j root and is connected.