CN201008093Y

CN201008093Y - Voltage mutual inductor ferromagnetic resonance canceling device

Info

Publication number: CN201008093Y
Application number: CNU2007201003892U
Authority: CN
Inventors: 穆希华
Original assignee: BAODING BOWEI TECHNOLOGY Co Ltd
Current assignee: BAODING BOWEI TECHNOLOGY Co Ltd
Priority date: 2007-01-19
Filing date: 2007-01-19
Publication date: 2008-01-16
Anticipated expiration: 2017-01-19

Abstract

The utility model discloses a voltage mutual inductor ferromagnetic resonance eliminating device, wherein the CPU is connected through address bus with a latch, a trigger, a digital buffer and a processing saver, the output lead of the latch is connected with a liquid crystal display unit and an interface chip after passing the digital buffer, the interface chip is connected to a reverse driver, a signal indicating unit and a button input unit, the reverse driver is connected to the signal indicating unit, a zero sequence voltage input unit is connected outside with a voltage mutual inductor orifice triangle, the output end of the zero sequence voltage is connected with input end of the CPU, the CPU is also connected with a communication interface unit and a watch dog unit. The utility model realizes absolute elimination of the ferromagnetic resonance, which is simple in lead, convenient in debugging. Amount of installing and debugging is decreased, which will bring no influence to the system and reliability, long term stability and anti-jamming performance are improved.

Description

A kind of voltage transformer ferro resonance cancellation element

One, affiliated technical field

The utility model relates to a kind of device that is used to eliminate voltage transformer ferro resonance fault.

Two, background technology

Voltage transformer is an equipment commonly used in the electric power system, and the capacitance parameter of it and system forms the oscillation circuit of many complexity, because the nonlinear characteristic of electromagnetic potential transformer when satisfying certain condition, just might excite ferro resonance.Ferro resonance often causes overvoltage in a certain part of electrical network, thereby jeopardizes the insulation of electric equipment, may influence the normal running conditions of overvoltage protection, some in addition cause burning or exploding of voltage transformer.For this reason, traditional solution is to decay at voltage transformer secondary open delta place serial connection bulb or resistance.This method can't be made diagnosis accurately at particular problem, can not tackle the problem at its root.For this reason, a kind of simulation harmonic elimination apparatus arises at the historic moment, and it can eliminate the ferro resonance of a certain characteristic frequency, yet but often because of the arc grounding misoperation.Subsequently, people propose a kind of harmonic elimination method of microcomputer-based intelligentization again, but because the complexity of resonant tank and the resonance origin cause of formation, cause the diversity of resonance frequency, show as the resonance, industrial frequency resonance, frequency tripling resonance of three frequency division resonance, two divided-frequency resonance and near frequency thereof etc.Existing these common harmonic elimination apparatus only can be eliminated the resonance of a certain frequency and can not eliminate the resonance of various frequencies fully, so that produce malfunction or tripping.In addition, though also have the existing harmonic-eliminating resistor that is installed at primary side that certain harmonic elimination effect is arranged, its wiring complexity, the system that participates in is central to system's generation influence more or less, and does not possess may observe, can store, printable, but many intelligent processing methods such as communication.Also has a kind of harmonic elimination method in the prior art, promptly when preventing the overvoltage that arc grounding causes effectively, at distribution system neutral point installing arc suppression coil; Because arc suppression coil is connected on neutral point circuit, its inductance value is compared much smaller with voltage transformer equivalence zero sequence inductance, be difficult for constituting parameter matching, can prevent the generation of resonance.Though this method effect is obvious, but all ferro resonances eliminated, but costs such as cost is higher, installation, debugging are also all very high.

Three, summary of the invention

The utility model solves the above-mentioned problems in the prior art exactly, and providing a kind of can accurately judge ferro resonance, and reliable harmonic elimination can realize that again wiring is simple again, realizes unattended voltage transformer ferro resonance cancellation element.

For addressing the above problem, technical solution of the present utility model is: a kind of voltage transformer ferro resonance cancellation element, it comprises central processing unit, trigger, latch, data buffer, program storage, data storage and interface chip, the central control unit of reverse driven, the residual voltage input unit, the harmonic elimination output unit that comprises photoisolator and solid-state relay, liquid crystal display, the signal indicating member, key-press input unit, comprise reverser, photoisolator, the signal output unit of reverse driven and relay, communication interface unit and watchdog unit; The central controller of central control unit links to each other with program storage with latch, trigger, one of them data buffer, data storage respectively by address bus, the output line of latch is behind another data buffer, be connected to the input of liquid crystal display and interface chip, the output of interface chip is connected to the input of reverse driven, signal indicating member and key-press input unit, and the output of reverse driven is connected to the input of signal indicating member; The input external voltage instrument transformer open delta of residual voltage input unit, the input of its output termination central control unit; The output of trigger connects the input of the photoisolator of harmonic elimination output unit, and the solid-state relay output of harmonic elimination output unit is external to the voltage transformer open delta; The output of central control unit is connected with the input of communication interface unit, watchdog unit.

The D0-D7 port of the central controller U0 of described central control unit links to each other with trigger U8, data buffer U11, data storage U13, program storage U12 with latch U9 respectively by bus; The output A0-A7 of latch U9 and the AD8-AD15 of central controller U0 are connected respectively to address bus port A0-A12, the A0-A14 of program storage U12 and data storage U13 again; The output A0-A4 of latch U9 also connects the input of data buffer U10, the output PA0-PA4 of data buffer U10 and the output PD0-PD7 of U11 are connected liquid crystal display, and the output PD0-PD7 of U11 is connected to the input of interface chip U14 simultaneously; The output PC0-PC7 port of interface chip U14 is connected to the input of reverse driven U15, and the output of reverse driven U15 is connected to the input of signal indicating member; The output PB0-PB7 port of interface chip U14 connects the input of key-press input unit.

Described residual voltage input unit is made up of four partial circuits, and each circuit theory and connected mode are identical; The open delta of the external power system voltage instrument transformer of input of the voltage transformer of every partial circuit inside is PT1, PT1*-PT4, PT4*, the output of voltage transformer connects the end of potentiometer RW1-RW4 respectively, the other end ground connection of potentiometer RW1-RW4, lifting one's head and connect the P0.0-P0.3 port that is connected to the central processing unit U0 of central control unit behind capacitance-resistance filter R31-R34 and the C21-C24 respectively in the center, carries out A/D conversion and internal arithmetic.

Described harmonic elimination output unit is made up of four partial circuits, and every partial circuit is made up of photoisolator U5 and solid-state relay JDQ1; Trigger U8 output XX0-XX3 is connected respectively to input pin 1 pin of photoisolator U5, the 3 pin ground connection of photoisolator U5; Output pin 7 pin of photoisolator U5 connect 3 pin of solid-state relay JDQ1 respectively, and 5 pin of photoisolator U5 meet power supply VCC2; 4 pin ground connection GND2 of solid-state relay, its 1 pin and 2 pin are external to open delta PT1, PT1*-PT4, the PT4* of voltage transformer.

Described signal indicating member comprises power supply, operation, plant failure, ground connection, resonance, overvoltage, seven indicator lights of harmonic elimination.Be connected to the input of reverse driven U15 by the PC0-PC7 port of central control unit interface chip U14, the output of reverse driven U15 connects each indicator light, and indicator light is connected to power supply through resistance again.

Described signal output unit comprises four partial circuits, and every route reverser U30, photoelectric isolated chip U3, reverse driven U4 and relay J DQ form; The output BC0-BC3 of trigger U8 is connected respectively to signal input pin 13 pin of reverser U30, signal output pin 12 pin of reverser U30 are connected to signal input pin 2 pin of photoelectric isolated chip U3, control end 15 pin of photoelectric isolated chip U3 are connected to signal input pin 1 pin of reverse driven U4, output 16 pin of reverse driven U4 are connected respectively to input 1 pin of relay J DQ behind current-limiting resistance R3,2 pin of relay J DQ are connected to power supply VCC2, control each relay J DQ, the disconnection that realizes the relay node is with closed; Output 3 pin of relay J DQ are connected alarm BJ1, BJ1*-BJ4, BJ4* respectively with 4 pin.

This installs real-time monitoring voltage instrument transformer open delta voltage.The open-delta of voltage transformer is received PT1, the PT1*-PT4 of this device, the input of PT4*, voltage transformer step-down through device inside, be connected to potentiometer RW1-RW4, through step-down dividing potential drop and capacitance-resistance filter R31-R34 and C21-C24, be connected to the P0.0-P0.3 of the central processing unit of central control unit, carry out A/D conversion and internal arithmetic.Through after the data acquisition, program is 17Hz, 25Hz, 50Hz, the component of voltage of four kinds of frequencies of 150Hz of analytical calculation open delta voltage immediately.When the voltage that detects arbitrary component is higher than the startup value of false voltage, promptly judges fault has taken place.If earth fault or overvoltage fault have taken place, central processing unit can be lighted " ground connection " or " overvoltage " indicator light by data/address bus D0-D7 and interface chip U14 and reverse driven U15; CPU control data bus D0-D7 output simultaneously, driving by U8, through reverser U30 and photoisolator U3 and reverse driven U4, control alarm relay JDQ coil gets, make the normally opened contact closure, provide signal alarm, be connected to BJ1, BJ1*-BJ4, BJ4*, and by liquid crystal display demonstration fault message, simultaneously fault message is stored, communication interface unit the fault message teletransmission to host computer, fault message is sent to relevant department, realizes telemechanical control, realize unattended operation, make device be applicable to unattended operation transformer station, system mode can reach remote monitoring by communication.When judging generation resonance fault, no matter be 3 frequency divisions, 2 frequency divisions, frequency multiplication or industrial frequency resonance (being 17Hz, 25Hz, 50Hz, 150Hz resonance), program Controlled CPU data/address bus D0-D7 output immediately, through driver U8, photoisolator U5, start high power solid state relay J DQ1, apply powerful damping, the ferro resonance of the inhibition and the system of elimination to system, CPU lights resonance and harmonic elimination lamp, information stores, demonstration, printing and teletransmission simultaneously.The utility model has been realized the elimination fully to ferro resonance, and wiring is simple, and debugging is convenient, can take four sections buses at most to, reduced the Installation and Debugging amount, and this device does not bring any influence to system.In addition, the adding of watchdog unit makes that device hardware still is that software has all improved device reliability of operation and long-time stability greatly.From signal output unit and harmonic elimination output unit partly, this microcomputer harmonic elimination apparatus has increased the photoelectricity isolation features, makes that the extraneous high pressure under the abnormal conditions can't seal in device, can not cause the damage of device, has improved the interference free performance of device.The utility model is widely used in the isolated neutral of 66KV, 35KV, 10KV, 6KV, 3KV and following electric pressure or through resistance, arc suppression coil earthing system.The utility model is equipped with state-of-the-art intelligent software, move more reliable, the operation simpler, more directly perceived, more accurate.

Four, description of drawings

Below in conjunction with accompanying drawing the utility model is further described:

Fig. 1 is circuit theory diagrams of the present utility model.

Five, embodiment

As shown in Figure 1, present embodiment comprises central control unit 7, residual voltage input unit 1, harmonic elimination output unit 8, liquid crystal display 3, signal indicating member 5, key-press input unit 6, signal output unit 9, communication interface unit 12, audible alarm unit 11, mini-printer 4, information memory cell 2 and watchdog unit 10.The D0-D7 port of the central controller U0 (80C196) of central control unit 7 links to each other with trigger U8 (73LS273), data buffer U11 (74LS245), data storage U13 (6264), program storage U12 (27C256) with latch U9 (73LS373) respectively by bus.The output A0-A7 of latch U9 (73LS373) and the AD8-AD15 of central controller U0 are connected respectively to address bus port A8-A12, the A8-A14 of program storage U12 and data storage U13 again.The output A0-A4 of latch U9 also connects the input of data buffer U10, the output PA0-PA4 of data buffer U10 and the output PD0-PD7 of U11 are connected liquid crystal display, and the output PD0-PD7 of U11 is connected to the input of interface chip U14 simultaneously.The output PC0-PC7 port of interface chip U14 is connected to the input of reverse driven U15, and the output of reverse driven U15 is connected to the input of signal indicating member.The output PB0-PB7 port of interface chip U14 connects the input of key-press input unit.The output PDD0-PDD7 port of interface chip U14 is external to mini-printer.Residual voltage input unit 1 is made up of four partial circuits, and each circuit theory and connected mode are identical.The electric power system open delta is the input that PT1, PT1*-PT4, PT4* connect the voltage transformer pt 1-PT4 of every partial circuit inside respectively, be connected to potentiometer RW1-RW4 through transformation, behind step-down dividing potential drop and the capacitance-resistance filter capacitance-resistance filter formed by resistance R 31-R34 and capacitor C 21-C24, be connected to the P0.0-P0.3 of the central processing unit 80C196KC of central control unit 7, carry out A/D conversion and internal arithmetic.Harmonic elimination output unit 8 is made up of four partial circuits, and every partial circuit is made up of photoisolator U5 and solid-state relay JDQ1.The D0-D7 of central processing unit U0 is connected to trigger U8 and triggers, the output XX0-XX3 of trigger U8 is connected respectively to input pin 1 pin of photoisolator U5, the 3 pin ground connection of photoisolator U5, output pin 7 pin output to 3 pin of solid-state relay JDQ1, and 5 pin of photoisolator U5 meet power supply VCC2; 4 pin ground connection GND2 of solid-state relay, its 1 pin and 2 pin are external to open delta PT1, PT1*-PT4, the PT4* of voltage transformer.Liquid crystal display 3 comprises LCD and wire jumper setting, can realize the shared of 18 pin and 20 pin liquid crystal display screens.Signal indicating member 5 mainly is made up of power supply, operation, plant failure, ground connection, resonance, overvoltage, seven indicator lights of harmonic elimination, PC0-PC7 port by central control unit interface chip U14 is connected to reverse driven U15, through being reversely connected to indicator light, indicator light is connected to power supply through resistance.Key-press input unit 6 by involution, reset, return, carriage return, eight buttons in upper and lower, left and right and the resistance that is connected, capacitor element forms; Electric capacity one end connects button, an end ground connection; PB0-PB7 by the interface chip U14 of central control unit 7 is connected to the button input.Signal output unit 9 mainly is made up of four partial circuits, and every route reverser U30 (74LS04), photoelectric isolated chip U3 (TLP521), reverse driven U4 (ULN2004) and relay J DQ form; The output BC0-BC3 of trigger U8 is connected respectively to signal input pin 13 pin of reverser U30, signal output pin 12 pin oppositely are connected to signal input pin 2 pin of photoelectric isolated chip U3, be connected to signal input pin 1 pin of reverse driven U4 through control end 15 pin of photoelectric isolated chip U3, output 16 pin of reverse driven U4 are connected to 1 pin of relay J DQ through current-limiting resistance R3,2 pin of relay J DQ are connected to power supply VCC2, control each relay J DQ, the disconnection that realizes the relay node is with closed; Output 3 pin of relay J DQ are connected alarm BJ1, BJ1*-BJ4, BJ4* respectively with 4 pin.Audible alarm unit 11 is made up of triode and buzzer FMQ, the P1.4 mouth of central processing unit U0 is connected to resistance R 1, be connected to the b utmost point of triode Q1, the e utmost point of triode Q1 connects the b utmost point of triode Q2, the e utmost point ground connection of triode Q2, the collector electrode c of triode Q1, Q2 is connected to negative pole 2 pin of buzzer FMQ, and positive pole 1 pin of buzzer FMQ is connected to power supply VCC1.Data/address bus is directly connected to the data wire input of mini-printer 4 by the PDD0-PDD7 port of interface chip U14.Communication interface unit 12 is made up of communication chip U16, U17 and capacitor C1, C2, C3 and C4; The TXD port of central controller U0 connects the T2I pin of communication chip U17 and the DI pin of U16; The RXD of central controller U0 connects the R20 pin of communication chip U17 and the R0 pin of communication chip U16; The P1.0 port of central controller U0 connects the DE pin of communication chip U16.The output T2C of the A of communication chip U16, B, Z, Y pin and communication chip U17 and R2I pin are connected to the output of device; The C1+ pin of communication chip U17 links to each other by capacitor C 1 with the C1-pin, and the C2+ pin links to each other by capacitor C 2 with the C2-pin, and by capacitor C 3 and C4 ground connection, the GND pin meets GND respectively for V+ pin and V-pin.Watchdog unit 10 is made up of chip U2 (MAX706); The P1.3 of central controller U0 connects the WDI pin of chip U2, central controller U0 /the RST pin is connected to power supply VCC1 through resistance R 2, is connected to the positive pole of diode D6 simultaneously, the negative pole of diode D6 be connected to chip U2 /the REST pin; Chip U2 /the MR pin links to each other with key-press input unit 6, simultaneously chip U2 /the MR pin is connected to the positive pole of diode D12, the negative pole of diode D12 be connected to chip U2 /the WD0 pin.Information memory cell 2 is made up of chip U1 (24C16), and the P1.1 pin of central controller U0 and P1.2 pin are connected respectively to data wire SDA and the clock line SCL pin of chip U1, the A1 of U1, A2, A3 and GND pin ground connection.

Claims

1. voltage transformer ferro resonance cancellation element, it is characterized in that: it comprises the central control unit of central processing unit, trigger, latch, data buffer, program storage, data storage and interface chip, reverse driven, the residual voltage input unit, the harmonic elimination output unit that comprises photoisolator and solid-state relay, liquid crystal display, the signal indicating member, key-press input unit, the signal output unit that comprises reverser, photoisolator, reverse driven and relay, communication interface unit and watchdog unit; The central controller of central control unit links to each other with program storage with latch, trigger, one of them data buffer, data storage respectively by address bus, the output line of latch is behind another data buffer, be connected to the input of liquid crystal display and interface chip, the output of interface chip is connected to the input of reverse driven, signal indicating member and key-press input unit, and the output of reverse driven is connected to the input of signal indicating member; The input external voltage instrument transformer open delta of residual voltage input unit, the input of its output termination central control unit; The output of trigger connects the input of the photoisolator of harmonic elimination output unit, and the solid-state relay output of harmonic elimination output unit is external to the voltage transformer open delta; The output of central control unit is connected with the input of communication interface unit, watchdog unit.

2. voltage transformer ferro resonance cancellation element according to claim 1 is characterized in that: the D0-D7 port of the central controller U0 of described central control unit links to each other with trigger U8, data buffer U11, data storage U13, program storage U12 with latch U9 respectively by bus; The output A0-A7 of latch U9 and the AD8-AD15 of central controller U0 are connected respectively to address bus port A0-A12, the A0-A14 of program storage U12 and data storage U13 again; The output A0-A4 of latch U9 also connects the input of data buffer U10, the output PA0-PA4 of data buffer U10 and the output PD0-PD7 of U11 are connected liquid crystal display, and the output PD0-PD7 of U11 is connected to the input of interface chip U14 simultaneously; The output PC0-PC7 port of interface chip U14 is connected to the input of reverse driven U15, and the output of reverse driven U15 is connected to the input of signal indicating member; The output PB0-PB7 port of interface chip U14 connects the input of key-press input unit; The output PDD0-PDD7 port of interface chip U14 is external to mini-printer.

3. voltage transformer ferro resonance cancellation element according to claim 1 is characterized in that: described residual voltage input unit is made up of four partial circuits, and each circuit theory and connected mode are identical; The open delta of the external power system voltage instrument transformer of input of the voltage transformer of every partial circuit inside is PT1, PT1*-PT4, PT4*, the output of voltage transformer connects the end of potentiometer RW1-RW4 respectively, the other end ground connection of potentiometer RW1-RW4, center are lifted one's head and are connected the P0.0-P0.3 port that is connected to the central processing unit U0 of central control unit behind capacitance-resistance filter R31-R34 and the C21-C24 respectively.

4. voltage transformer ferro resonance cancellation element according to claim 1 is characterized in that: described harmonic elimination output unit is made up of four partial circuits, and every partial circuit is made up of photoisolator U5 and solid-state relay JDQ1; Trigger U8 output XX0-XX3 is connected respectively to input pin 1 pin of photoisolator U5, the 3 pin ground connection of photoisolator U5; Output pin 7 pin of photoisolator U5 connect 3 pin of solid-state relay JDQ1 respectively, and 5 pin of photoisolator U5 meet power supply VCC2; 4 pin ground connection GND2 of solid-state relay, its 1 pin and 2 pin are external to open delta PT1, PT1*-PT4, the PT4* of voltage transformer.

5. voltage transformer ferro resonance cancellation element according to claim 1, it is characterized in that: described signal output unit comprises four partial circuits, every route reverser U30, photoelectric isolated chip U3, reverse driven U4 and relay J DQ form; The output BC0-BC3 of trigger U8 is connected respectively to signal input pin 13 pin of reverser U30, signal output pin 12 pin of reverser U30 are connected to signal input pin 2 pin of photoelectric isolated chip U3, control end 15 pin of photoelectric isolated chip U3 are connected to signal input pin 1 pin of reverse driven U4, output 16 pin of reverse driven U4 are connected respectively to input 1 pin of relay J DQ behind current-limiting resistance R3,2 pin of relay J DQ are connected to power supply VCC2, and output 3 pin of relay J DQ are connected alarm BJ1, BJ1*-BJ4, BJ4* respectively with 4 pin.

6. voltage transformer ferro resonance cancellation element according to claim 1 is characterized in that: described signal indicating member comprises power supply, operation, plant failure, ground connection, resonance, overvoltage, seven indicator lights of harmonic elimination; Be connected to the input of reverse driven U15 by the PC0-PC7 port of central control unit interface chip U14, the output of reverse driven U15 connects each indicator light, and indicator light is connected to power supply through resistance again.

7. voltage transformer ferro resonance cancellation element according to claim 1 is characterized in that: described communication interface unit is made up of communication chip U16, U17 and capacitor C1, C2, C3 and C4; The TXD port of central controller U0 connects the T2I pin of communication chip U17 and the DI pin of U16; The RXD of central controller U0 connects the R20 pin of communication chip U17 and the R0 pin of communication chip U16; The P1.0 port of central controller U0 connects the DE pin of communication chip U16.The output T2C of the A of communication chip U16, B, Z, Y pin and communication chip U17 and R2I pin are connected to the output of device; The C1+ pin of communication chip U17 links to each other by capacitor C 1 with the C1-pin, and the C2+ pin links to each other by capacitor C 2 with the C2-pin, and by capacitor C 3 and C4 ground connection, the GND pin meets GND respectively for V+ pin and V-pin.

8. voltage transformer ferro resonance cancellation element according to claim 1, it is characterized in that: described watchdog unit is made up of chip U2; The P1.3 of central controller U0 connects the WDI pin of chip U2, central controller U0 /the RST pin is connected to power supply VCC1 through resistance R 2, is connected to the positive pole of diode D6 simultaneously, the negative pole of diode D6 be connected to chip U2 /the REST pin; Chip U2 /the MR pin links to each other with key-press input unit 6, simultaneously chip U2 /the MR pin is connected to the positive pole of diode D12, the negative pole of diode D12 be connected to chip U2 /the WDO pin.

9. voltage transformer ferro resonance cancellation element according to claim 1, it is characterized in that: further comprising the audible alarm unit of forming by triode and buzzer FMQ, the P1.4 mouth of central processing unit U0 is connected to resistance R 1, be connected to the b utmost point of triode Q1, the e utmost point of triode Q1 connects the b utmost point of triode Q2, the e utmost point ground connection of triode Q2, the collector electrode c of triode Q1, Q2 is connected to negative pole 2 pin of buzzer FMQ, and positive pole 1 pin of buzzer FMQ is connected to power supply VCC1.