CN1988426B - Reference clock sending circuit and method for light repeat plate - Google Patents
Reference clock sending circuit and method for light repeat plate Download PDFInfo
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- CN1988426B CN1988426B CN2005101350287A CN200510135028A CN1988426B CN 1988426 B CN1988426 B CN 1988426B CN 2005101350287 A CN2005101350287 A CN 2005101350287A CN 200510135028 A CN200510135028 A CN 200510135028A CN 1988426 B CN1988426 B CN 1988426B
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Abstract
This invention discloses a transmission circuit of a reference clock used on a light transfer plate and a method, which adds three cheap devices of a D/A, a selector and a comparator, utilizes a VCO control voltage in a standard phase-locking ring to control and transmit a reference clock to be compared by a comparator and a D/A output voltage approaching to this time of error voltage when the input light service is normal, when the clock can't be used, the selector is used to select the stored D/A output voltage as the control voltage of VCO, when the clock is normal, the selector is used again to select a normal error voltage as the control voltage of the VCO so as to keep valid of reference clocks whether or not the input service optical clock is usable.
Description
Technical field
The present invention relates to the optical communication equipment field, relate in particular to a kind of reference clock transtation mission circuit and method that is used on the light repeat plate.
Background technology
In wave transmission system, the major function of light repeat plate is to adopt light/electricity/light conversion regime, be converted to the satisfied light signal that G.692 requires with satisfying the professional light signal of G.691 advising any producer of requirement, also finish error correction coding, expense detection processing simultaneously.
In the optical service signal of output, insert alarm indication signal (AIS, Alarm IndicationSignal), belong to one of content of its overhead processing work: when the light signal of system input occurs that quality descends and when causing business normally not transmit, light repeat plate need insert ais alarm in service signal, the incoming traffic signal of this upstream node of notice downstream node breaks down.
Because when quality problems appear in the light signal of system's input, light repeat plate has just lost a reliable and stable frequency source, the outgoing traffic signal clock of this moment, because of there not being operable synchronisation source to lose efficacy, the service signal that light repeat plate is issued downstream node can exist tangible frequency deviation or frequency shakiness, and downstream node just might can't identify the ais alarm that inserts in the professional light signal like this.
Therefore, this just need provide a kind of circuit and method, so that occur under the situation of quality problems at the light signal of input, guarantees that still the outgoing traffic clock stable is reliable.
Summary of the invention
Technical problem to be solved by this invention is, a kind of reference clock transtation mission circuit and method that is used on the light repeat plate is provided, and it is effective to keep light repeat plate to send reference clock with low cost, thereby makes light repeat plate that the alarm indication signal of no frequency deviation can be provided.
The invention provides a kind of reference clock transtation mission circuit that is used on the light repeat plate, comprise phase-locked loop, have low pass filter and voltage controlled oscillator in the phase-locked loop, professional light recovered clock signal is through described low pass filter, produce error voltage, the output of described voltage controlled oscillator sends reference clock under voltage control, described reference clock transtation mission circuit also comprises: aanalogvoltage generation circuit, comparator, either-or switch circuit, wherein:
The input signal of described comparator is the voltage that produces via the error voltage of described low pass filter generation and described aanalogvoltage generation circuit, described aanalogvoltage generation circuit is adjusted the voltage of generation according to the comparative result of described comparator, when the comparator output signal saltus step, the voltage of current generation is defined as normally controlling voltage, and stable output;
The input signal of described either-or switch circuit is error voltage and the definite normal control voltage of described aanalogvoltage generation circuit that produces via described low pass filter, select signal is that " professional light clock recovered " whether signal is judged in available monitoring, when this judgement signal is "Yes", this either-or switch circuit selects described error voltage to control described voltage controlled oscillator as output voltage, when this judgement signal was "No", this either-or switch circuit selected described normal control voltage to control described voltage controlled oscillator as output voltage.
Described reference clock transtation mission circuit further comprises:
The comparative result monitor is used to monitor the output signal of described comparator, when the output signal saltus step, stops the voltage adjustment of described aanalogvoltage generation circuit, and writes down the voltage of this current generation.Described comparative result monitor is programmable logic device.
Described reference clock transtation mission circuit further comprises:
Memory is used to store the voltage of the current generation of described aanalogvoltage generation circuit of described comparative result monitor record.
Described aanalogvoltage generation circuit is the digital to analog converter by programmable logic device or CPU linear regulation.
Described reference clock transtation mission circuit further comprises: signal generating circuit is judged in monitoring, is used for basis to the monitoring that the professional light signal of importing carries out, and whether signal is judged in available monitoring to send " professional light clock recovered ".
The present invention also provides a kind of reference clock sending method that is used on the light repeat plate, comprise phase-locked loop on the described light repeat plate, have low pass filter and voltage controlled oscillator in the phase-locked loop, professional light recovered clock signal is through described low pass filter, produce error voltage, the output of described voltage controlled oscillator sends reference clock under voltage control, this reference clock sending method comprises the steps:
Use an aanalogvoltage generation circuit to produce aanalogvoltage, and this voltage is sent into a comparator;
To send into described comparator via the error voltage that described low pass filter produces, the voltage that produces with described aanalogvoltage generation circuit compares;
According to the comparative result of described comparator, adjust the voltage that described aanalogvoltage generation circuit produces, when the comparator output signal saltus step, the voltage of current generation is defined as normally controlling voltage, and stable output;
The normal control voltage of described error voltage and the output of described aanalogvoltage generation circuit is sent into an either-or switch;
To the monitoring that the professional light signal of importing carries out, whether signal is judged in available monitoring to produce " professional light clock recovered ", and with the selection signal of this signal as described either-or switch circuit;
When this judgement signal is "Yes", this either-or switch selects described error voltage to control described voltage controlled oscillator as output voltage, when this judgement signal was "No", this either-or switch selected described normal control voltage to control described voltage controlled oscillator as output voltage.
Described aanalogvoltage generation circuit is the digital to analog converter by programmable logic device or CPU linear regulation.
Described when the comparator output signal saltus step, the voltage of current generation is defined as normally controlling the step of voltage, comprising:
Monitor the output signal of described comparator, when this output signal saltus step, stop the voltage adjustment of described aanalogvoltage generation circuit, and the voltage that writes down this current generation is normal control voltage.
This reference clock sending method further comprises: through comparator relatively after, the normal control magnitude of voltage that described aanalogvoltage generation circuit is determined is stored in the memory.
Described " professional light clock recovered " whether signal is judged in available monitoring, is that the signal that monitoring produced that signal generating circuit carries out according to the professional light signal to input is judged in a monitoring.
Reference clock transtation mission circuit and the method that is used on the light repeat plate of the present invention, analog to digital converter, alternative selector, three inexpensive device of comparator have only been increased, directly utilize the VCO (voltage controlled oscillator) in the former phase-locked loop circuit to reach the effective effect of reference clock that guarantees on the light repeat plate then, the low-cost frequency deviation requirement of satisfying output AIS light signal, and need not directly to use the clock source of a high frequency, high accuracy, high stability to produce reference clock, reduced the cost expense.When its subsystem switches to D/A driving VCO, the PLL open circuit, this state is convenient to the maintainability that tracing trouble improves system.
Description of drawings
Fig. 1 is the theory diagram according to the light repeat plate system of the embodiment of the invention;
Fig. 2 is the structured flowchart that is used for the reference clock transtation mission circuit on the light repeat plate according to the embodiment of the invention.
Embodiment
Below in conjunction with accompanying drawing, by the detailed description to preferred embodiment of the present invention, the technical scheme and the beneficial effect thereof of the inventive method are apparent with making.
Reference clock transtation mission circuit and the method that is used on the light repeat plate of the present invention, successful Application is being supported SDH (synchronous digital hierarchy, Synchronous Digital Hierarchy) on the Ye Wu dense wave division multipurpose light repeat plate, as shown in Figure 1, it is the system block diagram of light repeat plate of the present invention, this system mainly comprises optical receiver, phase-locked loop part, Business Processing part and optical repeater, wherein: the professional light in line side enters optical receiver, and optical receiver extracts business clock and data; System business handling part branch carries out some overhead processing, and then by optical repeater business datum is sent.
In course of normal operation, the Business Processing of system partly needs two clock supports: one from optical receiver " professional light recovered clock "; Another partly provides " transmission reference clock " from phase-locked loop.On the former, their frequencies are consistent or fix a proportionate relationship (this is that principle by phase-locked loop guarantees) accurately by pll lock for the latter.
Go into when light quality goes wrong in the business of circuit, optical receiver can not extract stable business clock, so the phase-locked loop part also can't provide qualified " transmission reference clock ".Because this moment, " transmission reference clock " quality can not guarantee,, the ais alarm indicating services signal that optical repeater sends detects so can not being received by downstream node equipment reliably.
The circuit that the reference clock that is used on the light repeat plate of the present invention sends as shown in Figure 2, mainly is made up of standard phase-locked loop circuit, alternative analog switch, analog to digital converter (D/A), comparator.Circuit shown in Figure 2 is exactly the phase-locked loop part in the light repeat plate system shown in Figure 1.Wherein, have low pass filter and voltage controlled oscillator in the standard phase-locked loop, professional light recovered clock signal produces error voltage through described low pass filter, and the output of described voltage controlled oscillator sends reference clock under voltage control.
Characteristics of the present invention are, the input signal of comparator is the voltage that produces via the error voltage of low pass filter generation and Digital To Analog Convert, this Digital To Analog Convert of FPGA/CPU linear regulation, adjust the voltage of generation according to the comparative result of described comparator, when comparative result near the time, the voltage of current generation is defined as normally controlling voltage, and stable output;
The input signal of described alternative analog switch is error voltage and the definite normal control voltage of Digital To Analog Convert that produces via described low pass filter, select signal is that " professional light clock recovered " whether signal is judged in available monitoring, i.e. " selector switch " signal, when this judgement signal is "Yes", this either-or switch circuit selects described error voltage to control described voltage controlled oscillator as output voltage, when this judgement signal was "No", this either-or switch circuit selected described normal control voltage to control described voltage controlled oscillator as output voltage.
After system powers on, clocks all among Fig. 1 is normal, the professional forwarding normally, alternative analog switch among Fig. 2 is selected the control voltage of the error voltage of phase-locked loop output as VCO in the phase-locked loop always at this moment, obtain the control voltage of voltage controlled oscillator (VCO) in Fig. 2 phase-locked loop systems this moment, correct control magnitude of voltage is recorded in the nonvolatile storage; Continue to monitor the professional light signal of system's input again, when its quality goes wrong when causing that " professional light clock recovered " is unavailable among Fig. 1, switch alternative analog switch among Fig. 2, the voltage that uses D/A to export drives the control voltage end of phase-locked loop voltage controlled oscillator (VCO), drives the control voltage that D/A produces and professional normally VCO control constantly magnitude of voltage equates with the D/A control numerical value that writes down previously.The frequency of VCO output this moment clock is the same with operate as normal the time, that is: it is effective to send reference clock, and having guaranteed to send downstream, the alarm signal of equipment surpasses the frequency shift (FS) that requires.Then, continue monitoring, when the incoming traffic optical signal quality recovers good for use, the selection of alternative analog switch is switched under the normal mode of operation get final product again.
Use circuit structure work shown in Figure 2, can allow the phase-locked loop section of system under the situation of " professional light clock recovered " shakiness even disappearance, provide quality enough to send reference clock reliably, guarantee that downstream node can detect the ais alarm index signal of system's transmission.Here ' enough reliable ' is meant: utilize this to send its frequency deviation of professional light that reference clock sends less than 20ppm, satisfy standard-required.The specific implementation process is as follows:
(1) when Fig. 1 system light path business is normal, use " selector switch " signal of FPGA control alternative analog switch among Fig. 2 to be high level, like this " error voltage " of phase-locked loop output as the control voltage of VCO, voltage controlled oscillator VCO produces the transmission reference clock of characteristic frequency; Notice that the control voltage of VCO this moment equals " error voltage " of phase-locked loop output, this voltage can make the VCO frequency that needs of output system exactly.
(2) light quality goes wrong in order to go in the business of circuit, optical receiver can not extract in stable " professional light clock recovered ", it is qualified that phase-locked loop still can provide " the transmission reference clock ", must saved system current business VCO control magnitude of voltage just often.Its concrete store method is:
A. just often, the digital interface of at first using FPGA to regulate the D/A device is adjusted to maximum 255 to digital control value from 1, and this moment, the output voltage of D/A and then changed from 0V to 3.3V in business." error voltage " value of the output voltage values of D/A in the change procedure and phase-locked loop output is put into comparison in the comparator together;
B. for comparator, positive pin connects " error voltage " of phase-locked loop output, and negative pin connects the D/A output voltage.If positive pin voltage is higher than negative pin voltage, then comparator output " 1 "; Otherwise, then comparator output " 0 ".Again since comparator without any feedback, the deviation that two input pin voltage is very little also can be exaggerated and a lot of doubly cause its output or be 0, or is 1, does not have intermediate state.Therefore when D/A bit by bit increases from small to large, comparator output jumps at 0 o'clock from 1, and the output voltage values of pairing D/A is exactly that we the business VCO just often that will write down controls magnitude of voltage.This saltus step of FPGA monitoring comparator output, and the digital control value of record D/A this moment.
(3) CPU records this D/A digital control value in the nonvolatile storage standby.
(4) the current incoming traffic light signal of system monitoring after, when causing " professional light clock recovered " unavailable when its quality goes wrong, " selector switch " signal that switches the alternative analog switch among Fig. 2 with FPGA is a low level, analog switch is selected the control voltage of the output voltage of D/A as VCO like this, controls VCO and produces " transmission reference clock "; Reference clock when this reference clock is normal with system works almost quality is the same, frequency deviation (says that here " almost " can be influenced by environment and device aging when controlling VCO because of fixed voltage less than 20ppm, impossible absolutely accurate, but its deviation can satisfy system requirements again).Though this moment " professional light clock recovered " is unstable even disappearance, still there is reliable quality " transmission reference clock " in system, guarantees that downstream node can detect the ais alarm index signal that system sends.
(5) after this, continue detection system incoming traffic light, as long as when quality problems appear in this incoming traffic light, just use that " selector switch " of alternative analog switch be low level in the FPGA control chart 2, the voltage that D/A exports is as the control voltage of VCO in the phase-locked loop.
(6) the D/A control numerical value with front CPU record drives the control voltage that D/A produces VCO.This voltage and professional normal VCO constantly control magnitude of voltage and equate, and be the same when therefore at this time the frequency of VCO output clock is with operate as normal, that is: it is effective to send reference clock, has guaranteed that the ais signal of transmission surpasses the frequency shift (FS) that requires.
When (7) continuing to monitor current incoming traffic optical signal quality and recover good for use, " selector switch " that reuse FPGA control alternative analog switch among Fig. 2 is high level, analog switch is selected " error voltage " of phase-locked loop output control voltage as VCO, system restoration normal operating conditions like this.
(8) after the next device power, with the VCO control voltage of measuring once more with quadrat method under the current normal operating conditions, if the error of magnitude of voltage of measuring and recording voltage value is in the 0.1v scope, amendment record magnitude of voltage not just is if surpass this scope with regard to the amendment record value.Here be to determine with 0.1v according to the index of VCO device, for the VCO of 200ppm/V, the corresponding frequency deviation 20ppm of 0.1v voltage error (this step is optional then use).
Should be understood that; the above-mentioned description at specific embodiment of the present invention is comparatively concrete; therefore can not think the restriction of scope of patent protection of the present invention; for a person skilled in the art; can make various possible changes or distortion by technical conceive according to the present invention, and all these changes or distortion all should belong to the protection range of claims of the present invention.
Claims (11)
1. reference clock transtation mission circuit that is used on the light repeat plate, comprise phase-locked loop, have low pass filter and voltage controlled oscillator in the phase-locked loop, professional light recovered clock signal is through described low pass filter, produce error voltage, the output of described voltage controlled oscillator sends reference clock under voltage control, it is characterized in that, described reference clock transtation mission circuit also comprises: aanalogvoltage generation circuit, comparator, either-or switch circuit, wherein:
The input signal of described comparator is the voltage that produces via the error voltage of described low pass filter generation and described aanalogvoltage generation circuit, described aanalogvoltage generation circuit is adjusted the voltage of generation according to the comparative result of described comparator, when the comparator output signal saltus step, the voltage of current generation is defined as normally controlling voltage, and stable output;
The input signal of described either-or switch circuit is error voltage and the definite normal control voltage of described aanalogvoltage generation circuit that produces via described low pass filter, select signal is that " professional light clock recovered " whether signal is judged in available monitoring, when this judgement signal is "Yes", this either-or switch circuit selects described error voltage to control described voltage controlled oscillator as output voltage, when this judgement signal was "No", this either-or switch circuit selected described normal control voltage to control described voltage controlled oscillator as output voltage.
2. circuit as claimed in claim 1 is characterized in that, further comprises:
The comparative result monitor is used to monitor the output signal of described comparator, when the output signal saltus step, stops the voltage adjustment of described aanalogvoltage generation circuit, and writes down the voltage of this current generation.
3. circuit as claimed in claim 2 is characterized in that, described comparative result monitor is programmable logic device.
4. circuit as claimed in claim 2 is characterized in that, further comprises:
Memory is used to store the voltage of the current generation of described aanalogvoltage generation circuit of described comparative result monitor record.
5. circuit as claimed in claim 1 is characterized in that, described aanalogvoltage generation circuit is the digital to analog converter by programmable logic device or CPU linear regulation.
6. circuit as claimed in claim 1 is characterized in that, further comprises: signal generating circuit is judged in monitoring, is used for basis to the monitoring that the professional light signal of importing carries out, and whether signal is judged in available monitoring to send " professional light clock recovered ".
7. reference clock sending method that is used on the light repeat plate, comprise phase-locked loop on the described light repeat plate, have low pass filter and voltage controlled oscillator in the phase-locked loop, professional light recovered clock signal is through described low pass filter, produce error voltage, the output of described voltage controlled oscillator sends reference clock under voltage control, it is characterized in that, comprises the steps:
Use an aanalogvoltage generation circuit to produce aanalogvoltage, and this voltage is sent into a comparator;
To send into described comparator via the error voltage that described low pass filter produces, the voltage that produces with described aanalogvoltage generation circuit compares;
According to the comparative result of described comparator, adjust the voltage that described aanalogvoltage generation circuit produces, when the comparator output signal saltus step, the voltage of current generation is defined as normally controlling voltage, and stable output;
The normal control voltage of described error voltage and the output of described aanalogvoltage generation circuit is sent into an either-or switch;
To the monitoring that the professional light signal of importing carries out, whether signal is judged in available monitoring to produce " professional light clock recovered ", and with the selection signal of this signal as described either-or switch circuit;
When this judgement signal is "Yes", this either-or switch selects described error voltage to control described voltage controlled oscillator as output voltage, when this judgement signal was "No", this either-or switch selected described normal control voltage to control described voltage controlled oscillator as output voltage.
8. method as claimed in claim 7 is characterized in that, described aanalogvoltage generation circuit is the digital to analog converter by programmable logic device or CPU linear regulation.
9. method as claimed in claim 7 is characterized in that, and is described when the comparator output signal saltus step, and the voltage of current generation is defined as normally controlling the step of voltage, comprising:
Monitor the output signal of described comparator, when this output signal saltus step, stop the voltage adjustment of described aanalogvoltage generation circuit, and the voltage that writes down this current generation is normal control voltage.
10. method as claimed in claim 7 is characterized in that, further comprises: through comparator relatively after, the normal control magnitude of voltage that described aanalogvoltage generation circuit is determined is stored in the memory.
11. method as claimed in claim 7 is characterized in that, described " professional light clock recovered " whether signal is judged in available monitoring, is that the signal that monitoring produced that signal generating circuit carries out according to the professional light signal to input is judged in a monitoring.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2005101350287A CN1988426B (en) | 2005-12-23 | 2005-12-23 | Reference clock sending circuit and method for light repeat plate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2005101350287A CN1988426B (en) | 2005-12-23 | 2005-12-23 | Reference clock sending circuit and method for light repeat plate |
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| Publication Number | Publication Date |
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| CN1988426A CN1988426A (en) | 2007-06-27 |
| CN1988426B true CN1988426B (en) | 2010-09-01 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2005101350287A Expired - Fee Related CN1988426B (en) | 2005-12-23 | 2005-12-23 | Reference clock sending circuit and method for light repeat plate |
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Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101645718B (en) * | 2008-08-07 | 2013-08-07 | 中兴通讯股份有限公司 | Method and device for holding clock |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1040119A (en) * | 1988-06-03 | 1990-02-28 | 莫托罗拉公司 | Have and swash the frequency synthesizer of compensation frequently |
| KR20010011314A (en) * | 1999-07-27 | 2001-02-15 | 김진찬 | an node synshronization unit of ADSL system |
| JP2002043929A (en) * | 2000-07-28 | 2002-02-08 | Nec Eng Ltd | Variable frequency divider circuit, and clock frequency division method using the circuit |
| CN1510860A (en) * | 2002-12-24 | 2004-07-07 | 深圳市中兴通讯股份有限公司 | Frequency locking testing circuit of lock phase ring |
| CN1638284A (en) * | 2003-12-25 | 2005-07-13 | 恩益禧电子股份有限公司 | VCO circuit, PLL circuit, and data recording apparatus |
| CN1705234A (en) * | 2004-05-26 | 2005-12-07 | 华为技术有限公司 | Clock synthesizing method and system |
-
2005
- 2005-12-23 CN CN2005101350287A patent/CN1988426B/en not_active Expired - Fee Related
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1040119A (en) * | 1988-06-03 | 1990-02-28 | 莫托罗拉公司 | Have and swash the frequency synthesizer of compensation frequently |
| KR20010011314A (en) * | 1999-07-27 | 2001-02-15 | 김진찬 | an node synshronization unit of ADSL system |
| JP2002043929A (en) * | 2000-07-28 | 2002-02-08 | Nec Eng Ltd | Variable frequency divider circuit, and clock frequency division method using the circuit |
| CN1510860A (en) * | 2002-12-24 | 2004-07-07 | 深圳市中兴通讯股份有限公司 | Frequency locking testing circuit of lock phase ring |
| CN1638284A (en) * | 2003-12-25 | 2005-07-13 | 恩益禧电子股份有限公司 | VCO circuit, PLL circuit, and data recording apparatus |
| CN1705234A (en) * | 2004-05-26 | 2005-12-07 | 华为技术有限公司 | Clock synthesizing method and system |
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| CN1988426A (en) | 2007-06-27 |
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