CN1986226A - Printing chip recognizing circuit - Google Patents
Printing chip recognizing circuit Download PDFInfo
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- CN1986226A CN1986226A CN 200510136141 CN200510136141A CN1986226A CN 1986226 A CN1986226 A CN 1986226A CN 200510136141 CN200510136141 CN 200510136141 CN 200510136141 A CN200510136141 A CN 200510136141A CN 1986226 A CN1986226 A CN 1986226A
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Abstract
The printing chip recognizing circuit for printing chip is connected to the printer circuit to receive the first clock signal, the second clock signal, the load signal and the voltage source the printer circuit transmits. It includes one counting circuit responding the first clock signal, the second clock signal and the load signal to output the first parallel control signals; one coding circuit receiving the control signals to output the second serial control signals; and one output circuit connected to the coding circuit and the printer circuit to respond the second serial control signals to output printing chip recognizing signals for the printer circuit to recognize the type of the printing chip.
Description
[technical field]
The present invention system refers to a kind of printing chip recognizing circuit with counting circuit and coding circuit especially about a kind of printing chip recognizing circuit.
[background technology]
Along with PC is popularized fast development with the internet, ink-jet printer has become product indispensable in the personal computer equipment at present in recent years.Concerning general user, the ink-jet printer of a basic model just is enough to deal with the demand of various file printouts.As everyone knows, the factor that influences the printing of inkjet printer quality has a lot, the composition of ink for example, ink supply mode of the selection of paper and ink cartridges or the like.Be to pursue more perfect print quality, relevant developer devoted considerable time and mental and physical efforts in ink cartridges storage China ink and supplying structure of ink design,, requirements such as cost of manufacture low, high storage black ability and high print quality simple in structure in the hope of meeting.
The inkjet technology development so far, control printing chip (printhead) disengages ink droplet to the mode of ink-jet medium can roughly be divided into two big main flows, one is hot bubble type (Thermal Bubble Ink Jet) technology, its operating principle system utilizes heating resistor (thin film resistor) heating to make the part ink produce bubble and then ink is squeezed, and a plurality of spray orifices that pass through that make are sprayed onto on the ink-jet medium.Another then is piezoelectric actuated formula (Piezo-electric) technology, and its principle is to utilize the piezoelectric property of piezoelectric, in the energising back ink is released nozzle.
Because the inkjet technology of each type all needs to cooperate the printing chip of unique ink gun, add various printing chips its special specification is all arranged, comprise: structure, the ink that uses, characteristics such as spray orifice number and ink-jet controlling circuit, therefore need the compatible print system of collocation, could correctly finish print job, generally speaking, the set ink cartridges of present printer is can exchange or can carry two kinds of ink cartridges simultaneously, for example the color inks casket can exchange with the black ink casket or can carry color inks casket and black ink casket simultaneously, because the specification of the ink gun that color inks casket and black ink casket are set is also inequality, therefore when the user is mounted to ink cartridges on the printer, the control circuit of printer must be able to be discerned the specification of the printing chip of ink cartridges, could use corresponding driving formula to drive, so need an identification circuit to discern printing chip, and identification circuit be can be used for the foundation of printer as printing chip as printer.
Therefore, how to develop a kind of printing chip recognizing circuit that improves above-mentioned known techniques disappearance, real in pressing for the problem of solution at present.
[summary of the invention]
Main purpose of the present invention is to provide a kind of printing chip recognizing circuit, export control signal in regular turn by counting circuit and coding circuit about the printing chip information, and see through output circuit and offer a plurality of identification signals that printer circuitry is represented this printing chip, make printer circuitry come the kind of identification printing chip by a plurality of identification signals, making between the printing chip of printer and ink gun has good collocation, and reaches the purpose of identification printing chip by this.
For reaching above-mentioned purpose, of the present invention one implements the sample attitude for a kind of printing chip recognizing circuit is provided than broad sense, it is to be applicable to an ink gun and to print machine circuit and be connected with one, in order to receive one first clock signal, a second clock signal, a load signal and the voltage source that this printer circuitry transmits, it is to comprise: a counting circuit, it is to receive this first clock signal, this second clock signal and this load signal, in response to the triggering of this first clock signal, this second clock signal and this load signal and a plurality of first control signals of line output; One coding circuit, it is to be connected with this counting circuit, exports second control signal in order to receive these a plurality of first control signals and tandem; And an output circuit, it is to be connected with this coding circuit and this printer circuitry, in order to export a plurality of identification signals of representing this printing chip in regular turn in response to this second control signal; Wherein, this printer circuit kind of coming this printing chip of identification by these a plurality of identification signals.
[description of drawings]
Fig. 1: it is the circuit box schematic diagram of the printing chip recognizing circuit of preferred embodiment of the present invention.
Fig. 2: it is the circuit structure diagram of first counter shown in Figure 1.
Fig. 3: it is the circuit structure diagram of second counter shown in Figure 1.
Fig. 4: it is the signal waveforms of Fig. 1 first clock signal, second clock signal and the load signal that operate.
[specific embodiment]
The embodiment that embodies feature of the present invention and advantage will be described in detail in the explanation of back segment.Be understood that the present invention can have various variations on different aspects, its neither departing from the scope of the present invention, and explanation wherein and to be shown in be when the usefulness that explain in essence, but not in order to restriction the present invention.
See also Fig. 1, it is the circuit box schematic diagram of the printing chip recognizing circuit of preferred embodiment of the present invention, as shown in Figure 1, the printing chip recognizing circuit 10 main systems of preferred embodiment of the present invention are arranged at an ink gun (not shown) inside and are connected with printer circuitry (not shown), and receive first clock signal (Clk1) that printer circuitry is imported via input 14, the second clock signal (Clk2) that input 15 is imported, the voltage source (Vdd) that load signal (Load) that input 16 is imported and power end 17 are imported, printing chip recognizing circuit 10 of the present invention is by counting circuit 11, coding circuit 12 and output circuit 13 constitute, represent a plurality of identification signals of printing chip to printer circuitry in order to tandem output in regular turn, the kind that makes printer circuitry come this printing chip of identification by these a plurality of identification signals, and then correctly control this printing chip running.
See also Fig. 2, it is the circuit structure diagram of first counter shown in Figure 1, as shown in the figure, first counter 111 is to comprise the input 14 that receives first clock signal (Clk1), receive the input 15 of second clock signal (Clk2), receive the input 16 of load signal (Load), the power end 17 of voltage source (Vdd) is provided, in order to the output (Out) 1111 of exporting first first control signal, earth terminal 1112, the first switching transistor A1, second switch transistor A2, the 3rd switching transistor A3, the 4th switching transistor A4, the 5th switching transistor A5, the 6th switching transistor A6, minion is closed transistor A7, octavo is closed transistor A8, the 9th switching transistor A9, the tenth switching transistor A10 and the 11 switching transistor A11.
The first switching transistor A1 has an one source pole (Source) and a drain electrode (Drain), and a grid (Gate) that receives the second clock signal; Second switch transistor A2 has a drain electrode that is connected with the source electrode of the first switching transistor A1, a grid that receives load signal and the one source pole that is connected with earth terminal 1112; The drain electrode that the 3rd switching transistor A3 has one source pole, is connected with the drain electrode of the first switching transistor A1, and a grid that receives load signal; The drain electrode that the 4th switching transistor A4 has one source pole, is connected with the source electrode of the 3rd switching transistor A3, and a grid that receives first clock signal; The grid that the 5th switching transistor A5 has the drain electrode that is connected with the drain electrode of the source electrode of the 3rd switching transistor A3 and the 4th switching transistor A4, is connected with the drain electrode of the source electrode of the first switching transistor A1 and second switch transistor A2, and the one source pole that is connected with earth terminal 1112; The drain electrode that the 6th switching transistor A6 has one source pole, is connected with power end 17, and a grid that receives the second clock signal; Minion is closed transistor A7 and is had a drain electrode that is connected with the source electrode of the 6th switching transistor A6, a grid that is connected with the source electrode of the 4th switching transistor A4, and the one source pole that is connected with earth terminal 1112; Octavo is closed the drain electrode that transistor A8 has one source pole, is connected with drain electrode that source electrode and the minion of the 6th switching transistor A6 are closed transistor A7, and a grid of reception second clock signal; The 9th switching transistor A9 has the one source pole that is connected with the source electrode of octavo pass transistor A8, a grid that receives load signal, and a drain electrode that is connected with power end 17; The drain electrode that the tenth switching transistor A10 has one source pole, is connected with power end 17, and a grid that receives the second clock signal; The 11 switching transistor A11 has a drain electrode that is connected with source electrode and the output 1111 of the tenth switching transistor A10, a grid that is connected with the source electrode of the 9th switching transistor A9, and the one source pole that is connected with earth terminal 1112.
Please consult Fig. 1 again, second counter 112 is except receiving first clock signal (Clk1), outside second clock signal (Clk2) and the load signal (Load), more receive the control signal that the previous stage counter is exported, and in response to this first clock signal (Clk1), the triggering of first control signal of second clock signal (Clk2) and load signal (Load) and previous stage counter output and and 3 first of line outputs control signal to coding circuit 12, i.e. the 2nd～4 bit switching signal, for example, first second counter 112 will receive first clock signal (Clk1), second clock signal (Clk2), first control signal that the load signal (Load) and first counter 111 are exported, second first control signal of output after the internal circuit running, i.e. the 2nd bit switching signal, input (In) 1121 to coding circuit 12 and connected next stage second counter 112, as for the function mode of the second follow-up counter 112 by that analogy, repeat no more in this.
See also Fig. 3, it is the circuit structure diagram of second counter shown in Figure 1, as shown in the figure, each second counter 112 shown in Figure 1 is to comprise the input 14 that receives first clock signal (Clk1), receive the input 15 of second clock signal (Clk2), receive the input 16 of load signal (Load), the power end 17 of voltage source (Vdd) is provided, in order to receive the input (In) 1121 of first control signal that the previous stage counter exported, in order to the output (Out) 1122 of exporting first control signal, earth terminal 1123, twelvemo is closed transistor A12, the 13 switching transistor A13, the 14 switching transistor A14, the 15 switching transistor A15, sixteenmo closes transistor A16, the tenth minion closes transistor A17 and eighteenmo closes transistor A18.
Twelvemo is closed the drain electrode that transistor A12 has one source pole, receives first control signal that the previous stage counter exported, and a grid that receives first clock signal; The 13 switching transistor A13 has one source pole, a drain electrode that is connected with power end 17 and a grid that receives the second clock signal; The 14 switching transistor A14 has a drain electrode that is connected with the source electrode of the 13 switching transistor A13, a grid that is connected with the source electrode of twelvemo pass transistor A12, and the one source pole that is connected with earth terminal 1123; The drain electrode that the 15 switching transistor A15 has one source pole, is connected with the drain electrode of the source electrode of the 13 switching transistor A13 and the 14 switching transistor A14, and a grid that receives the second clock signal; Sixteenmo closes transistor A16 and has the one source pole that is connected with the source electrode of the 15 switching transistor A15, a grid that receives load signal, and a drain electrode that is connected with power end 17; The tenth minion is closed transistor A17 and is had one source pole, receives a grid of second clock signal, and a drain electrode that is connected with power end 17; Eighteenmo closes transistor A18 and has a drain electrode that is connected with source electrode and the output 1122 of the tenth minion pass transistor A17, a grid that is connected with the source electrode of sixteenmo pass transistor A16, and the one source pole that is connected with earth terminal 1123.
Please consult Fig. 1 again, coding circuit 12 is to be connected with counting circuit 11 and output circuit 13 circuit, and constituted by 4 switching transistor M3～M6, each switching transistor M3～M6 is connected with the output of its corresponding counter respectively, in order to receive first control signal and in regular turn tandem export second control signal, wherein, the grid of switching transistor M3～M6 is connected to the output of corresponding counter respectively, drain electrode is then set according to coding and is connected to power end 17 or earth terminal, to receive the signal of voltage source (Vdd) or earth terminal, source electrode then is connected to output circuit 13.
Wherein, the drain electrode system of second switch transistor M2 is connected with the source electrode of the switching transistor M3～M6 of coding circuit 12, grid then is connected with input 16, in order to receive load signal, source electrode then is connected with earth terminal, and the effect of second switch transistor M2 is when the load signal of input 16 inputs is high voltage signal, second switch transistor M2 will move, in order to the signal on the output sequence node (Out-list node) is reset (reset); The grid system of the first switching transistor M1 is connected with the source electrode of the switching transistor M3～M6 of coding circuit 12, drain electrode then is connected with output 18, and source electrode is connected with earth terminal equally, wherein output 18 is to be connected with printer circuitry, represents a plurality of identification signals of printing chip to printer circuitry in order to output.
See also Fig. 2 and please cooperate Fig. 1 and Fig. 4, wherein Fig. 4 is the signal waveforms of first clock signal, second clock signal and load signal, and the flowing mode of doing of first counter 111 shown in Figure 2 below will be described: (1) load signal input high voltage (high) signal:
1. the load signal that receives when input 16 is a high voltage signal, and when the second clock signal that input 15 receives is low voltage signal, the 3rd switching transistor A3 is with conducting, voltage source (Vdd) signal that power end 17 is provided imports the end that the 4th switching transistor A4 and the 5th switching transistor A5 join into, and because of load signal is a high voltage signal, so second switch transistor A2 then moves, and then the gate terminal of the 5th switching transistor A5 is done the action of replacement;
As for, aspect the output 1111 of first counter 111, the 9th switching transistor A9 will move, make the gate terminal of voltage source (Vdd) signal of power end 17 through the 9th switching transistor A9 to the 11 switching transistor A11, to make the 11 switching transistor A11 action, and then make output 1111 do the action of replacement;
2. then when first clock signal is high voltage signal, the 4th switching transistor A4 is with conducting, so that closing the gate terminal of transistor A7, minion receives high voltage signal, thus, minion is closed transistor A7 and will move, makes the low voltage signal of earth terminal 1112 be sent to the end that octavo pass transistor A8 and the 6th switching transistor A6 join;
3. then when the second clock signal is high voltage signal, the 6th switching transistor A6, octavo pass transistor A8 and the tenth switching transistor A10 are with conducting, but the gate terminal of closing transistor A7 because of minion is a high voltage, so minion is closed transistor A7 and will be moved, so end that octavo pass transistor A8 and the 6th switching transistor A6 join and the gate terminal of the 11 switching transistor A11 are all low-voltage, the 11 switching transistor A11 will be failure to actuate, so high voltage signal will be via the tenth switching transistor A10 to output 1111, i.e. first counter, 111 output HIGH voltage signals.At this moment, the first switching transistor A1 also moves, high voltage signal with power end 17, be voltage source (Vdd), pass to the gate terminal of the 5th switching transistor A5, make the 5th switching transistor A5 action, the end that the 4th switching transistor A4 like this and the 5th switching transistor A5 join will produce the action of replacement, promptly the end that joins of the 4th switching transistor A4 and the 5th switching transistor A5 is imported low voltage signal;
(2) load signal input low voltage signal:
1. the load signal that receives when input 16 is a low voltage signal, and when the second clock signal that input 15 receives is high voltage signal, the 3rd not conducting of switching transistor A3, voltage source (Vdd) signal that power end 17 is transmitted can't import the end that the 4th switching transistor A4 and the 5th switching transistor A5 join into, but because of first switching transistor A1 action, so the 5th switching transistor A5 is with conducting, make the low voltage signal of earth terminal 1112 pass to the end that the 4th switching transistor A4 and the 5th switching transistor A5 join, the end input low voltage signal that promptly the 4th switching transistor A4 and the 5th switching transistor A5 join in first counter 111;
2. then when first clock signal is high voltage signal, the 4th switching transistor A4 conducting, the gate terminal that minion is closed transistor A7 receives low voltage signal, minion like this pass transistor A7 is failure to actuate, and the low voltage signal of earth terminal 1112 and the end that octavo pass transistor A8 and the 6th switching transistor A6 join are isolated;
3. then when the second clock signal is high voltage signal, the 6th switching transistor A6, octavo are closed transistor A8, the tenth switching transistor A10 action, and closing transistor A7 because of minion is failure to actuate, so the voltage source of power end 17 (Vdd) signal will close the gate terminal of transistor A8 to the 11 switching transistor A11 via the 6th switching transistor A6, octavo, make the 11 switching transistor A11 action, so output 1111 will receive low voltage signal, and promptly first counter 111 is output as low voltage signal.At this moment, the first switching transistor A1 also moves, voltage source (Vdd) signal of power end 17 is passed to the gate terminal of the 5th switching transistor A5, make the 5th switching transistor A5 action, end that the 4th switching transistor A4 like this and the 5th switching transistor A5 join produces the action of resetting, and makes that the 4th switching transistor A4 imports low voltage signal with the end that the 5th switching transistor A5 joins in first counter 111.
See also Fig. 3 and please cooperate Fig. 1, Fig. 2 and Fig. 4, the flowing mode of doing of second counter 112 shown in Figure 3 below will be described:
When the load signal of input 16 inputs is high voltage signal, the output of first counter 111 and second counter 112 all produces low voltage signal and reaches the input of next second counter 112, and when follow-up second clock signal is high voltage, the input 1121 of each second counter 112 will receive the output signal that output transmitted of its previous stage counter.
(1) when input 1121 input high voltage signals:
1. when input 1121 input high voltage signals, and when first clock signal is high voltage signal, then twelvemo is closed transistor A12 conducting, reach the gate terminal of the 14 switching transistor A14 with the high voltage signal that input 1121 is imported, make the 14 switching transistor A14 action, and the low voltage signal of earth terminal 1123 will pass to the end that the 15 switching transistor A15 and the 13 switching transistor A13 join;
2. then when the second clock signal is high voltage signal, the 13 switching transistor A13, the 15 switching transistor A15 and the tenth minion are closed transistor A17 and will be moved, but because of the 14 switching transistor A14 action, then the signal of earth terminal 1123 will pass to the gate terminal that a end that the 15 switching transistor A15 and the 13 switching transistor A13 join and eighteenmo close transistor A18, so eighteenmo closes transistor A18 and can't move, so voltage source (Vdd) signal of power end 17 will close transistor A17 through the tenth minion and pass to output 1122, and promptly second counter 112 is output as high voltage signal.
(2) when input 1121 input low voltage signals:
1. when first clock signal input high voltage signal, then twelvemo is closed transistor A12 conducting, reach the gate terminal of the 14 switching transistor A14 with the low voltage signal that input 1121 is imported, the 14 switching transistor A14 can't be moved, and then the low voltage signal of earth terminal 1123 is isolated with the end that the 15 switching transistor A15 and the 13 switching transistor A13 join;
2. then when second clock signal input high voltage signal, the gate terminal of cause the 14 switching transistor A14 is a low-voltage, and the 13 switching transistor A13, the 15 switching transistor A15 and the tenth minion are closed transistor A17 and will be moved, thus, the voltage source of power end 17 (Vdd) signal will close the gate terminal of transistor A18 through the 13 switching transistor A13 and the 15 switching transistor A15 to eighteenmo, so eighteenmo closes transistor A18 and will move, so that closing transistor A18 through eighteenmo, the low voltage signal of earth terminal 1123 passes to output 1122, i.e. second counter, 112 output LOW voltage signals;
In addition, the design function that sixteenmo closes transistor A16 is, when the load signal of input 16 inputs is high voltage signal, the voltage source of power end 17 (Vdd) signal will close transistor A16 closes transistor A18 to eighteenmo gate terminal through sixteenmo, then eighteenmo closes transistor A18 action, and output 1122 is reset.
Please consult Fig. 1 again and please cooperate the action specification of above-mentioned Fig. 2 and Fig. 3, its manner of execution of Fig. 1 is: via the computing of first counter 111, output 1111 will be exported first first control signal, the i.e. first bit switching signal, second counter 112 to next stage, and first control signal is also delivered to the gate terminal of the switching transistor M3 of coding circuit 12, if first control signal of the output of first counter 111 1111 outputs is a high voltage signal, and all the other first control signals are low voltage signal, then the switching transistor M3 of coding circuit 12 will move, but switching transistor M4～M6 is failure to actuate, so drain electrode end signal with transistor M3, voltage source (Vdd) signal that is provided for power end 17 reaches the gate terminal of the first switching transistor M1 of output circuit 13 through switching transistor M3 in this embodiment, make first switching transistor M1 action, so the signal of the output 18 of printing chip recognizing circuit 10 of the present invention will link to each other with earth terminal;
Anti-, if first first control signal of the output of first counter 111 1111 outputs is a low voltage signal, and all the other first control signals also are low voltage signal, then the switching transistor M3 of coding circuit 12 can't move, and switching transistor M4～M6 also is failure to actuate, so drain electrode end signal of transistor M3, be power end 17 in this embodiment, the voltage source signal that is provided for the drain electrode end signal of transistor M4～M6 can't reach the gate terminal of the first switching transistor M1 of output circuit 13, the first switching transistor M1 can't be moved, thus, the output signal of the output 18 of printing chip recognizing circuit 10 is with unaffected.Cooperate as flowing mode to be same as described above, to repeat no more as for, the first switching transistor M1 of other 3 second counters 112 and switching transistor M4, M5 and M6 and output circuit 13 in this.
So in the embodiment of the invention, the signal that the output sequence node of output circuit 13 inside of printing chip recognizing circuit 10 shown in Figure 1 receives in regular turn is high, high, low, high, relative will be changed to low via first switching transistor M1 processing back output signal, low, high, low, be that to represent the identification signal of printing chip be low in output 18 tandem output in regular turn, low, high, low, after printer circuitry receives this identification signal, whether then can differentiate printing chip can be used on this printer, making between the printing chip of printer and ink gun has good collocation, and reaches the purpose of identification printing chip by this.
In sum, printing chip recognizing circuit of the present invention is to export control signal about the printing chip information in regular turn with counting circuit and coding circuit, and see through output circuit and offer a plurality of identification signals that printer circuitry is represented this printing chip, make printer circuitry come the kind of identification printing chip by a plurality of identification signals, making between the printing chip of printer and ink gun has good collocation, and reaches the purpose of identification printing chip by this.Printing chip recognizing circuit of the present invention has the value of industry, files an application in the whence in accordance with the law.
The present invention must be thought and is to modify right neither taking off as Protector that attached claim is desired as all by the personage Ren Shi craftsman who knows this technology.
Claims (19)
1. printing chip recognizing circuit is applicable to that one prints chip and prints machine circuit and be connected with one, and in order to receive one first clock signal, a second clock signal, a load signal and the voltage source that this printer circuitry transmits, it is to comprise:
One counting circuit, it is to receive this first clock signal, this second clock signal and this load signal, in response to the triggering of this first clock signal, this second clock signal and this load signal and a plurality of first control signals of line output;
One coding circuit, it is to be connected with this counting circuit, exports one second control signal in order to receive these a plurality of first control signals and tandem; And
One output circuit, it is to be connected with this coding circuit and this printer circuitry, in order to export a plurality of identification signals of representing this printing chip in regular turn in response to this second control signal;
Wherein, this printer circuit kind of coming this printing chip of identification by these a plurality of identification signals.
2. according to the described printing chip recognizing circuit of claim 1, it is characterized in that, this counting circuit system comprises one first counter and at least one second counter, this first counter system receives this first clock signal, this second clock signal and this load signal, exports this first first control signal in response to the triggering of this first clock signal, this second clock signal and this load signal.
3. according to the described printing chip recognizing circuit of claim 2, it is characterized in that, this at least one second counter, it is to receive this first control signal, this first clock signal, this second clock signal and this load signal that this previous stage counter is exported, the triggering of first control signal of exporting in response to this first clock signal, this second clock signal, this load signal and this previous stage counter and and other first control signal of line output.
4. according to the described printing chip recognizing circuit of claim 1, it is characterized in that this coding circuit system comprises a plurality of switching transistors, export this second control signal in order to receive these a plurality of first control signals and tandem.
5. according to the described printing chip recognizing circuit of claim 1, it is characterized in that, this output circuit system comprises one first switching transistor and a second switch output transistor, in order to export a plurality of identification signals of representing this printing chip in regular turn in response to this second control signal.
6. according to the described printing chip recognizing circuit of claim 5, it is characterized in that, this second switch transistor cording have be connected with this coding circuit one the drain electrode, in order to a grid that receives this load signal and the one source pole that is connected with an earth terminal.
7. according to the described printing chip recognizing circuit of claim 6, it is characterized in that, this first switching transistor cording has a grid that is connected with this coding circuit, a drain electrode that is connected with an output and the one source pole that is connected with this earth terminal, and wherein this output system is connected with this printer circuitry.
8. printing chip recognizing circuit, it is to be applicable to that one prints chip and prints machine circuit and be connected with one, in order to receive one first clock signal, a second clock signal, a load signal and the voltage source that this printer circuitry transmits, it is to comprise:
One first counter, it is to receive this first clock signal, this second clock signal and this load signal, exports one first control signal in response to the triggering of this first clock signal, this second clock signal and this load signal;
At least one second counter, it is to receive first control signal, this first clock signal, this second clock signal and this load signal that this previous stage counter is exported, the triggering of first control signal of exporting in response to this first clock signal, this second clock signal, this load signal and this previous stage counter and at least one first control signal of parallel in addition output;
One coding circuit, it is to be connected with this first counter and this at least one second counter, exports one second control signal in order to receive these a plurality of first control signals and tandem; And
One output circuit, it is to be connected with this coding circuit and this printer circuitry, in order to export a plurality of identification signals of representing this printing chip in regular turn in response to this second control signal;
Wherein, this printer circuit kind of coming this printing chip of identification by these a plurality of identification signals.
9. described printing chip recognizing circuit according to Claim 8 is characterized in that, this coding circuit system comprises a plurality of switching transistors, exports this second control signal in order to receive these a plurality of first control signals and tandem.
10. described printing chip recognizing circuit according to Claim 8, it is characterized in that, this output circuit system comprises one first switching transistor and a second switch transistor, in order to export a plurality of identification signals of representing this printing chip in regular turn in response to this second control signal.
11. the described printing chip recognizing circuit according to claim 10 is characterized in that, this second switch transistor cording have be connected with this coding circuit one the drain electrode, in order to a grid that receives this load signal and the one source pole that is connected with an earth terminal.
12. described printing chip recognizing circuit according to claim 11, it is characterized in that, this first switching transistor cording has a grid that is connected with this coding circuit, a drain electrode that is connected with an output and the one source pole that is connected with this earth terminal, and wherein this output system is connected with this printer circuitry.
13. described printing chip recognizing circuit according to Claim 8 is characterized in that, this first counter system comprises:
A plurality of inputs are in order to receive this first clock signal, this second clock signal and this load signal;
One power end is in order to receive this voltage source;
One output is in order to export this first first control signal;
One earth terminal;
One first switching transistor has an one source pole and a drain electrode, and a grid that receives this second clock signal;
One second switch transistor has the drain electrode that is connected with this source electrode of this first switching transistor, receives a grid of this load signal and the one source pole that is connected with this earth terminal;
One the 3rd switching transistor, a drain electrode that have one source pole, is connected, and a grid that receives this load signal with this drain electrode of this first switching transistor;
One the 4th switching transistor, a drain electrode that have one source pole, is connected, and a grid that receives this first clock signal with this source electrode of the 3rd switching transistor;
One the 5th switching transistor, have a drain electrode that is connected with this drain electrode of this source electrode of the 3rd switching transistor and the 4th switching transistor, a grid that is connected with this source electrode and transistorized this drain electrode of this second switch of this first switching transistor, and the one source pole that is connected with this earth terminal;
One the 6th switching transistor, a drain electrode that have one source pole, is connected, and a grid that receives this second clock signal with this power end;
One minion is closed transistor, has a drain electrode that is connected with this source electrode of the 6th switching transistor, a grid that is connected with this source electrode of the 4th switching transistor, and the one source pole that is connected with this earth terminal;
One octavo is closed transistor, and have one source pole, close the drain electrode that transistorized this drain electrode is connected with this source electrode and this minion of the 6th switching transistor, and a grid that receives this second clock signal;
One the 9th switching transistor has the one source pole that is connected with this transistorized this source electrode in octavo pass, a grid that receives this load signal, and a drain electrode that is connected with this power end;
The tenth switching transistor, a drain electrode that have one source pole, is connected, and a grid that receives this second clock signal with this power end;
The 11 switching transistor has a drain electrode that is connected with this source electrode and this output of the tenth switching transistor, a grid that is connected with this source electrode of the 9th switching transistor, and the one source pole that is connected with this earth terminal.
14. described printing chip recognizing circuit according to Claim 8 is characterized in that, this at least one second counter is to comprise:
A plurality of inputs are in order to receive this first control signal that this first clock signal, this second clock signal, this load signal and this previous stage counter are exported;
One power end is in order to receive this voltage source
One output is in order to this at least one first control signal of output;
One earth terminal;
One twelvemo is closed transistor, and have one source pole, receive a drain electrode of this first control signal that this previous stage counter exported, and a grid that receives this first clock signal;
The 13 switching transistor has one source pole, a drain electrode that is connected with this power end, receives a grid of this second clock signal;
The 14 switching transistor has a drain electrode that is connected with this source electrode of the 13 switching transistor, a grid that is connected with this transistorized this source electrode in twelvemo pass, and the one source pole that is connected with this earth terminal;
The 15 switching transistor, a drain electrode that have one source pole, is connected, and a grid that receives this second clock signal with this drain electrode of this source electrode of the 13 switching transistor and the 14 switching transistor;
One sixteenmo closes transistor, has the one source pole that is connected with this source electrode of the 15 switching transistor, a grid that receives this load signal, and a drain electrode that is connected with this power end;
The tenth minion is closed transistor, and have one source pole, receive a grid of this second clock signal, and a drain electrode that is connected with this power end;
One eighteenmo closes transistor, has a drain electrode that is connected with the tenth minion transistorized this source electrode in pass and this output, a grid that is connected with this transistorized this source electrode in sixteenmo pass, and the one source pole that is connected with this earth terminal.
15. a printing chip recognizing circuit, it is to be applicable to that one prints chip and prints machine circuit and be connected with one, and in order to receive one first clock signal, a second clock signal, a load signal and the voltage source that this printer circuitry transmits, it is to comprise:
One first counter, it is to receive this first clock signal, this second clock signal and this load signal, export first first control signal in response to the triggering of this first clock signal, this second clock signal and this load signal, this first counter system comprises:
A plurality of inputs are in order to receive this first clock signal, this second clock signal and this load signal;
One power end is in order to receive this voltage source
One output is in order to export this first first control signal;
One earth terminal;
One first switching transistor has an one source pole and a drain electrode, and a grid that receives this second clock signal;
One second switch transistor has the drain electrode that is connected with this source electrode of this first switching transistor, receives a grid of this load signal and the one source pole that is connected with this earth terminal;
One the 3rd switching transistor, a drain electrode that have one source pole, is connected, and a grid that receives this load signal with this drain electrode of this first switching transistor;
One the 4th switching transistor, a drain electrode that have one source pole, is connected, and a grid that receives this first clock signal with this source electrode of the 3rd switching transistor;
One the 5th switching transistor, have a drain electrode that is connected with this drain electrode of this source electrode of the 3rd switching transistor and the 4th switching transistor, a grid that is connected with this source electrode and transistorized this drain electrode of this second switch of this first switching transistor, and the one source pole that is connected with this earth terminal;
One the 6th switching transistor, a drain electrode that have one source pole, is connected, and a grid that receives this second clock signal with this power end;
One minion is closed transistor, has a drain electrode that is connected with this source electrode of the 6th switching transistor, a grid that is connected with this source electrode of the 4th switching transistor, and the one source pole that is connected with this earth terminal;
One octavo is closed transistor, and have one source pole, close the drain electrode that transistorized this drain electrode is connected with this source electrode and this minion of the 6th switching transistor, and a grid that receives this second clock signal;
One the 9th switching transistor has the one source pole that is connected with this transistorized this source electrode in octavo pass, a grid that receives this load signal, and a drain electrode that is connected with this power end;
The tenth switching transistor, a drain electrode that have one source pole, is connected, and a grid that receives this second clock signal with this power end;
The 11 switching transistor has a drain electrode that is connected with this source electrode and this output of the tenth switching transistor, a grid that is connected with this source electrode of the 9th switching transistor, and the one source pole that is connected with this earth terminal;
At least one second counter, it is first control signal, this first clock signal, this second clock signal and this load signal that receives this previous stage counter output, at least one first control signal of parallel in addition output in response to the triggering of first control signal of this first clock signal, this second clock signal, this load signal and the output of this previous stage counter, this at least one second counter system comprises:
A plurality of inputs are in order to receive this first control signal that this first clock signal, this second clock signal, this load signal and this previous stage counter are exported;
One power end is in order to receive this voltage source
One output is in order to this at least one first control signal of output;
One earth terminal;
One twelvemo is closed transistor, and have one source pole, receive a drain electrode of this first control signal that this previous stage counter exported, and a grid that receives this first clock signal;
The 13 switching transistor has one source pole, a drain electrode that is connected with this power end, receives a grid of this second clock signal;
The 14 switching transistor has a drain electrode that is connected with this source electrode of the 13 switching transistor, a grid that is connected with this transistorized this source electrode in twelvemo pass, and the one source pole that is connected with this earth terminal;
The 15 switching transistor, a drain electrode that have one source pole, is connected, and a grid that receives this second clock signal with this drain electrode of this source electrode of the 13 switching transistor and the 14 switching transistor;
One sixteenmo closes transistor, has the one source pole that is connected with this source electrode of the 15 switching transistor, a grid that receives this load signal, and a drain electrode that is connected with this power end;
The tenth minion is closed transistor, and have one source pole, receive a grid of this second clock signal, and a drain electrode that is connected with this power end;
One eighteenmo closes transistor, has a drain electrode that is connected with the tenth minion transistorized this source electrode in pass and this output, a grid that is connected with this transistorized this source electrode in sixteenmo pass, and the one source pole that is connected with this earth terminal;
One coding circuit, it is to be connected with this first counter and this at least one second counter, exports a plurality of second control signals in order to receive this first control signal and tandem; And
One output circuit, it is to be connected with this coding circuit and this printer circuitry, in order to export a plurality of identification signals of representing this printing chip in regular turn in response to this second control signal;
Wherein, this printer circuit kind of coming this printing chip of identification by these a plurality of identification signals.
16. the described printing chip recognizing circuit according to claim 15 is characterized in that, this coding circuit system comprises a plurality of switching transistors, exports this second control signal in order to receive these a plurality of first control signals and tandem.
17. described printing chip recognizing circuit according to claim 15, it is characterized in that, this output circuit system comprises one first switching transistor and a second switch transistor, in order to export a plurality of identification signals of representing this printing chip in regular turn in response to this second control signal.
18. the described printing chip recognizing circuit according to claim 17 is characterized in that, this second switch transistor cording have be connected with this coding circuit one the drain electrode, in order to a grid that receives this load signal and the one source pole that is connected with an earth terminal.
19. described printing chip recognizing circuit according to claim 18, it is characterized in that, this first switching transistor cording has a grid that is connected with this coding circuit, a drain electrode that is connected with an output and the one source pole that is connected with this earth terminal, and wherein this output system is connected with this printer circuitry.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200510136141 CN1986226A (en) | 2005-12-19 | 2005-12-19 | Printing chip recognizing circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200510136141 CN1986226A (en) | 2005-12-19 | 2005-12-19 | Printing chip recognizing circuit |
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| Publication Number | Publication Date |
|---|---|
| CN1986226A true CN1986226A (en) | 2007-06-27 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 200510136141 Pending CN1986226A (en) | 2005-12-19 | 2005-12-19 | Printing chip recognizing circuit |
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| Country | Link |
|---|---|
| CN (1) | CN1986226A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101118592B (en) * | 2007-08-22 | 2011-07-20 | 大连理工大学 | Printers evidence obtaining method based on character printing feature |
-
2005
- 2005-12-19 CN CN 200510136141 patent/CN1986226A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101118592B (en) * | 2007-08-22 | 2011-07-20 | 大连理工大学 | Printers evidence obtaining method based on character printing feature |
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