CN1975688B - For measuring the method for transmission delay and shake - Google Patents
For measuring the method for transmission delay and shake Download PDFInfo
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- CN1975688B CN1975688B CN200610163172.6A CN200610163172A CN1975688B CN 1975688 B CN1975688 B CN 1975688B CN 200610163172 A CN200610163172 A CN 200610163172A CN 1975688 B CN1975688 B CN 1975688B
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Abstract
A kind of real-time oscilloscope utilizes cross-correlation to obtain waveform from the test point of two system in testing to the method measuring transmission delay and shake.Two waveforms run clock recovery to obtain respective speed and side-play amount.Calculate the time deviation between two waveforms.Filtering from the shake of two test points, and removes average cross-correlation coefficient according to the Jitter Calculation of filtering.Utilize interpolation to calculate fractional delay based on LMS error, and respective calculating component is summed with the transmission delay calculated between two test points.Transmission delay can be used for adjusting clock edge by the clock edge of a waveform and the date conversion edge of another waveform being compared, to measure shake.
Description
Technical field
The present invention relates to Timing measurement, and the transmission delay related more particularly in clock drive system and jitter measurement.
Background technology
In clock drive system, reference clock is through different propagated, and the layout in these paths introduces the difference delay of reference clock.Along some circuit in these paths, such as clock and data recovery (CDR) circuit introduces additional delay.High-speed chip group for sending data with many gigabits per second presents many signal integrity challenges.Although high speed backplane looks just as P.e.c. (PC) plate, in fact as communication system can be seen.The reference clock propagating into base plate different piece experienced by different transmission delays.System needs to consider this transmission delay to make system performance meet the demands, such as to the restriction of shake.
For high-speed serial data standard, such as Peripheral component interface (PCI) Express and full buffer two-wire memory modules (FB-DIMM) standard, Physical layer as described in Figure 1.Reference or system clock drive them by driving the phaselocked loop (PLL) in transmitter (TX) and receiver (RX).PLL has the transmission delay seeing shake propagation delay as.Usually, PLL characteristic has the shake propagation delay become with frequency.In operating frequency range, group delay is used to represent propagation delay.The transmission delay of PLL is measured by spectrum analysis.The transmission line comprising microstrip and microstrip line also has use time-domain transmission (TDT) or the transmission delay measured by vector network analyzer (VNA).For the system shown in Fig. 1, if provided the transmission delay of each parts by parts producer, so pass through each parts, the transmission delay summation of such as PLL and transmission line obtains whole transmission delay.But even if not impossible, it is also very difficult for using current available technology (spectrum analysis, TDT, VNA) directly to measure transmission delay.
What wanted is a kind of for measuring direct method high-speed printed circuit board transmitting delay and jitter.
Summary of the invention
Thus, the invention provides a kind of real-time oscilloscope utilizes cross-correlation to measure the method for transmission delay and shake.Waveform is obtained in testing from the test point of two system.Two waveforms run clock recovery to obtain respective speed and side-play amount.The time deviation between two waveforms is calculated according to respective side-play amount.Filtering from the shake of two test points, and removes average (mean-removed) cross-correlation coefficient according to the Jitter Calculation of filtering.Utilize interpolation to calculate fractional delay based on LMS error, and respective calculating component is summed with the transmission delay calculated between two test points.Transmission delay can be then used in and compare provide " Utopian " reference clock by a signal and another signal being carried out edge, to determine shake.
When reading detailed description subsequently in conjunction with claims and accompanying drawing, therefrom can know and learning object of the present invention, advantage and other novel feature.
Accompanying drawing explanation
Fig. 1 is the block scheme of the typical physical layer of high speed transmission system, indicates the test point according to transmission delay of the present invention and jitter measurement.
Fig. 2 is the process flow diagram according to transmission delay measurement process of the present invention.
Fig. 3 is from the clock of PCI-Express system corresponding with Fig. 1 and the curve map of data waveform.
Fig. 4 be according to the shake of filtering of the present invention between the curve map of cross-correlation.
Fig. 5 is according to the curve map of the present invention by interpolation computing relay.
Embodiment
Refer again to Fig. 1, reference or system clock 12 are linked to transmitter 14 and receiver 16 by respective transmission line " passage T " 18 and " passage R " 20.PLL22 inside transmitter 14 is multiplied with the data transfer rate for driving data bit sequence with reference to clock.Data from transmitter 14 propagate into receiver 16 by transmission line " data channel " 24.Path from " tp.1 " to " tp.4 " comprises two passages 18,24 and PLL22.These three parts all have low-frequency filter characteristics.Therefore, " tp.1 " and the low-frequency jitter measured at " tp.4 " interrelated.When two signals are interrelated, the delay between these two signals is the value obtaining cross-correlation coefficient between two signal peaks.When cross-correlation coefficient reaches peak value, length of delay is optimum for lowest mean square (LMS) error.Transmission delay Td_1.4 is measured by the cross-correlation coefficient calculated between 2 place's low-frequency jitter components between " tp.1 " and " tp.4 ".This cross-correlation method only provides the solution for a unit interval (UI).More accurate solution obtains by interpolation, to realize the optimal value for LMS error.
The process of measurement transmission delay shown in Figure 2 and shake.
● step 1: use suitable instrument, such as real-time oscilloscope obtains waveform at two test point places.Channel oscilloscope needs to be deskew, and comprises them when using probe in the mode of deskew.
● step 2: at a waveform, namely " tp.1 " upper constant clock that runs recovers (CCR), to obtain clock frequency and side-play amount, T_CCR_Offset_tp.1.Then clock frequency is multiplied by obtain data transfer rate.Such as, the multiplication factor of PCI-Express standard can be 25.
● step 3: utilize data transfer rate at another waveform, i.e. the data waveform of " tp.4 " runs CCR, to obtain side-play amount T_CCR_Offset_tp.4.This algorithm guarantees that step 2 is accurately identical with the data transfer rate in 3---the bit rate (being converted to data transfer rate by being multiplied by mutually as required) found in step 2 is for the bit rate of data in step 3.
● step 4: according to the time deviation between two waveshape recovered clock
T_CCR_Offset=T_CCR_Offset_tp.4-T_CCR_Offset_tp.1
Represent with UI.
● step 5: filtering is from the shake of two test points.Be multiplied by clock frequency on demand and shake by the interpolative data that needs of filtering.Filtering in any form, can depend on what shake content is total between the signal at two some places.In this example embodiment, low-frequency jitter is total between two points, therefore uses low-pass filter.For PCI-Express standard, cutoff frequency can be set to 2MHz.
● step 6: between calculating from the filtered jitter of 2 except average cross-correlation coefficient.Find the maximum-delay T_XCOR_Delay (representing with UI) producing cross-correlation coefficient maximal value.When carrying out cross-correlation calculation, need the scope that regulation postpones, this is easy to determine.
● step 7: based on LMS error approach, uses interpolation to calculate fractional delay T_INTERP_Delay, to obtain accurately in the solution of a UI.
● step 8: by carrying out calculated transmission delay to the above component summation obtained:
Td=T_CCR_Offset+T_XCOR_Delay+T_INTERP_Delay
Result UI represents, it can be converted into second, because the duration of UI is known.
The delay that the above-mentioned transmission delay method based on cross-correlation can be applicable to measure in transmission delay or system between any two points is poor.Such as, the difference of transmission delay between " tp.4 " and " tp.5 " can directly be measured.2 place signals can be clock or data-signal, namely from " tp.1 " to " tp.5 " be from clock to clock, and be from data to data from " tp.3 " to " tp.4 ".In order to obtain the measurement result of pinpoint accuracy, signal to noise ratio (S/N ratio) (SNR) should be enough high, and this is genuine in this example embodiment, because the signal of low-frequency jitter component normally in high speed data transmission system.Such as, spread spectrum clock (SSC) is widely used for reference clock and has large low-frequency jitter.
Using clock and data as in clock and data recovery (CDR) system of input, such as export from the data of PLL28 and reference clock as in the CDR26 inputted in receiver 16, PLL is clock multiplier and has the characteristic of low pass from the shake of input reference clock.CDR26 calculates the optimal delay between its recovered clock and data, determines data buffer size thus.Be applicable as transmission delay to calculate and the cross-correlation procedure of description, to find the optimal delay between data and recovered clock.
After obtaining optimal delay as shown in Figure 2, the binding between data cross edge and recovered clock cross edge edge is determined (step 9) by utilizing PLL to generate recovered clock edge according to reference clock waveform.Utilize optimal delay T
d(step 10) adjustment clock edge is to produce " desirable " clock edge.Equally, jitter measurement (step 11) is directly calculated as the difference between data edge cross events and " ideal " clock edge cross events.
As an example, clock and data waveform are as shown in Figure 3 for PCI-Express system.From the centre of transmission delay measurement process and net result be:
T_CCR_Offset=-24.416(UI)
T_XCOR_Delay=28(UI)
T_INTERP_Delay=-0.0007(UI)
Td=3.5769 (UI) or 1.4308 (ns)
Data transfer rate is 25 times of the defeated rate of reference clock in PCI-Express system, and the first intermediate result T_CCR_Offset is approximately-24UI, this means the first recovery data edge about 24UI before the first recovered clock edge.This is consistent with the observation from Fig. 3.
The second intermediate result T_XCORR_Delay is obtained from the cross-correlation curve shown in Fig. 4.The fractional value T_INTERP_Delay of the 3rd intermediate result provides and separates more accurately.Net result Td is transmission delay.
In step 6, the cross-correlation between two signals is calculated.As x (n) under hypothesis two signals and y (n), n=1,2 ..., N is interrelated, there is optimum integer delay k, makes signal x (n) and inhibit signal y (n+k) have minimum difference.The good standard of difference is the difference of two squares or error.Due to the number that N is constant, thus to square error to minimize with minimizing square error be the same.Therefore, the solution of the delay of LMS error is here identical with the solution of least mean-square error.
min
kJ(k)=min
k{∑
n(x(n)-y(n+k))
2}=∑
nx(n)
2+∑
ny(n)
2-2max
k{∑
n(x(n)
*y(n+k))}
=‖x‖
2+‖y‖
2-2‖x‖‖y‖max
kr(k)
Wherein r (k) is cross-correlation coefficient, and ‖ x ‖ and ‖ y ‖ is x (n) and y (n), n=1,2 ..., the 2-norm of N.When x (n) and y (n) is typically canonicalized, ‖ x ‖ and ‖ y ‖ equals 1.Because ‖ x ‖ and ‖ y ‖ is constant, so the specific k making cross-correlation coefficient maximum also makes square error minimum at the same time.
Step 7 utilizes interpolation to calculate fractional delay, and as shown in Figure 5, wherein x (n) and z (n) is associated.The optimum fractional delay providing least error is there is between signal x (n) and shift signal z (n+p), wherein p is the mark with UI unit, and z (n+p) is the interpolate value between z (n) and z (n+1):
z(n+p)=(1-p)*z(n)+p*z(n+1)
When N is constant, good optimal standards is square error, or is square error equally.
min
pJ(p)=min
p{∑
n(x(n)-z(n+p))
2}=min
p{∑
n(x(n)-z(n)-(z(n+1)-z(n))*p)
2}
The solution of this optimization problem is by asking partial derivative to obtain to variable p:
p={∑
n(x(n)-z(n))*(z(n+1)-z(n))}/{∑
n(z(n+1)-z(n))
2}
Therefore the invention provides and a kind ofly effectively utilize the transmission delay of real-time oscilloscope and the method for jitter measurement, the method is based on cross-correlation.
Claims (3)
1. measure a method for transmission delay in clock drive system and shake, comprise step:
Obtain the waveform at two test point places in described clock drive system in testing;
Run constant clock in each of the waveform obtained from described two test points to recover to obtain the offset value for each waveform;
Calculate the time deviation between respective offset value;
Filtering is from the shake of two test points;
Calculate from two test points between the shake of filtering except average cross-correlation coefficient to determine maximum-delay;
Calculate and there is the fractional delay separated accurately than a unit interval to sue for peace with the time deviation in transmission delay calculation procedure with according to the maximum-delay obtained except average cross-correlation coefficient; Wherein fractional delay calculation procedure comprises the step using interpolation based on minimum mean square error method; With
By carrying out calculated transmission delay to the summation of time deviation, maximum-delay and fractional delay, wherein said transmission delay has the solution of an integer unit interval.
2. the method for claim 1, the step wherein running constant clock recovery comprises step:
Obtain the reference clock frequency from waveform; And
This reference clock frequency and a multiplication factor are multiplied by acquisition data transfer rate mutually, the operating procedure that this data transfer rate recovers for the constant clock of another waveform.
3. method as claimed in claim 2, also comprises step:
Reference clock according to the waveform of in waveform generates recovered clock edge;
Transmission delay described in being adjusted at this recovered clock edge, to obtain " ideal " clock edge;
Determine the date conversion edge of another waveform; And
Calculate the difference of shaking as described data edge cross events and described " ideal " clock edge cross events.
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US74082205P | 2005-11-29 | 2005-11-29 | |
US60/740822 | 2005-11-29 | ||
US11/529,856 US7912117B2 (en) | 2006-09-28 | 2006-09-28 | Transport delay and jitter measurements |
US11/529856 | 2006-09-28 |
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CN101232333B (en) * | 2008-01-16 | 2011-06-22 | 中兴通讯股份有限公司 | Clock shake measuring method and oscilloscope for measuring clock shake |
JP2010169504A (en) * | 2009-01-22 | 2010-08-05 | Anritsu Corp | Jitter transfer characteristic measuring instrument |
TWI585427B (en) * | 2016-05-24 | 2017-06-01 | 國立中央大學 | Delay measurement circuit and measuring method thereof |
KR102410014B1 (en) * | 2017-08-03 | 2022-06-21 | 삼성전자주식회사 | Clock jitter measurement circuit and semiconductor device including the same |
CN112994708B (en) * | 2019-12-02 | 2022-06-28 | 澜起科技股份有限公司 | Communication device |
CN110895321B (en) * | 2019-12-06 | 2021-12-10 | 南京南瑞继保电气有限公司 | Secondary equipment time mark alignment method based on recording file reference channel |
CN111459009B (en) * | 2020-04-21 | 2021-08-17 | 哈尔滨工业大学 | Random error estimation system and estimation method for synchronization of multiple digital electronic devices |
TWI806539B (en) * | 2022-04-08 | 2023-06-21 | 瑞昱半導體股份有限公司 | Testing system and testing method |
CN114726437B (en) * | 2022-06-08 | 2022-10-14 | 电子科技大学 | Digital optical transmitter edge jitter detector |
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TW200739101A (en) | 2007-10-16 |
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TWI400460B (en) | 2013-07-01 |
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