CN114338468B - Clock jitter measurement method under crosstalk influence - Google Patents

Clock jitter measurement method under crosstalk influence Download PDF

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CN114338468B
CN114338468B CN202111610990.7A CN202111610990A CN114338468B CN 114338468 B CN114338468 B CN 114338468B CN 202111610990 A CN202111610990 A CN 202111610990A CN 114338468 B CN114338468 B CN 114338468B
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clock
crosstalk
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jitter
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CN114338468A (en
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谭峰
仝宇尘
叶芃
廖霜
曾浩
陈程
邱渡裕
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University of Electronic Science and Technology of China
Uni Trend Technology China Co Ltd
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Abstract

The invention discloses a clock jitter measurement method under the influence of crosstalk, which comprises the steps of firstly converting crosstalk signals XT and clock signals CLK into a frequency domain, carrying out low-pass filtering, then regarding a transmission line as a four-port network, calculating an S parameter matrix of the four-port network, calculating a port transfer function of the clock signals and a port transfer function of the crosstalk signals by using the S parameter matrix, preprocessing, finally dividing an output time domain signal obtained by Fourier inverse transformation of the output frequency domain signal according to the period by using a superposition edge method, calculating the rising edge time of each period to obtain the jitter peak-to-peak value of the clock signals, or circularly shifting and superposing the unit step response of the crosstalk signals on the unit step response of the clock signals by using a step corresponding method, calculating the time of each cyclic shift rising edge zero crossing point, subtracting the minimum time from the maximum time to obtain the jitter peak-to-peak value of the clock signals. The invention is not dependent on the oscilloscope, overcomes the large deviation of the measurement caused by the influence of the bottom noise of the oscilloscope, and is simultaneously suitable for jitter measurement caused by crosstalk on a clock.

Description

Clock jitter measurement method under crosstalk influence
Technical Field
The invention belongs to the technical field of clock jitter measurement, and particularly relates to a clock jitter measurement method under the influence of crosstalk.
Background
With the development of digital communication technology, the demand for instant data access grows exponentially, and the communication rate is higher and higher. In the world of interconnection, a large number of devices are connected to each other and the cloud and internet, and high data rate applications such as video place higher demands on the communication system. As communication speeds increase, the clocks and timing components supporting the communication must provide a better timing source, an important indicator of which is Jitter (Jitter). In high speed systems, timing errors in the clock or oscillator waveforms can limit the maximum rate of the digital I/O interface, limit the dynamic range of the a/D converter, cause the bit error rate of the communication link to increase, and the phase locked loop to lose lock or even signal. Therefore, jitter indexes of various links such as system design, equipment development, engineering acceptance and the like in a digital communication system are required to be considered.
The jitter index is refined and specified by the standardization organizations such as the International telecommunication Union (ITU-T), the communication industry Standard (CCSA), and the like. Deep knowledge of the basic concepts, classification and measurement methods of jitter is necessary for routine maintenance and troubleshooting. Jitter (Jitter) is defined in the ITU-T standard as the short-term deviation of each effective instant of a digital signal from its then-current ideal position (phase).
Jitter is classified into two broad categories: random Jitter (RJ) and Deterministic Jitter (DJ). Random jitter exists in each system with a random gaussian distribution of Probability Density Functions (PDFs), sometimes referred to as "noise floor", typically consisting of thermal noise of the device or system and other approximately gaussian distributed noise.
Deterministic jitter is not random nor inherent to each system, its power spectral density is typically periodic, bounded and narrowband. Deterministic jitter can be further subdivided into Periodic Jitter (PJ), data Dependent Jitter (DDJ) and duty cycle distortion jitter (DCD).
Currently, clock jitter measurement methods are generally divided into two types: time domain measurements and frequency domain measurements.
The time domain measurement generally uses a real-time oscilloscope, and the basic principle is as follows: the oscilloscope compares the measured clock with a reference clock, and the reference clock is obtained through a clock recovery algorithm. From this comparison, the oscilloscope can obtain TIE (Time Interval Error) values and display them in various formats. However, the measurement method is very dependent on the factors such as the sampling rate, the clock recovery method and the jitter separation method of the oscilloscope, and may cause large deviation on measurement due to the influence of the bottom noise of the oscilloscope.
The frequency domain measurement mainly uses the conversion relation between signal phase noise and jitter to quantitatively measure the jitter. However, this measurement method has a limitation because, from the existing theory, the frequency domain measurement can only measure random jitter or deterministic jitter with obvious distribution, and is not suitable for jitter measurement caused by crosstalk on a clock.
Disclosure of Invention
The invention aims to overcome the defects of the prior art and provide a clock jitter measurement method under the influence of crosstalk so as to solve the problems of inaccurate measurement in a time domain and inapplicability of measurement in a frequency domain.
In order to achieve the above object, the method for measuring clock jitter under the influence of crosstalk according to the present invention is characterized by comprising the steps of:
(1) Converting the crosstalk signal XT and the clock signal CLK into frequency domains by utilizing an FFT algorithm, respectively recording the crosstalk frequency domain signal XT_FD and the clock frequency domain signal CLK_FD, and respectively passing the frequency domain signals through a low-pass filter to obtain a filtered crosstalk frequency domain signal XT_FIL and a filtered clock frequency domain signal CLK_FIL:
XT_FIL=XT_FD·H XT (1)
CLK_FIL=CLK_FD·H CLK (2)
wherein H is XT Low-pass filter, H, representing the correspondence of crosstalk signals CLK A low-pass filter corresponding to the clock signal;
(2) Regarding a signal transmission line of crosstalk signals XT and clock signals CLK as a four-port network, wherein a port 1 is a clock signal input port, a port 2 is a clock signal output port, a port 3 is a crosstalk signal input port, and a port 4 is a crosstalk signal output port;
measuring an S parameter matrix of the four-port network by using a vector network analyzer:
Figure BDA0003435436970000021
wherein S is ii (i=1, 2,3, 4) represents the voltage reflection coefficient of port i, S, when the other ports are matched ij (i,j=1,2,3,4&i+.j) represents the voltage transfer coefficient from port j to port i;
(3) Calculating reflection coefficient Γ of port i i ,i=1,2,3
Figure BDA0003435436970000031
Wherein R is 0 R is single-ended reference impedance di Single ended termination impedance for port i;
calculating transfer function H 21 、H 23
Figure BDA0003435436970000032
Wherein DeltaS 21 =S 11 S 22 -S 12 S 21
Figure BDA0003435436970000033
Wherein DeltaS 23 =S 33 S 22 -S 32 S 23
(4) First for transfer function H 21 、H 23 Performing interpolation and zero padding operation, and then transferringFunction H 21 、H 23 Performing fold-over and splicing treatment to obtain a transfer function H 21 _DL、H 23 _DL;
(5) And measuring jitter of the clock signal by adopting a superposition edge method or a step response method, wherein the superposition edge method is as follows:
the crosstalk signal XT and the clock signal CLK are respectively related to the transfer function H 21 、H 23 Multiplication and then addition yields the output frequency domain signal of port 2:
outsig=H 23 _DL·XT_FIL+H 21 _DL·CLK_FIL (6)
performing Fourier inverse transformation on the output frequency domain signal outsig to obtain an output time domain signal;
dividing an output time domain signal into a plurality of waveforms according to a clock period, establishing an xy coordinate system, wherein an x-axis represents time, a y-axis represents amplitude, aligning each waveform according to the x-axis direction, calculating the position (time) of a zero crossing point of each waveform rising edge, subtracting the minimum position (time) from the maximum position (time), obtaining a jitter peak-to-peak value of the clock signal, and completing clock jitter measurement;
the step corresponding method is as follows:
calculating the cross-talk signal XT through the transfer function H 23 Is set to a unit step response XT_step and the clock signal CLK signal passes through the transfer function H 21 Is a unit step response clk_step.
And circularly shifting and superposing the unit step response XT_step on the unit step response CLK_step, calculating the time of the rising edge zero crossing point of the unit step response CLK_step once every one data point, totally shifting the number of points by one period, subtracting the minimum time from the maximum time to obtain the jitter peak value of the clock signal, and completing the clock jitter measurement.
The object of the present invention is thus achieved.
The invention relates to a clock jitter measuring method under the influence of crosstalk, which comprises the steps of firstly converting crosstalk signals XT and clock signals CLK into a frequency domain, carrying out low-pass filtering, then regarding a transmission line as a four-port network, calculating an S parameter matrix of the four-port network, calculating a port transfer function of the clock signals and a port transfer function of the crosstalk signals by using the S parameter matrix, preprocessing, finally dividing an output time domain signal obtained by Fourier inverse transformation of the output frequency domain signals according to the period by using a superposition edge method, calculating the rising edge moment of each period to obtain the jitter peak and peak value of the clock signals, or circularly shifting and superposing the unit step response of the crosstalk signals on the unit step response of the clock signals by using a step corresponding method, calculating the moment of the rising edge zero crossing of each circular shift, subtracting the minimum moment from the maximum moment, and obtaining the jitter peak value of the clock signals. The invention is not dependent on the oscilloscope, overcomes the large deviation of the measurement caused by the influence of the bottom noise of the oscilloscope, and is simultaneously suitable for jitter measurement caused by crosstalk on a clock.
Drawings
FIG. 1 is a flow chart of one embodiment of a method for measuring clock jitter under crosstalk influence according to the present invention;
FIG. 2 is a four port network schematic;
FIG. 3 is a flow chart of one embodiment of the overlap edge method shown in FIG. 1;
FIG. 4 is a diagram of an example of output time domain signal splitting;
FIG. 5 is a flow chart of one embodiment of the step response method shown in FIG. 1;
FIG. 6 is a block diagram of a simulated comparative measurement process of oscilloscope clock jitter and the present invention, wherein (a) is an actual measurement block diagram and (b) is a simulated measurement block diagram;
FIG. 7 is a graph of single-end-to-single-end comparison measurement results, wherein (a) is a simulated output time domain signal waveform graph, (b) is a segmented 5000 clock cycle waveform superposition graph, (c) is an oscilloscope test result of a clock signal, and (d) is an oscilloscope test result of a clock signal under the influence of a crosstalk signal;
FIG. 8 is a graph of single-ended versus differential measurement results, wherein (a) is a simulated output time domain signal waveform graph, (b) is a segmented 5000 clock cycle waveform overlay graph, (c) is an oscilloscope test result of a clock signal, and (d) is an oscilloscope test result of a clock signal under the influence of a crosstalk signal;
FIG. 9 is a graph of differential pair single-ended versus measurement results, wherein (a) is a simulated output time domain signal waveform graph, (b) is a segmented 5000 clock cycle waveform superposition graph, (c) is an oscilloscope test result of a clock signal, and (d) is an oscilloscope test result of a clock signal under the influence of a crosstalk signal;
fig. 10 is a diagram of differential pair differential contrast measurement results, in which (a) is a waveform diagram of a simulated output time domain signal, (b) is a waveform superposition diagram of 5000 divided clock cycles, (c) is an oscilloscope test result of a clock signal, and (d) is an oscilloscope test result of a clock signal under the influence of a crosstalk signal.
Detailed Description
The following description of the embodiments of the invention is presented in conjunction with the accompanying drawings to provide a better understanding of the invention to those skilled in the art. It is to be expressly noted that in the description below, detailed descriptions of known functions and designs are omitted here as perhaps obscuring the present invention.
Fig. 1 is a flowchart of a specific implementation method of the clock jitter measurement method under the influence of crosstalk.
In this embodiment, as shown in fig. 1, the clock jitter measurement method under the influence of crosstalk according to the present invention includes the following steps:
step S1: converting the crosstalk signal and the clock signal into frequency domains respectively, and performing low-pass filtering
The crosstalk signal XT and the clock signal CLK are converted into frequency domains by utilizing an FFT algorithm and respectively recorded as a crosstalk frequency domain signal XT_FD and a clock frequency domain signal CLK_FD, and the frequency domain signals respectively pass through a low-pass filter to obtain a filtered crosstalk frequency domain signal XT_FIL and a filtered clock frequency domain signal CLK_FIL:
XT_FIL=XT_FD·H XT (1)
CLK_FIL=CLK_FD·H CLK (2)
wherein H is XT Low-pass filter, H, representing the correspondence of crosstalk signals CLK Representing the corresponding low pass filter of the clock signal.
In a specific implementation, a Butterworth or Gaussian low pass filter may be used to adjust the rise time of the signal.
For an n-order Butterworth low pass filter, it (at a distance from origin D 0 Where the cutoff frequency occurs) is:
Figure BDA0003435436970000051
wherein D is 0 D (u, v) is the distance of the point (u, v) from the center of the low pass filter for a given non-negative number. The lower the order, the better the flatness of the low pass filter. When D (u, v) =d 0 When H (u, v) =0.5 (half of the attenuation maximum).
For a gaussian low pass filter, its transfer function is:
Figure BDA0003435436970000061
wherein σ is the standard deviation. By letting σ=d 0 Can be according to the cutoff parameter D 0 The expression is obtained:
Figure BDA0003435436970000062
when D (u, v) =d 0 The filter is reduced from its maximum value by a factor of 0.607.
The u, v and D can be calculated by the sampling rate, sampling point and cut-off frequency in the system 0 Is used to design the required filter.
Step S2: s parameter matrix for measuring four-port network
The signal transmission line of the crosstalk signal XT and the clock signal CLK is regarded as a four-port network, wherein the port 1 is a clock signal input port, the port 2 is a clock signal output port, the port 3 is a crosstalk signal input port, and the port 4 is a crosstalk signal output port.
Measuring an S parameter matrix of the four-port network by using a vector network analyzer:
Figure BDA0003435436970000063
wherein S is ii (i=1, 2,3, 4) represents the voltage reflection coefficient of port i, S, when the other ports are matched ij (i,j=1,2,3,4&i+.j) represents the voltage transfer coefficient from port j to port i.
In this embodiment, as shown in fig. 2, port 1 is clocked in and port 3 is clocked in with crosstalk, which causes far-end crosstalk (FEXT) at port 2. Port 4 may also be fed with crosstalk signals (i.e., ports 3,4 switch locations) where near-end crosstalk (NEXT) is caused at port 2.
Step S3: calculating the reflection coefficient and transfer function H of port i 21 、H 23
In actual measurement, whether the ports are terminated with matching impedance has an influence on the measurement result, so that impedance matching of each port in Matlab is also required in transmission between analog wires. It is therefore necessary to calculate the reflection coefficient Γ of port i i ,i=1,2,3
Figure BDA0003435436970000064
Wherein R is 0 R is single-ended reference impedance di Is the single ended termination impedance of port i. Typically single ended reference impedance R 0 =50Ω。
Calculating transfer function H 21 、H 23
Figure BDA0003435436970000071
Wherein DeltaS 21 =S 11 S 22 -S 12 S 21
Figure BDA0003435436970000072
Wherein DeltaS 23 =S 33 S 22 -S 32 S 23
H 21 Representing the transfer function of port 1 to port 2, H 23 Representing the transfer function of port 3 versus port 2.
Step S4: interpolation and zero filling are carried out on transfer function
Because the S parameter matrix is measured by the vector network analyzer and is inconsistent with the data length of the generated signal, interpolation, zero filling and other operations are carried out on the transfer function. The interpolation method uses a one-dimensional linear interpolation method, assuming we know the coordinates (u 0 ,v 0 ) And (u) 1 ,v 1 ) To obtain (u) 0 ,u 1 ) The value v of a certain position u in the interval on a straight line is:
Figure BDA0003435436970000073
since the u value is known (typically u 0 And u 1 A midpoint of (c), the value of v can be derived from the formula:
Figure BDA0003435436970000074
after FFT is carried out on the signals, frequency spectrums with double sidebands are obtained, so that the transfer function is also required to be carried out with fold and splice processing.
Therefore, it is necessary to first transfer the function H 21 、H 23 Performing interpolation and zero padding operation, and then transferring the function H 21 、H 23 Performing fold-over and splicing treatment to obtain a transfer function H 21 _DL、H 23 _DL。
Step S5: measuring jitter of clock signal by superposition edge method or step response method
As shown in fig. 3, the overlap edge method is:
step S501: multiplying the signal with the transfer function and adding to obtain an output frequency domain signal
The crosstalk signal XT and the clock signal CLK are respectively related to the transfer function H 21 、H 23 Multiplication and then addition yields the output frequency domain signal of port 2:
outsig=H 23 _DL·XT_FIL+H 21 _DL·CLK_FIL (6)
step S502: performing Fourier inverse transformation on the output frequency domain signal outsig to obtain an output time domain signal
Step S503: using a primary curve to simulate a rising edge
As shown in fig. 4, the output time domain signal is divided into a plurality of waveforms according to a clock cycle, an xy coordinate system is established, the x axis represents time, the y axis represents amplitude, each waveform is aligned in the x axis direction, and the position (time) of the zero crossing point of each waveform rising edge is calculated. In calculating the position (time) of the rising edge zero-crossing point of each waveform, since the output time domain signal is a discrete signal, the position of the rising edge zero-crossing point cannot be found directly in general. In the present embodiment, a primary curve is used to fit the rising edges, and two abscissas of each waveform rising edge around 0 level are found and denoted as x 1 、x 2 So that the corresponding amplitude value y 1 、y 2 The method meets the following conditions:
y 1 < 0 and y 2 >0 (7)
According to (x 1 ,y 1 ) And (x) 2 ,y 2 ) Determining a straight line, and marking as:
y=ax+b (8)
in the method, in the process of the invention,
Figure BDA0003435436970000081
step S504: calculating the zero crossing position of each waveform rising edge to obtain the jitter peak-to-peak value of the clock signal
And finding the coordinate x of the rising edge zero crossing point, namely the position, according to the straight line y=ax+b, and subtracting the minimum coordinate from the maximum coordinate of the waveforms to obtain the jitter peak value of the clock signal, thereby completing the clock jitter measurement.
When the crosstalk signal XT is an integer multiple of the frequency of the clock signal CLK signalIn relation, for example: f (f) XT =2f CLK . The glitches created by the crosstalk signal XT may never be superimposed on the rising edge of the clock, so this single calculation approach has drawbacks that may lead to inaccuracy in the measurement of the clock jitter. Therefore, the calculation amount needs to be further increased on the basis of the method, so that crosstalk burrs can act on the rising edge of the clock, and the specific method is as follows:
the phase of the crosstalk signal XT is changed, i.e. the crosstalk frequency domain signal XT_FIL is right shifted based on the original crosstalk signal data, one data point is shifted each time, and overflowed data points are circulated to the initial data points. Every time a shift, a jitter calculation is made until the phase shift is equal to the period of the clock. Therefore, a group of peak values can be obtained, and the largest peak value is selected, namely the required jitter peak value.
As shown in fig. 4, the step response method is:
step S505: calculating unit response of crosstalk signal and clock signal
Calculating the cross-talk signal XT through the transfer function H 23 Is set to a unit step response XT_step and the clock signal CLK signal passes through the transfer function H 21 Is a unit step response clk_step.
Step S506: the units are correspondingly circularly overlapped
The unit step response xt_step of the crosstalk signal XT is cyclically shifted and superimposed on the unit step response clk_step of the clock signal CLK.
Step S507, calculating the time of the rising edge zero crossing point under each moving data point to obtain the jitter peak-to-peak value of the clock signal
And calculating the moment of the rising edge zero crossing point of the unit step response CLK_step once every one data point is moved, moving the point number of one period altogether, subtracting the minimum moment from the maximum moment to obtain the jitter peak value of the clock signal, and completing the measurement of clock jitter.
Examples
In this example, the homemade transmission line measurement board is a PCB board with four-port network according to fig. 2.
Firstly, calculating an S parameter matrix of a four-port network, taking the four-port network as an example, and measuring the S parameter matrix by using a vector network analyzer, wherein the S parameter matrix comprises the following three steps:
1. performing instrument calibration;
2. four ports of the four-port network are respectively led into four input ports of the vector network analyzer, and each option in the vector network analyzer, including the number of data points, the frequency band range and the like, is adjusted to start measurement;
3. and after the measurement is finished, outputting a file with the format of S4p.
Generating signals to be measured in Matlab, wherein the signals are respectively as follows: the clock signal frequency is 25MHz, the amplitude is 0.8Vpp, and the rising time is 100ps; the crosstalk signal frequency is 28.125MHz, the amplitude is 0.8Vpp, the rising time is 102ps, then the S parameter matrix file is imported into Matlab, and because the S parameter matrix is measured by a vector network analyzer and is inconsistent with the data length of the generated virtual signal, the S parameter matrix is subjected to operations such as interpolation, zero padding and the like. Since the signal is subjected to FFT to obtain a frequency spectrum with double sidebands, the transfer function is required to be subjected to flipping and splicing. Two methods of calculating jitter are described below:
1. superimposed edge method
As shown in fig. 5, the output time domain signal is divided into a plurality of waveforms according to clock cycles, which are recorded as S1, S2 and …, and then an xy coordinate system is established, the waveforms are all shifted to the original point, that is, each waveform is aligned in the x-axis direction, the y-axis direction is placed according to the amplitude, and thus the waveforms are overlapped in one cycle, then the position (time) of the rising edge zero crossing point of each waveform is calculated, and the minimum position (time) is subtracted from the maximum position (time) to obtain the jitter peak value of the clock signal, thus completing the measurement of clock jitter.
2. Step response method
And circularly shifting and superposing the unit step response XT_step on the unit step response CLK_step, calculating the time of the rising edge zero crossing point of the unit step response CLK_step once every one data point, totally shifting the number of points by one period, subtracting the minimum time from the maximum time to obtain the jitter peak value of the clock signal, and completing the clock jitter measurement.
In order to verify the accuracy of the clock jitter measurement method under the influence of crosstalk, the method is combined with the existing instrument to carry out contrast measurement. As shown in fig. 6 (a), the actual measurement block diagram shows: and generating a clock signal to be measured by using a code error meter (Keysight 8040A), introducing the clock signal to a self-made transmission line measuring plate, and then connecting output to an oscilloscope (Keysight DSA-X96204Q) to obtain a clock jitter measuring result. In order to reduce the influence of the bottom noise of the oscilloscope on the clock jitter result, each group of signals is measured twice, once is an original clock signal and once is a clock signal mixed with crosstalk, and the total jitter obtained by the two groups of measurement is subtracted, so that the jitter of the crosstalk signal on the clock signal can be obtained.
The simulation measurement block diagram is shown in fig. 6 (b), and the simulation process is as follows: and measuring an S parameter matrix of the self-made transmission line measuring board by using a vector network analyzer (Keysight N5245A), inputting the virtual crosstalk signal and the virtual clock signal into a computer, and calculating by using calculation software according to the invention to obtain a test result.
Four comparative measurements were made in total in this example. The measurement modes and results are shown in Table 1:
Figure BDA0003435436970000101
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TABLE 1
The signal frequency amplitude and rise time and the comparison results of simulation and actual measurement for the four transmission modes are shown in table 1, respectively.
Simulation and measured results of four sets of comparative measurements are shown in fig. 7, 8, 9, and 10. Taking the single-end-to-single-end comparison measurement as an example of fig. 7, the clock signal has amplitude of 0.8Vpp, frequency of 25MHz, rise time of 100ps, crosstalk signal amplitude of 0.8Vpp, frequency of 28.125MHz, and rise time of 102ps, and the waveform diagram of the simulation output time domain signal is shown in fig. 7 (a). The waveforms of 5000 clock cycles are superimposed to obtain a waveform diagram as shown in fig. 7 (b). The oscilloscope test result of the clock signal is shown in fig. 7 (c), and the jitter is 33.6ps. The oscilloscope test result of the clock signal under the influence of the crosstalk signal is shown in fig. 7 (d), and the jitter is 46.8ps. The actual measurement value of the clock jitter under the influence of crosstalk was 13.2ps, the measurement value of the clock jitter under the influence of crosstalk was 12.17ps by the superimposed edge method of the present invention (method 1 in table 1), the measurement value of the clock jitter under the influence of crosstalk was 12.06ps by the step response method of the present invention (method 2 in table 1), and the errors were-7.80% and-8.64%, respectively.
By comparing the measurement results, we can see that the simulation is basically consistent with the actual measurement results, the waveforms tend to be consistent, and the accuracy of the invention is verified.
While the foregoing describes illustrative embodiments of the present invention to facilitate an understanding of the present invention by those skilled in the art, it should be understood that the present invention is not limited to the scope of the embodiments, but is to be construed as protected by the accompanying claims insofar as various changes are within the spirit and scope of the present invention as defined and defined by the appended claims.

Claims (3)

1. A method for measuring clock jitter under the influence of crosstalk, comprising the steps of:
(1) Converting the crosstalk signal XT and the clock signal CLK into frequency domains by utilizing an FFT algorithm, respectively recording the crosstalk frequency domain signal XT_FD and the clock frequency domain signal CLK_FD, and respectively passing the frequency domain signals through a low-pass filter to obtain a filtered crosstalk frequency domain signal XT_FIL and a filtered clock frequency domain signal CLK_FIL:
XT_FIL=XT_FD·H XT (1)
CLK_FIL=CLK_FD·H CLK (2)
wherein H is XT Low-pass filter, H, representing the correspondence of crosstalk signals CLK A low-pass filter corresponding to the clock signal;
(2) Regarding a signal transmission line of crosstalk signals XT and clock signals CLK as a four-port network, wherein a port 1 is a clock signal input port, a port 2 is a clock signal output port, a port 3 is a crosstalk signal input port, and a port 4 is a crosstalk signal output port;
measuring an S parameter matrix of the four-port network by using a vector network analyzer:
Figure QLYQS_1
wherein S is ii (i=1, 2,3, 4) represents the voltage reflection coefficient of port i, S, when the other ports are matched ij (i,j=1,2,3,4&i+.j) represents the voltage transfer coefficient from port j to port i;
(3) Calculating reflection coefficient Γ of port i i ,i=1,2,3
Figure QLYQS_2
Wherein R is 0 R is single-ended reference impedance di Single ended termination impedance for port i;
calculating transfer function H 21 、H 23
Figure QLYQS_3
Wherein DeltaS 21 =S 11 S 22 -S 12 S 21
Figure QLYQS_4
Wherein DeltaS 23 =S 33 S 22 -S 32 S 23
(4) First for transfer function H 21 、H 23 Performing interpolation and zero padding operation, and then transferring the function H 21 、H 23 Performing fold-over and splicing treatment to obtain a transfer function H 21 _DL、H 23 _DL;
(5) And measuring jitter of the clock signal by adopting a superposition edge method or a step response method, wherein the superposition edge method is as follows:
the crosstalk signal XT and the clock signal CLK are respectively related to the transfer function H 21 、H 23 Multiplication and then addition yields the output frequency domain signal of port 2:
outsig=H 23 _DL·XT_FIL+H 21 _DL·CLK_FIL (6)
performing Fourier inverse transformation on the output frequency domain signal outsig to obtain an output time domain signal;
dividing an output time domain signal into a plurality of waveforms according to a clock period, establishing an xy coordinate system, wherein an x-axis represents time, a y-axis represents amplitude, aligning each waveform according to the x-axis direction, calculating the position (time) of a zero crossing point of each waveform rising edge, subtracting the minimum position (time) from the maximum position (time), obtaining a jitter peak-to-peak value of the clock signal, and completing clock jitter measurement;
the step corresponding method is as follows:
calculating the cross-talk signal XT through the transfer function H 23 Is set to a unit step response XT_step and the clock signal CLK signal passes through the transfer function H 21 Is a unit step response clk_step;
and circularly shifting and superposing the unit step response XT_step on the unit step response CLK_step, calculating the time of the rising edge zero crossing point of the unit step response CLK_step once every one data point, totally shifting the number of points by one period, subtracting the minimum time from the maximum time to obtain the jitter peak value of the clock signal, and completing the clock jitter measurement.
2. The method for measuring clock jitter under the influence of crosstalk according to claim 1, wherein the calculating the position of the zero crossing point of each waveform is:
fitting the rising edges with a curve to find two abscissas of each waveform rising edge around 0 level, denoted as x 1 、x 2 So that the corresponding amplitude value y 1 、y 2 The method meets the following conditions:
y 1 < 0 and y 2 >0 (7)
According to (x 1 ,y 1 ) And (x) 2 ,y 2 ) Determining a straight line, and marking as:
y=ax+b (8)
in the method, in the process of the invention,
Figure QLYQS_5
the coordinates x, i.e. the position, of the rising edge zero crossing are found from the straight line y=ax+b.
3. The method for measuring clock jitter under the influence of crosstalk according to claim 1 or 2, further comprising the step of changing the phase of the crosstalk signal XT by shifting the crosstalk frequency domain signal xt_fil to the right based on the original crosstalk signal data, shifting one data point each time, circulating the overflowed data point to the original data point, and performing jitter calculation each time, until the phase shift is equal to the clock period, so that a set of peak-to-peak values can be obtained, and selecting the largest peak-to-peak value, namely the jitter peak-to-peak value required by us.
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