CN1953639A - 减小并行信号线路间远端串扰的布线架构及方法 - Google Patents

减小并行信号线路间远端串扰的布线架构及方法 Download PDF

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CN1953639A
CN1953639A CN200510100548.4A CN200510100548A CN1953639A CN 1953639 A CN1953639 A CN 1953639A CN 200510100548 A CN200510100548 A CN 200510100548A CN 1953639 A CN1953639 A CN 1953639A
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林有旭
叶尚苍
李传兵
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Hongfujin Precision Industry Shenzhen Co Ltd
Hon Hai Precision Industry Co Ltd
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    • H—ELECTRICITY
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    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
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    • H05K2201/09—Shape and layout
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Abstract

一种减小并行信号线路间远端串扰的布线架构及方法，所述并行信号线路包括一侵扰线以及一受扰线，所述受扰线与所述侵扰线平行，其中所述受扰线具有若干段，各段之间通过一延时模组连接。本发明的有益效果在于减小并行信号线路间远端串扰，提高信号传输的完整性。

Description

减小并行信号线路间远端串扰的布线架构及方法
【技术领域】
本发明涉及一种减小并行信号线路间远端串扰的布线架构与方法。
【技术背景】
串扰是在一个信号在传输信道上传输时，因电磁耦合而对相邻近的传输线产生的影响，其表现为在被干扰的信号上注入了一定的耦合电压和耦合电流。在数字电路的设计领域中，串扰的存在是非常广泛的，而且随着信号速率的提高和产品外型尺寸越来越小，数字系统总串扰也急剧增加，过大的串扰会影响到系统的性能，甚至引起电路的误触发，导致系统无法正常工作。
针对上述情况，业界需要进行串扰分析并探索解决串扰问题的方法。业界解决串扰通常从以下几个方面考虑：
a)在可能的情况下，降低信号沿的变换速率。通常在器件选型的时候，在满足设计规范的同时，尽量选择慢速的器件，并且避免不同种类的信号混合使用，因为快速变换的信号有潜在的串扰危险。
b)采用屏蔽措施。为信号提供包地是解决串扰问题的一个有效途径。然而包地会导致布线量增加，使原本有限的布线区域更加拥挤。另外，地线屏蔽要达到预期目的，地线上接地点间距一般要小于信号变化沿长度的两倍。同时地线也会增大信号的分布电容，使传输线阻抗增大，信号沿变缓。
c)合理设置层和布线。合理设置布线层和布线间距，减小并行信号线的长度，缩短信号层和平面层的间距，增大信号线的间距，减小并行信号线长度，这些措施都可以减小串扰。
d)设置不同的布线层。为不同速率的信号设置不同的布线层，并合理设置平面层，也是解决串扰的方法之一。
从以上第c)种解决方案中可知减小并行信号线的长度和增大信号线的间距可以相应的减小串扰，倘若并行信号线的长度和间距均不允许再作改变，而并行信号线间必然产生由近及远逐渐增加的远端串扰。
在现有技术中，所述并行信号线平行传输，若以Lm表示两信号线间的互感，L表示各信号线的感抗，Cm表示两信号线间的互容，C表示各信号线的容抗，τγ表示侵扰线中传输信号上升沿延时，Tpd表示受扰线中串扰信号传输的时间，则远端串扰FEXT的计算如下：
FEXT [ % ] = - T pd 2 τ γ ( L m L - C m C )
可见侵扰线对受扰线在各时间点的远端串扰将随受扰线中串扰信号传输时间的增加而增大，且在各信号线间的各介电参数一定的条件下，所述并行信号线越长，Tpd越大，则其远端串扰叠加得越多，其仿真曲线图如图2中仿真曲线10所示，所述仿真曲线截取了产生一个远端串扰波形的时间点，在坐标图形中，横坐标表示时间，单位为秒；纵坐标表示振幅，其单位为伏，最大值为0.16伏。从所述仿真曲线图中可以看出，此时远端串扰振幅较大，约为0.146伏～0.150伏，且所述串扰信号延时0.2E-009秒，合200ps。
这样的远端串扰在信号线间越来越大的影响着信号的完整性，于是有必要提供一种减小并行信号线路间远端串扰的布线架构与方法。
【发明内容】
鉴于上述技术内容，有必要提供一种减小并行信号线路间远端串扰的布线架构与方法。
一种减小并行信号线路间远端串扰的布线架构，包括一侵扰线以及一受扰线，所述受扰线与所述侵扰线平行，其中所述受扰线具有若干段，各段之间通过一延时模组连接。
一种减小并行信号线路间远端串扰的方法，所述并行信号线路包括一侵扰线以及一受扰线，所述受扰线与所述侵扰线平行，其中所述减小并行信号线路间远端串扰的方法包括以下步骤：
将与所述侵扰线平行的受扰线分成若干段，且各段间通过一延时模组连接；
设定所述延时模组的延时，以避免所述延时模组前后的受扰线中的远端串扰相互叠加。
本发明的有益效果在于减小并行信号间远端串扰，提高了信号传输的完整性。
【附图说明】
下面参照附图结合实施例对本发明作进一步的说明。
图1是本发明减小并行信号线路间远端串扰的布线架构第一实施例原理图。
图2是本发明减小并行信号线路间远端串扰的布线架构第一实施例仿真曲线图和现有技术的仿真曲线图。
图3是本发明减小并行信号线路间远端串扰的布线架构第二实施例原理图。
【具体实施方式】
请参阅图1，本发明减小并行信号线路间远端串扰的布线架构第一实施例原理图，本实施例中两并行信号线包括一侵扰线100、一受扰线200以及一延时模组400，所述侵扰线100中传输信号300的上升沿延时τγ为200ps，所述延时模组400采用的是蛇形线结构。
先将所述受扰线200平均分成两段，该两段之间接入所述延时模组400。设定所述延时模组400，使所述受扰线200中传输的信号通过所述延时模组400延时等于所述侵扰线100中传输信号300的上升沿延时。由于所述侵扰线100与所述受扰线200在延时模组400以外的部分平行传输，各段传输线中串扰信号传输时间Tpd变为原来的1/2，则根据上述两传输线平行时远端串扰的计算公式：
FEXT [ % ] = - T pd 2 τ γ ( L m L - C m C )
可知，当所述侵扰线100与所述受扰线200平行时受扰线200中信号传输时间变为现有技术中Tpd的1/2。观测受扰线的远端串扰仿真曲线图，如图2中仿真曲线20所示，通过与现有技术远端串扰的仿真曲线10比较，可见，受扰线200中的远端串扰振幅减小为0.074伏，为现有技术中远端串扰的1/2。将所述延时模组设定为延时0.4E-009秒，即400ps，则其远端串扰如仿真曲线30所示，可见其后一远端串扰比前一远端串扰滞后0.2E-009秒，即200ps。
请参阅图3，本发明减小并行信号线路间远端串扰的布线架构第二实施例原理图，本实施例中两并行信号线包括一侵扰线100、一受扰线200以及若干延时模组400，所述侵扰线100中传输信号上升沿延时τγ为200ps。先将受扰线200平均分成5段，各段之间接入所述延时模组400，并设定所述延时模组400，使所述延时模组400延时大于或等于所述侵扰线100中传输信号300的上升沿延时。由于所述侵扰线100与所述受扰线200在各延时模组400之间平行传输，各段传输线中串扰信号传输时间变为现有技术中受扰线中串扰信号的传输时间Tpd的1/5，则根据上述两传输线平行时其远端串扰的计算公式可知远端串扰减小为现有技术中远端串扰的1/5。
由上述两实施例可知，若将所述受扰线200平均分成N(N为自然数)段，其各段间接入所述延时模组400，则所述远端串扰将减小为原来的1/N，但是在此方法的运用中，为了节省布线空间和保证信号的并行传输，一般在受扰线中接入1～5个延时模组即可。所述延时模组可以选用蛇形线或螺旋线，也可以选用延时触发器等。这样通过对串扰信号的传输进行延时处理，避免了所述受扰线中串扰信号随信号线长度的增加而增大，可大大减小两并行信号传输线间的远端串扰，提高了信号传输的完整性。

Claims (9)

1.一种减小并行信号线路间远端串扰的布线架构，包括一侵扰线以及一受扰线，所述受扰线与所述侵扰线平行，其特征在于：所述受扰线具有若干段，各段之间通过一延时模组连接。
2.如权利要求1所述的减小并行信号间远端串扰的布线架构，其特征在于：所述延时模组用蛇形线进行延时。
3.如权利要求1所述的减小并行信号间远端串扰的布线架构，其特征在于：所述延时模组用螺旋线进行延时。
4.如权利要求1所述的减小并行信号间远端串扰的布线架构，其特征在于：所述延时模组为一延时触发器。
5.如权利要求1所述的减小并行信号间远端串扰的布线架构，其特征在于：所述延时模组的延时被设定为大于或等于所述侵扰线传输信号的上升沿延迟的时间。
6.一种减小并行信号线路间远端串扰的方法，所述并行信号线路包括一侵扰线以及一受扰线，所述受扰线与所述侵扰线平行，其特征在于：所述减小并行信号线路间远端串扰的方法包括以下步骤：
将与所述侵扰线平行的受扰线分成若干段，且各段之间通过一延时模组连接；及
设定所述延时模组的延时，以避免所述延时模组前后的受扰线中的远端串扰相互叠加。
7.如权利要求6所述的减小并行信号间远端串扰的方法，其特征在于：所述延时模组的延时被设定为大于或等于所述侵扰线传输信号的上升沿延迟的时间。
8.如权利要求6所述的减小并行信号间远端串扰的方法，其特征在于：所述延时模组用蛇形线结构进行延时。
9.如权利要求6所述的减小并行信号间远端串扰的方法，其特征在于：所述延时模组为一延时触发器。
CN200510100548.4A 2005-10-17 2005-10-17 减小并行信号线路间远端串扰的布线架构及方法 Expired - Fee Related CN1953639B (zh)

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CN103179776A (zh) * 2011-12-20 2013-06-26 鸿富锦精密工业(武汉)有限公司 具有测试点的信号传输线
CN103338007A (zh) * 2013-06-04 2013-10-02 上海华力创通半导体有限公司 一种噪声处理方法及噪声处理后的电路
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CN101621047B (zh) * 2008-07-04 2012-09-19 鸿富锦精密工业（深圳）有限公司 降低信号线路间远端串扰的架构
CN103179776A (zh) * 2011-12-20 2013-06-26 鸿富锦精密工业(武汉)有限公司 具有测试点的信号传输线
CN103179776B (zh) * 2011-12-20 2016-04-06 鸿富锦精密工业(武汉)有限公司 具有测试点的信号传输线
CN103338007A (zh) * 2013-06-04 2013-10-02 上海华力创通半导体有限公司 一种噪声处理方法及噪声处理后的电路
CN103338007B (zh) * 2013-06-04 2016-10-05 上海华力创通半导体有限公司 一种噪声处理方法及噪声处理后的电路
CN104899363A (zh) * 2015-05-27 2015-09-09 浪潮电子信息产业股份有限公司 一种提高信号完整性的pin field出线设计方法
CN117473944A (zh) * 2023-12-26 2024-01-30 苏州元脑智能科技有限公司 传输线的串扰防护方法及装置、集成电路、电子设备
CN117473944B (zh) * 2023-12-26 2024-04-26 苏州元脑智能科技有限公司 传输线的串扰防护方法及装置、集成电路、电子设备

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