CN1949695A - Method and system for giving-up error frame in frame data transmission - Google Patents
Method and system for giving-up error frame in frame data transmission Download PDFInfo
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- CN1949695A CN1949695A CN 200610063384 CN200610063384A CN1949695A CN 1949695 A CN1949695 A CN 1949695A CN 200610063384 CN200610063384 CN 200610063384 CN 200610063384 A CN200610063384 A CN 200610063384A CN 1949695 A CN1949695 A CN 1949695A
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Abstract
The invention discloses an error frame discarding method in frame data transmission, where frame receiving and checking module transmits data frame and frame error flag to error frame discarding module; the effor frame discarding module buffer-stores the received frame and when a frame has been received, judging by the frame error flag: if the frame is an error frame, receiving next frame, changing frame write address pointer into frame starting address recording pointer, writing in new frame from the starting address of the error frame so that the new frame covers the error frame and the error frame is discarded. And the invention also discloses an error frame discarding system in frame data transmission, comprising frame receiving and checking module and error frame discarding module, interconnected. And the invention is simple to implement and occupies less resources and saves effective bandwidth.
Description
Technical field
The present invention relates to data communication technology field, specifically, relate to the method and system of giving-up error frame in a kind of data frame transfer.
Background technology
In data communication field, Frame often will be between chip chamber, plate, transmit between router, because a variety of causes can cause frame data to make mistakes in transmission course, so all will carry out verification after receiving terminal is being received frame, frame carries out discard processing to makeing mistakes.Because the CRC (Cyclic Redundancy Code, cyclic redundancy check (CRC) code) of frame is at the end of frame, could come the judgment frame data whether correct according to the check code of afterbody after frame data are received so generally have only.Because frame receives into, how frame data to be transmitted and to abandon the technology that becomes a key fast like this according to the frame data correctness.
Referring to Fig. 1, be existing a kind of technical scheme that Frame is carried out verification, abandons and transmits, one of data-bus width expansion to carrying Frame in this scheme is used for depositing frame mistake is identified, in the process of received frame, judge, judged result is left on the extension bits, make each frame corresponding one by one to the mistake sign with it.Referring to Fig. 2, be the concrete workflow schematic diagram of this technical scheme, its workflow is as follows:
1) data input, whether judgment frame is correct, stamps flag bit and writes on the extension width position of Frame;
2) frame data buffer memory;
3) sense data from the previous stage formation is read since the afterbody of a frame, judges whether this frame is correct, if correct, then this frame is sent, if incorrect, then this frame is abandoned;
When 4) data frame content being written in the one-level formation of back, write since the tail address of a frame;
When 5) data are exported, read in the normal order.
This technology realizes very complicated: at first will begin down to read from the tail address when frame is read in frame buffer, to begin to write from the tail address of frame when writing back one-level formation then, if the length of frame is different in size, just need carry out the calculating of tail address, this calculating is a no small job, handle more complicated, tend to bring mistake.
Existing another technical scheme is provided with two FIFO (firstinput first output, first-in first-out register) as shown in Figure 3 in this scheme, one is used for the storage frame data, and one is used for storage frame mistake is identified.Its workflow is as follows:
1) deposits message data in data FIFO behind the received frame, and in the process that receives, carry out checking treatment;
2) after frame is received, check results is deposited in mistake sign FIFO;
3) when reading frame, read earlier the sign among the mistake sign FIFO, send if correctly from data FIFO, read frame data; If mistake is read data from FIFO but do not transmit, to reach the purpose that frame abandons.
Though it is simple than prior art one that prior art two realizes, but its shortcoming is to mistake sign and Frame separate storage, mistake is identified among the FIFO must be corresponding one by one with the frame among the frame data FIFO, both are in case the dislocation back just can not be recovered again, and what frame data were corresponding with it just can not mate forever to the mistake sign again; In addition, after mistake sign judgment frame being mistake according to frame, transmit and just to abandon after control module still needs this frame data bag read fully, owing to reading reasons such as control module clock processing speed, if the unit interval is read the ability of the ability of bag not as writing module, just can not guarantee in the unit interval, will read out to wrapping all, and if spread bandwidth reads invalid frame, be a waste to effective bandwidth like this.
Above-mentioned prior art all adopts and will carry out buffer memory to the mistake sign, read sign during reading of data earlier, carry out abandoning and transmitting according to sign to frame data, realizing having taken more resource in the operation like this, and there is a fixed response time after to misinterpretation in abandoning and transmitting of Frame, can not reach abandoning fast for the Frame of mistake.
Summary of the invention
The embodiments of the invention purpose is to solve in the prior art frame data to mistake to abandon and need take more problem of resource, and the method and system of giving-up error frame in a kind of data frame transfer is provided.
To achieve these goals, embodiments of the invention provide following technical scheme:
The method of giving-up error frame in a kind of frame data transmission, described method comprises:
A, receiving data frames and frame identify mistake;
The frame that B, buffer memory receive when receiving a frame, is judged mistake sign according to frame, if when described frame is wrong frame, then receives next frame again, and the write address pointer that changes frame is a frame initial address record pointer, begins to write new frame from wrong frame initial address.
Preferably, further comprise step C behind the described step B: when effective frame counter is non-vanishing, read the good frame stored to the next stage formation.
Embodiments of the invention also provide the system of giving-up error frame in a kind of frame data transmission, comprise that frame receives verification module and giving-up error frame module, the Frame that described frame receiver module transmits in order to reception, Frame is carried out verification and stamps mistake is identified, described giving-up error frame module identifies mistake in order to Frame and the frame that caching frame reception verification module sends over, according to frame the mistake sign is judged, when frame is wrong frame, change the write address of frame, begin to write next frame from wrong frame start position.
Owing to adopted such scheme, after having avoided first buffer memory in the prior art to the mistake sign, read embodiments of the invention sign again and then to the complex operations process that abandons and transmit of Frame, take less resource and realize simple, only need a cache module, reach and stored frame by the change read/write address, abandon the purpose of bad frame, in addition, moment frame losing after the judgement message was made mistakes when embodiments of the invention finished in the message reception, only stored frame in the cache module, from buffer module, no longer need to read wrong frame during read data frame, read module does not just need to expend the time that misreads bag like this, in the unit interval, can read wrapping well fully, save effective bandwidth.
Description of drawings
Fig. 1 is prior art one a sign position deposit position schematic diagram.
Fig. 2 is that prior art one system forms schematic diagram.
Fig. 3 is that the prior art two system is formed schematic diagram.
Fig. 4 is a composition schematic diagram of realizing system embodiment one of the present invention.
Fig. 5 is a composition schematic diagram of realizing system embodiment two of the present invention.
Fig. 6 is a schematic flow sheet of realizing method embodiment one giving-up error frame process of the present invention.
Fig. 7 realizes that the frame of method embodiment one of the present invention reads the schematic flow sheet of process.
Embodiment
Embodiments of the invention provide a kind of method and system that wrong frame in the data frame transfer is abandoned fast.
Because the CRC check sign indicating number of frame data is at the end of frame data, only after all receiving, the frame valid data just come out, when receiving frame, could judge whether this frame should abandon after must a frame receiving, therefore for solving the problem that abandons of the wrong frame that has received, the technical solution used in the present invention is: the frame that receives is write in the cache module again, and when cache module is received a frame, frame according to its afterbody identifies mistake, change is to RAM (the Random Access Memory of the write operation of frame, random access memory) address has made frame cover wrong frame, has only stayed frame, has saved resource.
With reference to the accompanying drawings embodiments of the invention are described in detail.
Referring to Fig. 4, composition diagram for giving-up error frame system embodiment one provided by the invention, the system of present embodiment one comprises that frame receives verification module, giving-up error frame module and reads control module, frame receives the verification module and is responsible for receiving the Frame that transmits, and Frame carried out verification, output frame is to the frame data of mistake sign and verification; The giving-up error frame module is responsible for the Frame that caching frame receives the transmission of verification module, according to frame the mistake sign is changed the address ram of write operation, and good frame is covered wrong frame, has only stored frame and abandons wrong frame; Read control module and be responsible for having realized the forwarding of frame, frame data are read into the next stage formation.
Among the embodiment one of native system, frame receives MAC layer (the MediaAccess Control that the verification module is arranged in Ethernet, the medium access control sublayer agreement), the giving-up error frame module comprises writes control module WR_CTRL and cache module BUFFER, wherein write control module WR_CTRL two address pointers are set, write pointer WR_CUR and frame initial address record pointer WR_SAVE, WR_CTRL produces to write and enables Frame is write BUFFER, control simultaneously writes the address, be provided with a valid frame counter BUF_PKT_CNT among the BUFFER, wherein BUF_PKT_CNT should minimum can represent the maximum frame number (maximum frame number=BUFFER length/minimum frame length) that can hold among the BUFFER, described valid frame counter is in order to count the good frame that transmits, and its initial value is defaulted as zero.Read control module RD_CTRL a read pointer RD_CUR is set, can in empty, promptly not begin therefrom to read frame at cache module, and it is transmitted, improved the speed and the efficient of system's operation.
Referring to Fig. 5, each module that realizes the embodiment two of system of the present invention adopts following setting: frame receives the verification module and still is positioned at the MAC layer, be with system embodiment one difference, cache module in the giving-up error frame module adopts first-in first-out register FIFO, be packaged with write pointer WR_CUR in the described FIFO, frame initial address record pointer WR_SAVE and read pointer RD_CUR, write address pointer is not set in the control module WR_CTRL, only be responsible for producing writing enable signal and write data signal, effective frame counter FIFO_PKT_CNT also is set among the FIFO, wherein FIFO_PKT_CNT should minimum can represent the maximum frame number (maximum frame number=FIFO length/minimum frame length) that can hold among the FIFO, its initial value is defaulted as zero, read the also not responsible generation of reading the address of control module RD_CTRL, a full signal of sky according to FIFO produces to be read to enable.
System embodiment based on above-mentioned realization giving-up error frame, the basic skills that realizes giving-up error frame of the present invention is as follows: Frame and frame that giving-up error frame module received frame reception verification module sends over identify mistake, Frame is buffered into its inner cache module, when receiving a Frame, according to frame the mistake sign is judged frame, when frame is wrong frame, initial address with current this frame of write address return recording, again receive next frame, new frame covers former wrong frame, and former wrong frame is dropped.
Utilize the system embodiment one of above-mentioned realization giving-up error frame realize giving-up error frame method of the present invention embodiment one flow chart as shown in Figure 6, specifically may further comprise the steps:
Frame and frame that step 601:WR_CTRL reception MAC layer transmits identify mistake;
Step 602:WR_CUR is updated to WR_SAVE, and write address is updated to the initial address of present frame;
Step 603:WR_CTRL writes BUFFER with frame data, and the WR_CUR write address increases progressively;
Step 604:WR_CTRL judges whether a Frame receives, and is then to stamp eop (end of packet, end-of-packet) to identify and enter step 605 at the frame data end, continues to write frame otherwise return step 603;
Step 605:WR_CTRL judges whether the frame that receives has been frame, is then to enter step 606, otherwise returns step 601, receives next frame;
Step 606:BUF_PKT_CNT adds 1, and WR_SAVE is updated to current WR_CUR, and the initial address of present frame is updated to current write address, and this good frame is stored into BUFFER, then returns step 601, receives next frame.
When above-mentioned steps 601 to 606 was carried out, RD_CTRL also carried out the task of reading the good frame that has deposited among the BUFFER accordingly, and specifically workflow is as shown in Figure 7:
Step 701:RD_CTRL judges whether BUF_PKT_CNT is non-vanishing among the BUFFER, is then to enter step 702;
Step 702:RD_CTRL is read data frame from BUFFER, and RD_CUR increases progressively simultaneously;
Step 703: when reading frame eop sign, a frame reads and finishes, and enters step 701, reads next frame.
Need to prove, a preferred embodiment as method provided by the invention, at WR_CTRL a good frame is write BUFFER simultaneously, RD_CTRL promptly begins startup and reads frame, in the process of reading, write simultaneously like this, the speed and the efficient of system's operation have been improved, capacity to cache module no longer includes too high requirement simultaneously, no longer need it to be enough to hold all good frames to be stored, the length of BUFFER only need meet some requirements, consider opposite extreme situations, suppose to have deposited among the BUFFER frame the longest, read the frame data that write that WR_CTRL does not stop again in the process of frame data at RD_CTRL, the frame data length that WR_CTRL write again when then the longest frame ran through has also reached the length of long frame, and then BUFFER should hold two data of long frame at least.The maximum length of supposing the frame that will support is MTU (Maximum Transmission Unit, a MTU), and then the minimum length of BUFFER should be MTU * 2.
Utilize said system embodiment two to realize that the concrete workflow of embodiment two of method of giving-up error frame of the present invention is as follows:
When WR_CTRL receives the Frame that the MAC layer transmits, produce and write enable signal and write data signal is given FIFO; FIFO is updated to WR_SAVE with its WR_CUR, and write address is updated to the initial address of present frame; Frame writes FIFO, and WR_CUR increases progressively, and stamps eop at the frame data end; When receiving a frame, FIFO judges whether good frame of this frame, is that then FIFO_PKT_CNT adds 1, and WR_SAVE is updated to current WR_CUR, should be stored into FIFO by good frame, otherwise WR_CUR is updated to WR_SAVE, receives next frame.Whether FIFO is zero to the empty full signal of RD_CTRL transmission according to FIFO_PKT_CNT, and when sending full signal, RD_CTRL produces and reads enable signal to FIFO, and FIFO exports the good frame of being stored.
With above-mentioned method embodiment one provided by the invention, among this method embodiment two, FIFO reads frame simultaneously writing frame, and its capacity should hold two data of long frame at least.The maximum length of supposing the frame that will support is MTU, and then the minimum length of FIFO should be MTU * 2.
Adopt the foregoing description, by adopting cache module that the Frame that receives is carried out buffer memory, after receiving a certain frame, judgment frame is to wrong and determine the initial address that writes of next frame according to judged result, when frame is wrong frame, next frame writes from former wrong frame initial address, cover former wrong frame, this scheme is simple to operate, take less resource and can realize abandoning fast of wrong frame, read and only read when transmitting Frame frame, save resource and effective bandwidth, read while write operation and carry out simultaneously, system running speed and efficient are higher.
The above is the preferred embodiments of the present invention only, is not limited to the present invention, and for a person skilled in the art, the present invention can have various changes and variation.Within the spirit and principles in the present invention all, any modification of being done, be equal to replacement, improvement etc., all should be included within the claim scope of the present invention.
Claims (9)
1, the method for giving-up error frame in a kind of frame data transmission is characterized in that described method is:
A, receiving data frames and frame identify mistake;
The frame that B, buffer memory receive when receiving a frame, is judged mistake sign according to frame, if when described frame is wrong frame, then receives next frame again, and the write address pointer that changes frame is a frame initial address record pointer, begins to write new frame from wrong frame initial address.
2, method according to claim 1 is characterized in that, described step B further comprises: when being frame as if frame, frame initial address record pointer is updated to current write address pointer, stores described good frame, and the valid frame counter increases a particular value.
3, method according to claim 2 is characterized in that, further comprises step C behind the described step B: when effective frame counter is non-vanishing, read the good frame stored to the next stage formation.
4, method according to claim 1 is characterized in that, described step B specifically comprises:
B1, write address pointer are updated to frame initial address record pointer;
B2, caching frame data, write address pointer increases progressively;
B3, judge whether a frame receives, be then to stamp the frame end sign, and enter next step at the frame data end;
B4, mistake sign is judged whether the frame that receives is wrong frame,, return step B1, receive next frame if frame is wrong frame according to frame.
5, method according to claim 4 is characterized in that, described step B4 further comprises: if frame has been a frame, the valid frame counter increases a particular value, and frame initial address record pointer is updated to current write address pointer, stores described good frame, return step B1, receive next frame.
6, the system of giving-up error frame in a kind of frame data transmission, it is characterized in that, comprise that frame receives verification module and giving-up error frame module, the Frame that described frame receiver module transmits in order to reception, Frame is carried out verification and stamp mistake is identified, and described giving-up error frame module identifies mistake in order to Frame and the frame that caching frame reception verification module sends over, and according to frame the mistake sign is judged, when frame is wrong frame, change the write address of frame, begin to write next frame from wrong frame start position.
7, system according to claim 6, it is characterized in that, described giving-up error frame module comprises writes control module WR_CTRL and cache module BUFFER, described WR_CTRL is in order to write frame data the position of described BUFFER and control write address pointer and frame initial address pointer, and described BUFFER counts in order to the caching frame data and to the good frame that receives.
8, system according to claim 6, it is characterized in that, described giving-up error frame module comprises writes control module WR_CTRL and cache module FIFO, described WR_CTRL writes enable signal in order to generation and gives described FIFO, described FIFO is in order to the caching frame data, control the position of write address pointer and frame initial address pointer, and the good frame that receives is counted.
9, system according to claim 6 is characterized in that, described system also comprises reads control module RD_CTRL, and described RD_CTRL is in order to read the good frame stored in the giving-up error frame module to the next stage formation.
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Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101403895B (en) * | 2008-11-13 | 2010-06-02 | 南京恩瑞特实业有限公司 | High-safety redundant buffering queue implementing method |
| CN103079290A (en) * | 2012-12-25 | 2013-05-01 | 上海桑锐电子科技有限公司 | Wireless bus communication method |
| CN103455511A (en) * | 2012-05-31 | 2013-12-18 | 北大方正集团有限公司 | Data detection method, system and device |
| CN104866454A (en) * | 2015-04-13 | 2015-08-26 | 中国人民解放军国防科学技术大学 | Write message prospect processing method and device facing board-level high-speed bus |
| CN108804345A (en) * | 2018-05-23 | 2018-11-13 | 湖南博匠信息科技有限公司 | Method for writing data, device, equipment and computer readable storage medium |
| CN113490084A (en) * | 2021-07-14 | 2021-10-08 | 合肥国科天迅科技有限公司 | FC-AE switch ultra-bandwidth transmission method supporting priority scheduling |
| CN113726605A (en) * | 2021-08-30 | 2021-11-30 | 北京计算机技术及应用研究所 | Device and method for quickly discarding error message |
| CN114153758A (en) * | 2021-11-19 | 2022-03-08 | 中国电子科技集团公司第三十四研究所 | Cross-clock domain data processing method with frame counting function |
| CN115033504A (en) * | 2022-06-30 | 2022-09-09 | 斯凯瑞利（北京）科技有限公司 | FIFO memory with rollback mechanism, reading and writing method and communication system |
| CN113490084B (en) * | 2021-07-14 | 2024-04-26 | 合肥华控天芯科技有限公司 | FC-AE exchanger ultra-bandwidth transmission method supporting priority scheduling |
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Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101403895B (en) * | 2008-11-13 | 2010-06-02 | 南京恩瑞特实业有限公司 | High-safety redundant buffering queue implementing method |
| CN103455511A (en) * | 2012-05-31 | 2013-12-18 | 北大方正集团有限公司 | Data detection method, system and device |
| CN103079290A (en) * | 2012-12-25 | 2013-05-01 | 上海桑锐电子科技有限公司 | Wireless bus communication method |
| CN104866454A (en) * | 2015-04-13 | 2015-08-26 | 中国人民解放军国防科学技术大学 | Write message prospect processing method and device facing board-level high-speed bus |
| CN104866454B (en) * | 2015-04-13 | 2017-10-03 | 中国人民解放军国防科学技术大学 | Message prediction processing method and processing device is write towards plate level high-speed bus |
| CN108804345A (en) * | 2018-05-23 | 2018-11-13 | 湖南博匠信息科技有限公司 | Method for writing data, device, equipment and computer readable storage medium |
| CN113490084A (en) * | 2021-07-14 | 2021-10-08 | 合肥国科天迅科技有限公司 | FC-AE switch ultra-bandwidth transmission method supporting priority scheduling |
| CN113490084B (en) * | 2021-07-14 | 2024-04-26 | 合肥华控天芯科技有限公司 | FC-AE exchanger ultra-bandwidth transmission method supporting priority scheduling |
| CN113726605A (en) * | 2021-08-30 | 2021-11-30 | 北京计算机技术及应用研究所 | Device and method for quickly discarding error message |
| CN114153758A (en) * | 2021-11-19 | 2022-03-08 | 中国电子科技集团公司第三十四研究所 | Cross-clock domain data processing method with frame counting function |
| CN115033504A (en) * | 2022-06-30 | 2022-09-09 | 斯凯瑞利（北京）科技有限公司 | FIFO memory with rollback mechanism, reading and writing method and communication system |
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