CN1909559B - Interface board based on rapid periphery components interconnection and method for switching main-control board - Google Patents
Interface board based on rapid periphery components interconnection and method for switching main-control board Download PDFInfo
- Publication number
- CN1909559B CN1909559B CN2006101277178A CN200610127717A CN1909559B CN 1909559 B CN1909559 B CN 1909559B CN 2006101277178 A CN2006101277178 A CN 2006101277178A CN 200610127717 A CN200610127717 A CN 200610127717A CN 1909559 B CN1909559 B CN 1909559B
- Authority
- CN
- China
- Prior art keywords
- master control
- control borad
- endpoint
- pci express
- interface board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Landscapes
- Bus Control (AREA)
Abstract
The invention relates to an interface board based on PCI Express, which comprises: Endpoint and a bus connector connecting at least two main control boards and Endpoint via PCI Express bus, wherein said connector comprises an address projection module and a projection separate module, while the address projection module is used to build and maintain the address projection between Endpoint and at least two main control boards, and the address separate module is used to separate and recover the address projection between Endpoint and main control board. With said invention, when switching the main control board, the switch of PCI Express bus will not be changed, but only change direction of service data inside the board devices, to change the hard switch into soft switch, to improve the stability of main control board switch.
Description
Technical field
The present invention relates to network and communications field, relate in particular in the network equipment a kind of based on PCI Express (Peripheral Component Interconnect Express, quick peripheral assembly interconnecting) interface board of bus and the method that this interface board switches between master control borad.
Background technology
Intel has formally announced PCI Express bus in spring calendar year 2001, is the third generation local bus technology that replaces PCI (PeripheralComponent Interconnect, periphery component interconnection) bus.One road PCI Express serial bus signal is made up of two pairs of differential signals of sending and receiving, and bandwidth is 2.5Gbps (Gigabits per second).Characteristics such as holding wire is few because PCI Express universal serial bus has, bandwidth is big, point-to-point transmission, the application in network, communication equipment is more and more.
In the dual master control network equipment, between main control board and the interface board, connect with PCI Express bus between slave control board and the interface board based on PCI Express bus.When the main control board operate as normal, interface board by with main control board between be connected and finish Business Processing; After main control board breaks down, learn that the slave control board of this fault upgrades to main control board, interface board connects the former slave control board switch to after the upgrading with PCI Express bus and proceeds Business Processing.
In the dual master control network equipment, the typical way that bus is connected between interface board and main control board, the slave control board as shown in Figure 1.Interface board comprises PCI Express Endpoint (quick peripheral assembly interconnecting terminal equipment) and Mux (Multiplexor, multiplexer).Endpoint is the terminal equipment on the PCI Express bus, can regard butt joint as and finish the abstract of the chip of business function or chip and elements combination on the oralia.Mux is a kind of of PCI Express universal serial bus switch, can realize 2 road to 1 tunnel gating function by switching gating control signal sel.
In main control board and slave control board inside, CPU (Central Process Unit, central processing unit) system generally includes CPU and PCI Express RC (Root Complex, the root multiplexer), wherein RC is used for finishing initialization and total line traffic control of a plurality of terminal equipments that PCI Express connected.Cpu system is connected to Mux on each interface board by PCI Express Bridge (bridge) on the master control borad or PCI Express Switch (exchange chip), make and between cpu system on the master control borad and the Endpoint on the interface board, can form a bus run, so that cpu system and EndPoint collaborative work, the business function of realization interface board.
Be connected by PCI Express circuit between the PCI ExpressBridge/Switch between Mux on the interface board and the Endpoint, on Mux and the master control borad, can be an independently PCI Express circuit, also can be many PCI Express circuits in logic that independently form behind the PCI Express line bundle with bigger bandwidth.
In the prior art, adopt the universal serial bus switch on the interface board, realize and being connected of main control board and slave control board as Mux.This universal serial bus switch is a kind of electronic switch of multiselect one, decides the physical link with PCI Express bus on this interface board with which master control borad to be connected according to the operating state of two master control borads.For the master control borad that does not connect owing to disconnect with this interface board physically, this interface board and on Endpoint be sightless.
Before the PCI Express Endpoint that is linked into certain cpu system can operate as normal, need carry out initialization to it by the RC of this cpu system.Like this, in the prior art, when interface board after former main control board fault, when connection is switched to current main control board after the upgrading, RC on the current main control board need to this interface board and on Endpoint carry out initialization again, otherwise the cpu system on the current main control board and this Endpoint can't visit mutually.The register of Endpoint inside can be modified to initial value in initialization procedure, has reduced the stability of interface board work, and reliability is low; This initialization procedure also can increase the time that the network equipment carries out failover simultaneously.
Summary of the invention
The present invention will solve is to influence job stability and reliability problems in the prior art during interface board switching main-control board.
Of the present invention kind of interface board based on PCI Express, comprise terminal equipment Endpoint, and passing through the bus interface unit that PCI Express bus connects at least two master control borads and Endpoint, described bus interface unit comprises address mapping module and mapping isolation module, wherein:
Address mapping module is used for setting up and safeguard the map addresses between Endpoint and at least two master control borads;
The address isolation module is used for isolating and recovers map addresses between Endpoint and master control borad.
Preferably, described address mapping module set up by the address transition mode and non-current master control borad between map addresses; Described current master control borad is the master control borad that carries out Business Processing with this Endpoint.
Preferably, described interface board comprises that also bus connects control unit, is used to refer to the map addresses between address isolation module isolation Endpoint and current master control borad, and recovers the map addresses between Endpoint and another master control borad; Described current master control borad is the master control borad that carries out Business Processing with this Endpoint.
Preferably, described bus connects the instruction of control unit according to master control borad, and indication address isolation module is isolated the map addresses between Endpoint and current master control borad, and recovers the map addresses between Endpoint and another master control borad.
Preferably, described interface board also comprises the master control board state unit, is used for receiving the work state information of each master control borad;
Described bus connects the operating state of control unit according to master control borad, and indication address isolation module is isolated the map addresses of Endpoint and described fault master control borad when current master control borad breaks down, and recovers the map addresses of Endpoint and another master control borad.
Preferably, described bus interface unit is realized by the PCI Express exchange chip Switch with address translation feature.
The invention provides a kind of method of the interface board switching main-control board based on PCI Express, described interface board is connected with at least two master control borads respectively by PCI Express bus, and this method may further comprise the steps:
Map addresses on the isolating interface plate between PCI Express terminal equipment Endpoint and non-current master control borad; Described current master control borad is for carrying out the master control borad of Business Processing to this Endpoint;
When current master control borad switches, isolate the map addresses between the preceding current master control borad of this Endpoint and switching, and recover the map addresses between the current master control borad of this Endpoint and switching back.
Preferably, described method also comprises: set up the map addresses between Endpoint and non-current master control borad on the interface board in the address transition mode.
Preferably, described method also comprises: master control borad instruction interface plate switches to another master control borad with Business Processing.
Preferably, described method also comprises: detect the operating state of current master control borad, the Business Processing with interface board when current master control borad breaks down switches to another master control borad.
Among the present invention, interface board keep with each master control borad between bus be connected, switch the master control borad that carries out Business Processing with interface board by map addresses between isolation and recovery Endpoint and the master control borad, the switching of master control borad is finished by the change business datum flow direction, no longer need connected sum to cut off the physical connection of PCI Express bus, increase the reliability of switching, also made interface board work more stable; Can also shorten simultaneously master control borad and switch the required time.
Description of drawings
Fig. 1 is the exemplary plot that bus is connected between interface board and main control board, the slave control board in the prior art;
Fig. 2 is the structural representation of interface card of the present invention;
Fig. 3 is the functional schematic of bus interface unit on the interface card of the present invention;
Fig. 4 is for using the realization example figure of the dual master control network equipment of the present invention;
Fig. 5 is the flow chart of the method for interface board switching main-control board of the present invention.
Embodiment
In the prior art, when the Endpoint on the butt joint of the cpu system on the master control borad oralia carries out initialization, in the cpu system of master control borad,, between each control register, buffer and the master control borad cpu system institute addresses distributed space of this Endpoint inside, set up mapping relations for this Endpoint distributes a sector address space.As CPU during to the write operation of wherein certain address, the result of write operation can be reflected in equally with this address to be had in the Endpoint internal register of mapping relations; This Endpoint also is so to the write operation of its internal register, can be reflected in equally with this register to have in the address space of master control borad cpu system of mapping relations.By the mode of map addresses, cpu system can be in its address space and Endpoint interaction data and control information, assists Endpoint to finish every business function of interface board.
For master control borad, after Endpoint finished map addresses, this Endpoint and its cpu system promptly were in connection status, and cpu system at any time can be according to mode of operation and this Endpoint collaborative work of this Endpoint under the normal condition.At this moment, if isolate the map addresses of Endpoint and master control borad, promptly the variation of Endpoint register is not reflected in the master control borad address space that has mapping relations with it, also the master control borad cpu system is not informed simultaneously the register of Endpoint to the operation in this sector address space, then at master control borad, this Endpoint still is connected on its PCI Express bus, but the situation of its otherwise processed needing not occur.In like manner, isolate in the cancellation map addresses, after the recovery map addresses was carried out transparent transmission, at master control borad, just the item of its cooperating need to have taken place in this Endpoint.
Surpass in the network equipment of 1 master control borad comprising, the Endpoint on the interface board only cooperates with a master control borad at synchronization and finishes Business Processing, and this master control borad is the current master control borad of this Endpoint.If comprise a plurality of interface boards in the network equipment, these interface boards can only be finished Business Processing by same current master control borad, and other master control borad is in Status of Backups, and this moment, this current master control borad was a main control board, and other master control borads are slave control board; These interface boards also can have different current master control borads, to realize load balancing.
Endpoint on the interface board can be when setting up map addresses with current master control borad and other master control borads also set up map addresses, make current master control borad and other master control borads all this Endpoint be regarded as the terminal equipment on its PCI Express bus.And set up map addresses between non-current master control borad and can be undertaken, for example can adopt the non-transparent bridge function of the PEX8508 of PLX company chip to realize by address transition mode of the prior art.
During current master control borad operate as normal, the map addresses on the interface board division board between Endpoint and other master control borads, this Endpoint and current master control borad are finished Business Processing; When the current master control borad of generation switches, if the map addresses between isolation and former current master control borad cpu system, and the map addresses between the current master control borad after recovery and the switching, just the Business Processing of this Endpoint can be taken over seamlessly to new current master control borad.
Interface board based on PCI Express of the present invention can have structure shown in Figure 2, on the interface board 200, bus interface unit 210 comprises interconnective address isolation module 211 and address mapping module 212, and address isolation module 211 is connected with Endpoint 220 by PCI Express bus run; Bus connects control unit 230 and is connected with bus interface unit 210, master control board state unit 240 respectively by control channel.The address isolation module 211 of interface board 200 is connected with master control borad 110, master control borad 120 respectively with PCI Express bus; Master control borad 110 is connected with master control board state unit 240 by control channel with 120, can also be connected control unit 230 with bus by control channel and connect.
The map addresses that address isolation module 211 is isolated between Endpoint 220 and the non-current master control borad, after the indication that receives the current master control borad of change, address isolation module 211 switches the map addresses of being isolated according to indication, promptly isolate and current master control borad between map addresses, and cancellation is isolated the map addresses of another master control borad, revert to normal map addresses, after this this master control borad promptly moves as the next current master control borad of Endpoint220.Isolate map addresses and can adopt the address transition mode to realize equally, can adopt the non-transparent bridge mode to realize in addition.
Bus connects control unit 230 and is used for indicating when change takes place the current master control borad of Endpoint 220 isolation module 211 pairs of map addresses isolation in address to make corresponding change.Bus connects the change that control unit 230 can be known current master control borad in several ways, includes but not limited to following severally, is that master control borad 110 is that example describes with before changing current master control borad:
One connects control unit 230 by master control borad notice bus and carries out the master control borad switching.Bus connects control unit 230 and is connected with master control borad by control channel, and master control borad can instruct Endpoint 220 to change master control borads by control channel; The indication that current master control borad, non-current master control borad can change master control borad by this instruction mode docking port card 200.When a plurality of non-current master control borad, master control borad can also be specified current master control borad after changing.
Its two, carry out master control borad automatically according to the state of current master control borad and switch.This mode need increase master control board state unit 240 on interface board 200, be used for receiving the real-time status information of each master control borad output.Bus connects the control information that control unit 230 reads master control board state unit 240, when current master control borad 110 breaks down, bus connects the map addresses of control unit 230 indication address isolation modules 211 isolation and master control borad 110, and the map addresses of recovery and master control borad 120, current master control borad is switched to master control borad 120.
In addition, current master control borad can also directly be indicated the current master control borad of address isolation module 211 changes.Because bus interface unit 210 also can be used as the Endpoint on the interface card 200, and also can have address mapping relation between the master control borad 110.At this moment, master control borad 110 can be by the mode instruction interface card 200 change master control borads that isolation module 211 registers in address directly carried out write operation; Because the map addresses of non-current master control borad is in isolation, this instruction mode can only be undertaken by current master control borad.
On function, the bridge that bus interface unit is equivalent in inside will to lead to shared bus each master control borad address space and Endpoint address space is connected, and will be with the bridge that the leads to Endpoint root as this shared bus, as shown in Figure 3.If bus interface unit is connected two master control borads by PCI Express circuit 0 respectively with PCI Express circuit 1, connect Endpoint by PCI Express circuit 2, all the time be in connected state though connect the bridge of PCI Express circuit 2 with the bridge that is connected PCI Express circuit 0 and PCIExpress circuit 1, but based on the character of shared bus, synchronization connect PCI Express circuit 2 bridge can only with the bridge that is connected PCI Express circuit 0 and PCI Express circuit 1 in one carry out data interaction.When master control borad taking place switch, variation has taken place in the bridge that is equivalent to take shared bus.
Like this, Bus Interface Unit is equivalent to provide many up links of leading to each master control borad for Endpoint, indication according to default setting, bus interface unit or current master control borad decides the business datum of Endpoint to adopt which bar up link, arrives the master control borad that this up link connects.The switching of master control borad no longer be in the prior art with the break-make of master control borad physical link, and become the variation of data flow in the Bus Interface Unit.
Bus interface unit can be realized by the PCI Express Switch (exchange chip) with address translation feature.When the present invention is applied to comprise the dual master control network equipment of main control board and slave control board, this network equipment can adopt structure shown in Figure 4 to realize, should with in the example with PCI Express Switch with address translation feature as bus interface unit.
On main control board and slave control board, except that the PCI ExpressSwitch of cpu system and connecting interface card, also comprise Digital Logical Circuits, as CPLD (Complex Programmable LogicDevice, programmable logic device), be used for exchanging the running state parameter of local terminal master control borad and opposite end master control borad, the cpu system when the opposite end main control unit breaks down on the notice local terminal master control borad.The Digital Logical Circuits of main control board and slave control board comes to send to the opposite end operating state of local terminal by holding wire Online, M_S and Work, wherein signal Online shows whether the local terminal master control borad is online, signal M_S shows that current local terminal master control borad is to be main control board or slave control board, and signal Work shows whether local terminal work is normal.Simultaneously, two master control borads receive the corresponding running state parameter of opposite end master control borad by Mate_Online, Mate_M_S and the Mate_Work holding wire of correspondence, and judge the running status of opposite end by these parameters.
On interface board, the bus of interface board connection control unit and master control board state unit are realized as CPLD by Digital Logical Circuits.The running state parameter of main control board and slave control board has also offered the Digital Logical Circuits on the interface board by Online, M_S and Work holding wire simultaneously.Digital Logical Circuits on the interface board produces gating signal sel according to the running state parameter of two master control borads, exports the PCI Express Switch on the interface board to.PCI Express Switch foundation and main control board and and slave control board between map addresses, according to gating signal sel and the map addresses of main control board and and the map addresses of slave control board between select one to isolate.
When network equipment electrifying startup, at first to carry out active and standby arbitration.This moment can be with slot number as referee conditions, and the less master control borad of slot number is set to main control board, and the master control borad that slot number is bigger is set to slave control board.Master control borad is learnt the running status of opposite end master control borad by reading the opposite end status register in the Digital Logical Circuits, and the running state parameter of local terminal is offered the opposite end by Digital Logical Circuits, also offers interface board simultaneously.
In case slave control board is found the main control board operation irregularity, interrupt reporting the cpu system of local terminal and upgrading to main control board with triggering; Interface board also will learn that main control board switches according to the current running state parameter of two master control borads this moment, then the sel signal of Digital Logical Circuits output will be controlled the map addresses of PCIExpress Switch isolation and former main control board, and the map addresses of the main control board after recovery and the upgrading, switch thereby finish interface board to the Business Processing of master control borad.
Among the present invention, as shown in Figure 5 based on the flow process of the method preferred embodiment of the interface board switching main-control board of PCI Express.Interface board is connected with at least two master control borads by PCI Express bus, and one of them is the current master control borad of interface board.The detailed description of relevant each step sees also the explanation of aforementioned butt joint oralia, no longer repeats herein.
At step S510, set up the map addresses between Endpoint and current master control borad on the interface board.This step is same as the prior art.
At step S520, set up the map addresses between Endpoint and non-current master control borad.And the map addresses between non-current master control borad can adopt the address transition mode to set up.
At step S530, the map addresses on the isolating interface plate between Endpoint and non-current master control borad, the Business Processing of Endpoint is by finishing with the map addresses of current master control borad on the interface board.
At step S540, current master control borad switches.Interface board can learn in several ways that current master control borad switches, and for example can substitute own next current master control borad as this interface board with other master control borads by current master control borad indication interface board; Also can change current master control borad by non-current master control borad indication interface board; Can also monitor the running status of current master control borad by interface board, initiatively find the fault of current master control borad or the promotion and demotion of main control board and slave control board.
At step S550, after interface board learns that current master control borad switches, Endpoint and the map addresses of switching preceding current master control borad on the division board, and recover this Endpoint and the map addresses of switching the current master control borad in back, Business Processing is switched on the new current master control borad carry out.
After using the present invention, when master control borad switches, the break-make variation of PCI Express bus on physical connection in the prior art no longer takes place, and just need the flow direction of the business datum of device inside on the change interface board to get final product, direct-cut operation of the prior art is become soft handover, not only make interface board work more stable, also increased the reliability that master control borad switches.
Above-described embodiment of the present invention does not constitute the qualification to protection range of the present invention.Any modification of being done within the spirit and principles in the present invention, be equal to and replace and improvement etc., all should be included within the claim protection range of the present invention.
Claims (9)
1. interface board based on quick peripheral assembly interconnecting PCI Express, comprise terminal equipment Endpoint, and the bus interface unit that connects at least two master control borads and Endpoint by PCI Express bus, and bus connects control unit, it is characterized in that, described bus interface unit comprises address mapping module and mapping isolation module, wherein:
Address mapping module is used for setting up and safeguard the map addresses between Endpoint and at least two master control borads;
The address isolation module is used for isolating and recovers map addresses between Endpoint and master control borad;
Bus connects control unit and is used for when current master control borad switches, and indication address isolation module is isolated the map addresses between Endpoint and current master control borad, and recovers the map addresses between Endpoint and another master control borad; Described current master control borad is the master control borad that carries out Business Processing with this Endpoint.
2. according to claim 1 based on the interface board of PCI Express, it is characterized in that: described address mapping module set up by the address transition mode and non-current master control borad between map addresses.
3. according to claim 1 based on the interface board of PCI Express, it is characterized in that: described bus connects the instruction of control unit according to master control borad, indication address isolation module is isolated the map addresses between Endpoint and current master control borad, and recovers the map addresses between Endpoint and another master control borad.
As described in claim 1 or 3 based on the interface board of PCI Express, it is characterized in that: described interface board also comprises the master control board state unit, is used for receiving the work state information of each master control borad;
Described bus connects the operating state of control unit according to master control borad, and indication address isolation module is isolated the map addresses of Endpoint and described fault master control borad when current master control borad breaks down, and recovers the map addresses of Endpoint and another master control borad.
5. according to claim 1 based on the interface board of PCI Express, it is characterized in that: described bus interface unit is realized by the PCI Express exchange chip Switch with address translation feature.
6. method based on the interface board switching main-control board of quick peripheral assembly interconnecting PCI Express, described interface board is connected with at least two master control borads respectively by PCI Express bus, it is characterized in that, may further comprise the steps:
Set up the map addresses between PCI Express terminal equipment Endpoint on the interface board and at least two master control borads;
Map addresses on the isolating interface plate between PCI Express terminal equipment Endpoint and non-current master control borad; Described current master control borad is for carrying out the master control borad of Business Processing to this Endpoint;
When current master control borad switches, isolate the map addresses between the preceding current master control borad of this Endpoint and switching, and recover the map addresses between the current master control borad of this Endpoint and switching back.
As described in the claim 6 based on the method for the interface board switching main-control board of PCI Express, it is characterized in that described method also comprises: set up the map addresses between Endpoint and non-current master control borad on the interface board in the address transition mode.
As described in claim 6 or 7 based on the method for the interface board switching main-control board of PCI Express, it is characterized in that described method also comprises: master control borad indication interface board switches to another master control borad with Business Processing.
As described in claim 6 or 7 based on the method for the interface board switching main-control board of PCI Express, it is characterized in that, described method also comprises: detect the operating state of current master control borad, the Business Processing with interface board when current master control borad breaks down switches to another master control borad.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2006101277178A CN1909559B (en) | 2006-08-30 | 2006-08-30 | Interface board based on rapid periphery components interconnection and method for switching main-control board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2006101277178A CN1909559B (en) | 2006-08-30 | 2006-08-30 | Interface board based on rapid periphery components interconnection and method for switching main-control board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1909559A CN1909559A (en) | 2007-02-07 |
| CN1909559B true CN1909559B (en) | 2010-04-14 |
Family
ID=37700547
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2006101277178A Active CN1909559B (en) | 2006-08-30 | 2006-08-30 | Interface board based on rapid periphery components interconnection and method for switching main-control board |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN1909559B (en) |
Families Citing this family (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101052013B (en) * | 2007-05-22 | 2011-09-28 | 杭州华三通信技术有限公司 | Method and system for realizing network equipment internal managing path |
| CN101102177B (en) * | 2007-08-20 | 2010-11-10 | 杭州华三通信技术有限公司 | An implementation method and device for switching master and slave controller |
| CN101150527B (en) * | 2007-11-09 | 2010-09-01 | 杭州华三通信技术有限公司 | A PCIE data transmission method, system and device |
| CN101483529B (en) * | 2009-02-13 | 2011-06-22 | 北京星网锐捷网络技术有限公司 | Modularized switch and operating method thereof |
| CN101710314B (en) * | 2009-11-17 | 2013-02-27 | 中兴通讯股份有限公司 | High-speed peripheral component interconnection switching controller and realizing method thereof |
| JP5796139B2 (en) | 2012-10-26 | 2015-10-21 | 華為技術有限公司Ｈｕａｗｅｉ Ｔｅｃｈｎｏｌｏｇｉｅｓ Ｃｏ．，Ｌｔｄ． | PCIE switch-based server system, switching method, and device |
| CN104125174A (en) * | 2013-04-24 | 2014-10-29 | 上海斐讯数据通信技术有限公司 | Data transmission method for stacked switching system |
| CN104243307B (en) * | 2014-09-05 | 2017-10-27 | 新华三技术有限公司 | The network equipment and the PHY chip access method for the network equipment |
| CN104301145B (en) * | 2014-10-20 | 2018-03-23 | 新华三技术有限公司 | The network equipment and the control serial ports collocation method for the network equipment |
| CN104410510B (en) * | 2014-10-24 | 2018-07-03 | 华为技术有限公司 | Pass through the method, apparatus and system of interface card transmission information |
| CN106487721B (en) * | 2015-08-25 | 2019-10-08 | 新华三技术有限公司 | The network equipment and for the message forwarding method in the network equipment |
| CN105429902B (en) * | 2015-11-10 | 2018-07-31 | 上海斐讯数据通信技术有限公司 | A kind of dual master control plate network system |
| CN106059791B (en) * | 2016-05-13 | 2020-04-14 | 华为技术有限公司 | Link switching method of service in storage system and storage device |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1078317A1 (en) * | 1998-05-14 | 2001-02-28 | Motorola, Inc. | Method for switching between multiple system processors |
| CN1430144A (en) * | 2001-12-31 | 2003-07-16 | 深圳市中兴通讯股份有限公司上海第二研究所 | Method of multiplexing peripheral PCI equipment by multiprocessor |
| CN1747453A (en) * | 2005-10-25 | 2006-03-15 | 杭州华为三康技术有限公司 | Integrated router based on PCI Express bus |
| CN1753376A (en) * | 2005-10-27 | 2006-03-29 | 杭州华为三康技术有限公司 | Biprimary controlled network equipment and its master back-up switching method |
-
2006
- 2006-08-30 CN CN2006101277178A patent/CN1909559B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1078317A1 (en) * | 1998-05-14 | 2001-02-28 | Motorola, Inc. | Method for switching between multiple system processors |
| CN1430144A (en) * | 2001-12-31 | 2003-07-16 | 深圳市中兴通讯股份有限公司上海第二研究所 | Method of multiplexing peripheral PCI equipment by multiprocessor |
| CN1747453A (en) * | 2005-10-25 | 2006-03-15 | 杭州华为三康技术有限公司 | Integrated router based on PCI Express bus |
| CN1753376A (en) * | 2005-10-27 | 2006-03-29 | 杭州华为三康技术有限公司 | Biprimary controlled network equipment and its master back-up switching method |
Also Published As
| Publication number | Publication date |
|---|---|
| CN1909559A (en) | 2007-02-07 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN1909559B (en) | Interface board based on rapid periphery components interconnection and method for switching main-control board | |
| CN101710314B (en) | High-speed peripheral component interconnection switching controller and realizing method thereof | |
| CN100444145C (en) | Dynamic reconfiguration of PCI EXPRESS links | |
| CN101102177B (en) | An implementation method and device for switching master and slave controller | |
| CN101398801B (en) | Method and device for expanding internal integrate circuit bus | |
| CN101645915B (en) | Disk array host channel daughter card, on-line switching system and switching method thereof | |
| CN103729333A (en) | Backplane bus structure sharing multiple channel time slots and implementation method thereof | |
| CN1331054C (en) | Data bus apparatus and control method for effectively compensating fault signal line | |
| CN102724093A (en) | Advanced telecommunications computing architecture (ATCA) machine frame and intelligent platform management bus (IPMB) connection method thereof | |
| CN115550291B (en) | Switch reset system and method, storage medium, and electronic device | |
| CN107807630A (en) | A kind of method for handover control of master/slave device, its handover control system and device | |
| CN102763087B (en) | Method and system for realizing interconnection fault-tolerance between CPUs | |
| KR102033112B1 (en) | Peripheral Component Interconnect Express switch apparatus and method for controlling connection using the same | |
| US6715019B1 (en) | Bus reset management by a primary controller card of multiple controller cards | |
| CN117149674A (en) | Multi-host PCIe (peripheral component interconnect express) interconnection structure for embedded real-time scene | |
| US20040078620A1 (en) | Equipment protection using a partial star architecture | |
| CA2434899C (en) | Fault tolerance | |
| US20050060394A1 (en) | Programmable delay, transparent switching multi-port interface line card | |
| CN102521196A (en) | Modbus data acquisition unit | |
| CN104182307A (en) | Serial port redundancy switching method on basis of independent redundancy server | |
| JP5176914B2 (en) | Transmission device and system switching method for redundant configuration unit | |
| CN114138354A (en) | Onboard OCP network card system supporting multi host and server | |
| CN115408318A (en) | High-speed peripheral component interconnection device and operation method thereof | |
| JP2013200616A (en) | Information processor and restoration circuit of information processor | |
| US7187674B2 (en) | Method and apparatus for using adaptive switches for providing connections to point-to-point interconnection fabrics |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CP03 | Change of name, title or address |
Address after: 310052 Binjiang District Changhe Road, Zhejiang, China, No. 466, No. Patentee after: NEW H3C TECHNOLOGIES Co.,Ltd. Address before: 310053 Hangzhou hi tech Industrial Development Zone, Zhejiang province science and Technology Industrial Park, No. 310 and No. six road, HUAWEI, Hangzhou production base Patentee before: HANGZHOU H3C TECHNOLOGIES Co.,Ltd. |
|
| CP03 | Change of name, title or address | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20230609 Address after: 310052 11th Floor, 466 Changhe Road, Binjiang District, Hangzhou City, Zhejiang Province Patentee after: H3C INFORMATION TECHNOLOGY Co.,Ltd. Address before: 310052 Changhe Road, Binjiang District, Hangzhou, Zhejiang Province, No. 466 Patentee before: NEW H3C TECHNOLOGIES Co.,Ltd. |
|
| TR01 | Transfer of patent right |