CN1909037A - Plasma display and plasma display driver and method of driving plasma display - Google Patents

Plasma display and plasma display driver and method of driving plasma display Download PDF

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Publication number
CN1909037A
CN1909037A CNA2006101084353A CN200610108435A CN1909037A CN 1909037 A CN1909037 A CN 1909037A CN A2006101084353 A CNA2006101084353 A CN A2006101084353A CN 200610108435 A CN200610108435 A CN 200610108435A CN 1909037 A CN1909037 A CN 1909037A
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voltage
terminal
transistor
electrode
coupled
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CN100458895C (en
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郑成俊
梁振豪
郑宇埈
金泰城
朴奭裁
金承珉
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Samsung SDI Co Ltd
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Samsung SDI Co Ltd
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
    • G09G3/288—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
    • G09G3/296—Driving circuits for producing the waveforms applied to the driving electrodes

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

A plasma display includes a plurality of scan electrodes. A scan voltage is sequentially supplied to the plurality of scan electrodes, and a non-scan voltage that is higher than the scan voltage is supplied to scan electrodes to which the scan voltage is supplied. The non-scan voltage is generated by dividing a voltage that is higher than the non-scan voltage and the scan voltage. Thus, a voltage source for supplying the non-scan voltage can be eliminated.

Description

Plasma scope and driver thereof and driving method
Technical field
The method that the present invention relates to plasma scope, plasma scope driver and drive plasma scope relates in particular to the driving circuit of the scan electrode that is used to drive plasma scope.
Background technology
Plasma scope is to use the plasma that gas discharge generated in the arc chamber to come the display device of character display or image.Depend on its size, the Plasmia indicating panel of plasma scope (PDP) comprises above tens of to millions of pixels of arranging with matrix pattern.
Frame in the plasma scope is divided into a plurality of sons field.Each son has luminance weights and comprises reset cycle, addressing period and keep the cycle.Reset cycle is used for the state of each arc chamber of initialization.Addressing period is used to select the arc chamber of the central conducting of arc chamber/disconnection, and the cycle of keeping is used to make that the arc chamber of conducting continues discharge so that display image.
In plasma scope,, can between these two electrodes, produce discharge when the voltage difference between two electrodes during greater than predetermined voltage.Recently, had by using negative voltage to reduce the trend of sparking voltage, this is that then sparking voltage is too high because if whole sparking voltages all are set to positive voltage.Then, can reduce sparking voltage by using negative voltage, but because reset cycle, addressing period and the voltage in the cycle of keeping are different, so the number of voltage source has increased.
Summary of the invention
The method that the invention provides the plasma scope that reduces the voltage source number and plasma scope driver and drive this plasma display.
Example embodiment of the present invention is a plasma scope, and it comprises: a plurality of scan electrodes; A plurality of sweep circuits that are couple to a plurality of scan electrodes respectively, each sweep circuit are suitable for voltage with the voltage of first node and Section Point and offer respective scan electrode in a plurality of scan electrodes selectively; Capacitor, it is coupled between first node and the Section Point; The first transistor, it is coupled in Section Point and is suitable for providing between first voltage source of first voltage; Transistor seconds, it is coupled in and is suitable for providing between second voltage source and first node of second voltage, and has the source electrode that voltage is determined by first node; First resistor, it is coupled between the grid of second voltage source and transistor seconds; And second resistor, it is couple to the grid of transistor seconds, and is suitable for first resistor second voltage being carried out dividing potential drop.
Second resistor is preferably between the grid and tertiary voltage source that is coupled in transistor seconds.
The tertiary voltage source is preferably and comprises first voltage source.
Second resistor is preferably between the source electrode of the grid that is coupled in transistor seconds and transistor seconds.
Transistor seconds is preferably the N channel transistor, and second voltage is preferably and is higher than first voltage.
First voltage is preferably negative voltage, and second voltage is preferably ground voltage.
In first resistor and second resistor at least one is preferably and comprises variohm.
This plasma display is preferably also and comprises: be connected in series in diode and the 3rd resistor between the drain electrode of second voltage source and transistor seconds; First resistor is coupled between the grid of the contact of diode and the 3rd resistor and transistor seconds.
Each sweep circuit is preferably and comprises: the 3rd transistor, and it is coupled between first node and the corresponding scan electrode; And the 4th transistor, it is coupled between respective scan electrode and the Section Point.
During addressing period, be preferably the conducting the first transistor, be preferably the 4th transistor in a plurality of sweep circuits of conducting selectively, and be preferably conducting and have the 3rd transistor in the 4th transistorized sweep circuit that ends.
At least a portion in a plurality of sweep circuits is preferably and comprises integrated circuit.
Another example embodiment of the present invention is a kind of method that drives plasma scope, this plasma display comprise a plurality of scan electrodes, a plurality of be couple to the sweep circuit of a plurality of scan electrodes respectively and be coupled in the first terminal and second terminal between capacitor, each sweep circuit offers respective scan electrode in a plurality of scan electrodes selectively with the voltage of the voltage of the first terminal and second terminal, and this driving method comprises: provide first voltage to second terminal; Provide second voltage that is higher than first voltage to the first terminal, come this capacitor charging; Second voltage and capacitor electrode are isolated, thereby the voltage of the first terminal is tertiary voltage; And the tertiary voltage and first voltage are offered a plurality of scan electrodes selectively by the first terminal in a plurality of sweep circuits and second terminal.
Second voltage is preferably and is higher than tertiary voltage.First voltage is preferably negative voltage, and second voltage is preferably ground voltage.
Tertiary voltage and first voltage are offered a plurality of scan electrodes to be preferably and to comprise: sequentially first voltage is offered a plurality of scan electrodes; And tertiary voltage offered those scan electrodes that also do not provide first voltage.
Providing first voltage to be preferably to second terminal comprises: will offer the transistorized grid that its source electrode is couple to the first terminal by the voltage of dividing potential drop between corresponding to the 4th voltage of second voltage and first voltage; Provide second voltage to be preferably to the first terminal and comprise this transistor of conducting; And second voltage and capacitor electrode are isolated be preferably and comprise by this transistor.
Provide first voltage to be preferably to comprise voltage to offer the transistorized grid that its source electrode is couple to the first terminal to second terminal with dividing potential drop between corresponding to the voltage of the 4th voltage of second voltage and the first terminal; Provide second voltage to be preferably to the first terminal and comprise this transistor of conducting; And make second voltage and electric capacity electricity isolate to be preferably to comprise by this transistor.
Another example embodiment of the present invention is the plasma scope driver that is used for plasma scope, this plasma display comprises a plurality of scan electrodes and a plurality of sweep circuit that is couple to a plurality of scan electrodes respectively, each sweep circuit offers respective scan electrode in a plurality of scan electrodes selectively with the voltage of the voltage of the first terminal and second terminal, this plasma display driver comprises: capacitor, and it is coupled between the first terminal and second terminal; The first transistor, it is coupled between second terminal and first voltage source, and is suitable for providing first voltage; And voltage divider, it is coupled between first voltage source and second voltage source, and is suitable for providing second voltage, and the tertiary voltage that will be lower than second voltage outputs to the first terminal.
This voltage divider is preferably and comprises: transistor seconds, its source electrode are couple to the first terminal and its drain electrode is couple to second voltage source; First resistor, it is coupled between the drain electrode of the grid of transistor seconds and transistor seconds; And second resistor, it is coupled between the source electrode of the grid of transistor seconds and the first transistor.
The first transistor is preferably conducting during addressing period.
First voltage is preferably negative voltage, and second voltage is preferably ground voltage.
Another example embodiment of the present invention is the plasma scope driver that is used for plasma scope, this plasma display comprises a plurality of scan electrodes and a plurality of sweep circuit that is couple to a plurality of scan electrodes respectively, each sweep circuit offers respective scan electrode in a plurality of scan electrodes selectively with the voltage of the voltage of the first terminal and second terminal, this plasma display driver comprises: capacitor, and it is coupled between the first terminal and second terminal; The first transistor, it is coupled between second terminal and first voltage source, and is suitable for providing first voltage; And linear regulator, it is coupled between the first terminal and second voltage source, and is suitable for providing second voltage, and the tertiary voltage that will be lower than second voltage outputs to the first terminal.
This linear regulator is preferably and comprises: transistor seconds, its source electrode are couple to the first terminal and its drain electrode is couple to second voltage source; First resistor, it is coupled between the drain electrode of the grid of transistor seconds and transistor seconds; And second resistor, it is coupled between the source electrode of the grid of transistor seconds and transistor seconds.
The first transistor is preferably conducting during addressing period.
First voltage is preferably negative voltage, and second voltage is preferably ground voltage.
Description of drawings
Consider following detailed description in conjunction with the drawings, the present invention becomes and is more readily understood, and therefore more complete evaluation of the present invention and many attendant advantages thereof will become more obvious, and similarly reference symbol is indicated identical or similar parts in the accompanying drawings, wherein:
Fig. 1 is the view of the plasma scope of example embodiment according to the present invention.
Fig. 2 is the drive waveforms of the plasma scope of example embodiment according to the present invention.
Fig. 3,4,6 and 7 is related circuit figure of the Y electrode driver of first to the 4th example embodiment according to the present invention.
Fig. 5 and 8 is respective waveforms of the driving circuit in Fig. 4 and 7.
Embodiment
In the following detailed description, only illustrated and described some example embodiment among the present invention by explanation.Those skilled in the art will recognize, can revise described embodiment in various mode, and all not deviate from spirit of the present invention or scope.
Therefore, it is illustrative in essence that accompanying drawing and description will be considered to, rather than restrictive.Can have the part shown in the accompanying drawing, part perhaps not shown in figures is not because they are necessary to complete understanding of the present invention, so do not discuss in this manual.The unit of similar Reference numeral designate similar.Statement such as " thing is couple to another " can refer to " first directly is couple to second " or " first the 3rd of providing is provided and be couple to second " between them.
The wall electric charge of Miao Shuing is meant near the wall of the arc chamber of each electrode and forms and charges accumulated on this electrode in the present invention.Though the wall electric charge not with the electrode actual contact, this wall electric charge is described as be in " formation " or " accumulation " on the electrode.In addition, wall voltage is the potential difference that is formed between the wall of arc chamber by the wall electric charge.
Fig. 1 is the view of the plasma scope of example embodiment according to the present invention.
As shown in Figure 1, plasma scope comprises plasma display (PDP) 100, controller 200, addressing electrode driver (hereinafter referred to as " A electrode driver ") 300, keeps electrode driver (hereinafter referred to as " X electrode driver ") 400 and scan electrode driver (hereinafter referred to as " Y electrode driver ") 500.
PDP100 comprise a plurality of addressing electrode A1 of extending along column direction to Am (hereinafter referred to as " A electrode ") and a plurality of scan electrode Y1 to Yn and a plurality of electrode X1 that keeps to Xn (being called " Y electrode " and " X electrode " hereinafter), wherein each scan electrode with keep electrode and follow the direction extension.Usually, corresponding X electrode X1 to Xn corresponding to Y electrode Y1 accordingly to Yn.Describing wherein, the subpixel area of the discharge space of A electrode and Y and X electrode crossing has formed arc chamber (hereinafter referred to as " chamber ") 110.
Controller 200 receives external image signal and output drive control signal.Controller 200 is divided into a plurality of son fields with luminance weights with frame.A electrode driver 300, X electrode driver 400 and Y electrode driver 500 according to drive control signal with driving voltage offer respectively A electrode A 1 to Am, X electrode X1 to Xn and Y electrode Y1 to Yn.
Fig. 2 is the drive waveforms of the plasma scope of example embodiment according to the present invention.Among Fig. 2, a son field in a plurality of sons field has been described exemplarily.For convenience's sake, only the drive waveforms that offers Y electrode, X electrode and A electrode has been described with demonstrating in conjunction with a chamber 110 (Fig. 1).
As shown, son is divided into reset cycle, addressing period and keeps the cycle.During reset cycle, Y electrode driver 500 with the Y electrode voltage from voltage V sProgressively be increased to voltage V Set, and A and X electrode driver 300 and 400 offer A and X electrode respectively with ground voltage 0V.Along with the increase of Y electrode voltage, producing weak discharge between Y and the X electrode and between Y and A electrode, and forming (-) wall electric charge on the Y electrode and on X and A electrode, forming (+) wall electric charge.
Subsequently, Y electrode driver 500 with the Y electrode voltage from voltage V sGradually reduce voltage V Nf, X electrode driver 400 is with voltage V simultaneously eOffer the X electrode, and the A electrode voltage is remained on ground voltage 0V place.Then, when the voltage of Y electrode reduces, producing weak discharge between Y and the X electrode and between Y and A electrode, and therefore eliminating at (-) wall electric charge that forms on the Y electrode and (+) wall electric charge of on X and A electrode, forming.Therefore, the wall electric charge that can initialization on the chamber, forms.
Though described in the reset cycle of Fig. 2, come this chamber of initialization by after progressively increasing the Y electrode voltage, gradually reducing the Y electrode voltage, this chamber can be by other remapping method initialization.
During addressing period, Y and A electrode driver 500 and 300 are with voltage V ScLScanning impulse and voltage V aAddressing pulse offer Y electrode and A electrode respectively to select the chamber of conducting.Then, in the chamber that receives scanning impulse and addressing pulse, produce discharge, and therefore, the wall electric charge that this chamber accumulation will be provided with to the chamber of conducting.In addition, Y electrode driver 500 will be higher than voltage V ScLVoltage V ScHOffer the not Y electrode of scanning, and A electrode driver 300 offers unselected A electrode with ground voltage 0V.Voltage V ScHWith voltage V ScLIt can be negative voltage.
More specifically, Y electrode driver 500 with scanning impulse offer first the row in Y electrode (Y1 among Fig. 1).Simultaneously, A electrode driver 300 offers A electrode on the chamber that first row will be switched on addressing pulse.Then, after the generation discharge, between Y electrode and X electrode, produce discharge between the A electrode of Y electrode (Y1) in first row and reception addressing pulse.Therefore, on the Y electrode, form (+) wall electric charge, and on A and X electrode, form (-) wall electric charge.Subsequently, when Y electrode driver 500 offered scanning impulse at Y electrode (Y2 among Fig. 1) on second row, A electrode driver 300 offered A electrode on the chamber that second row will be switched on addressing pulse.Then, in the chamber that intersects by the Y electrode (Y2) in the A electrode that receives this addressing pulse and second row, generate address discharge, and therefore in those chambers, form the wall electric charge in aforesaid mode.About the Y electrode in other row, in the same manner as described above, when promptly delegation (Yn among Fig. 1) sequentially offers the Y electrode with scanning impulse to the end from first row (Y1 Fig. 1), by addressing pulse being offered the A electrode on the chamber that will be switched on, in the chamber that will be switched on, form the wall electric charge.
During the cycle of keeping, because experienced in the addressing period in the chamber (chamber of conducting) of address discharge, the wall electromotive force of Y electrode is higher than the wall electromotive force of X electrode, so Y and X electrode driver 500 and 400 are with voltage V sPulse and ground voltage 0V offer Y and X electrode respectively.Therefore, between the Y of the chamber of conducting and X electrode, produce and keep discharge.By keeping discharge, forming (-) wall electric charge on the Y electrode and on X and A electrode, forming (+) wall electric charge, so that the wall electromotive force of X electrode is higher than the wall electromotive force of Y electrode.
Subsequently, Y and X electrode driver 500 and 400 are with ground voltage 0V and voltage V sPulse offer Y and X electrode respectively, thereby produce the follow-up discharge of keeping.As the result of this discharge, on the Y electrode, form (+) wall electric charge once more, and on X and A electrode, form (-) wall electric charge once more, thereby can pass through voltage V sOffer the Y electrode and produce another and keep discharge.
To alternately with voltage V sPulse offer the Y electrode and voltage V be provided sThe processing of pulse repeat a corresponding number of times of weight with corresponding son field.
Though above-mentioned example embodiment has been described voltage V sThe pulse of keeping offer Y electrode and X electrode successively, but can will cause the voltage difference between Y and X electrode to be followed successively by voltage V sAnd voltage-V sPulse offer Y electrode and/or X electrode.
In addition, though above-mentioned example embodiment has been described in reset cycle and have been removed the wall electric charge and come after the initialization chamber, be set to the chamber of conducting by this chamber of the address discharge in the addressing period, can be in reset cycle the chamber accumulating after the wall electric charge in the chamber that will be set to this conducting, be set to disconnect by this chamber of the address discharge in the addressing period, this chamber.
Next, describe the driving circuit be used to generate the drive waveforms that chooses in the middle of the drive waveforms of Fig. 2 referring to figs. 3 to 8, this drive waveforms is provided for the Y electrode during addressing period.
Fig. 3 is the circuit diagram of the Y electrode driver 500 of first example embodiment according to the present invention.Among Fig. 3, switch is described as the N slot field-effect transistor, replaces the N slot field-effect transistor but can use any other to carry out with intimate switch as described below.In addition, the gate drivers of the grid of driving transistors shown in Figure 3 not.In addition, not shown being used for offers the circuit of Y electrode at reset cycle with reset waveform, and is used for will keeping the circuit that pulse offers the Y electrode in the cycle of keeping, and these circuit are couple to the node N2 among Fig. 3 usually.
As shown in Figure 3, Y electrode driver 500 comprises a plurality of sweep circuits 510 1To 510 nWith scan drive circuit 520, wherein a plurality of sweep circuits 510 1To 510 nBe couple to a plurality of Y electrode Y1 respectively to Yn.For convenience of explanation, only show i the sweep circuit 510 that is couple to i Y electrode among Fig. 3 i
Each sweep circuit 510 iBe coupled between first node N1 and the Section Point N2, and comprise two transistor M1 and M2.The contact of two transistor M1 and M2 is couple to corresponding Y electrode Yi.More specifically, the drain electrode of the source electrode of scan transistor M1 and scan transistor M2 is not couple to Y electrode Yi.Sweep circuit 510 iIn the drain electrode of not scan transistor M1 be couple to first node N1, and sweep circuit 510 iIn the source electrode of scan transistor M2 be couple to Section Point N2.Usually, will be fabricated to scan IC (wherein ' k ' is less than ' n ') with k the sweep circuit that a plurality of Y electrode Y1 answer to k Y electrode pair among the Yn, and the output terminal of scan IC is couple to k Y electrode respectively.If the number of the lead-out terminal of scan IC less than ' n ', then can use them in a plurality of scan ICs of coupled in parallel.First node N1 and Section Point N2 become the input end of scan IC.
Scan drive circuit 520 comprises capacitor C1, transistor Y ScL, and voltage divider 521.Specifically, first end of capacitor C1 is couple to sweep circuit 510 1To 510 nFirst node N1, and second end of capacitor C1 is couple to sweep circuit 510 1To 510 nSection Point N2.Transistor Y ScLDrain electrode be couple to sweep circuit 510 1To 510 nSection Point N2, and transistor Y ScLSource electrode be couple to and be used to provide voltage V ScLVoltage source.
Voltage divider 521 has the output terminal of the first end N1 that is couple to capacitor, and to voltage source V ScVoltage and voltage source V ScLVoltage carry out dividing potential drop, thereby the voltage of institute's dividing potential drop is outputed to this output terminal.Voltage source V ScVoltage be higher than voltage V ScLDiode D1 can be coupled in voltage source V ScAnd between the voltage divider 521, to stop from voltage divider 521 to voltage source V ScThe current path that forms.
The Y electrode driver 500 of second example embodiment according to the present invention is described below with reference to Fig. 4 and Fig. 5.
Fig. 4 is the circuit diagram according to the Y electrode driver 500 of second example embodiment, and Fig. 5 is the waveform of the driving circuit among Fig. 4.Among Fig. 4, earth terminal 0 is as voltage source V ScAmong Fig. 5, high level is corresponding to transistorized conducting state, and low level is corresponding to transistorized cut-off state.
As shown in Figure 4, in second example embodiment, voltage divider 521 ' comprise resistor R 1 and R2 and transistor M3.The source electrode of transistor M3 is couple to the first end N1 of capacitor C1, and the drain electrode of transistor M3 is couple to earth terminal 0.Resistor R 1 is coupled between the drain electrode of the grid of transistor M3 and transistor M3, and resistor R 2 is coupled in transistor Y ScLSource electrode and the grid of transistor M3 between.In addition, resistor R 3 can be coupled between the drain electrode of earth terminal 0 and transistor M3, thereby restriction flows to the electric current of source electrode from the drain electrode of transistor M3.
Referring to Fig. 5, at first, turn-on transistor Y during addressing period ScLThereby the voltage of the second end N2 of capacitor C1 becomes voltage V ScLExpressed as following equation 1, ground voltage 0V and voltage V ScLBy resistor R 1 and R2 dividing potential drop is the grid voltage Vg of transistor M3.In addition, because when voltage not being filled into capacitor C1, the voltage of the first terminal N1 of capacitor C1 becomes voltage V ScLSo the source voltage of transistor M3 becomes voltage V ScLTherefore, the grid-source voltage Vgs of transistor M3 such as following equation 2 are expressed.Then, because transistor M3 is the N channel transistor, so come turn-on transistor M3 by positive grid-source voltage Vgs.Therefore, by earth terminal 0, diode D1, resistor R 3, transistor M3, capacitor C1, transistor Y ScL, and voltage source V ScLThe path capacitor C1 is charged.
Equation 1:
Vg = R 2 R 1 + R 2 | VscL |
Equation 2:
Vgs = ( 1 + R 2 R 1 + R 2 ) | VscL |
Thereby when to the grid-source voltage Vgs of capacitor C1 charging transistor M3 such as equation 3 expressedly less than the threshold voltage V of transistor M3 THThe time, transistor M3 ends.Therefore, the voltage V of the first end N1 of capacitor C1 N1Expressed as equation 4, and this voltage V N1Become voltage V ScHIf by the discharge of capacitor C1, the voltage V of the first end N1 of capacitor C1 N1Reduce, then turn-on transistor M3 once more.Therefore, transistor Y therein ScLDuring the addressing period that is switched on, the voltage that fills into capacitor C1 can maintain the voltage place of expectation.
Equation 3:
Vgs = R 2 R 1 + R 2 | VscL | - V N 1 < V TH
Equation 4:
V N 1 = VscH &ap; R 2 R 1 + R 2 | VscL | - V TH
By the size of control resistor R3, can determine the time of wherein capacitor C1 being charged.In addition, can determine this voltage V by allowing among resistor R 1 and the R2 at least one for variohm and control the size of this variohm ScHSize.
As mentioned above, though first and second example embodiment be described as by to voltage V ScWith voltage V ScLDividing potential drop generates voltage V ScH, but can use other circuit to replace voltage divider to generate voltage V ScH
Fig. 6 be the 3rd example embodiment according to the present invention Y electrode driver 500 ' circuit diagram.
As shown in Figure 6, according to the Y electrode driver 500 of the 3rd example embodiment ' scan drive circuit 520 ' by using linear regulator 522 formation voltage V ScH
Specifically, to be coupled in the first end N1 be sweep circuit 510 to linear regulator 522 iFirst node N1 and voltage source V ScBetween.In addition, diode D1 can be coupled in voltage source V ScAnd between the linear regulator 522, to stop from linear regulator 522 to voltage source V ScThe current path that forms.Linear regulator 522 reduces voltage V Sc, and be lower than voltage V when the voltage of the first end N1 of capacitor C1 ScThe time output voltage V ScH
Fig. 7 be according to the 4th example embodiment Y electrode driver 500 ' circuit diagram, and Fig. 8 is the waveform of the driving circuit among Fig. 7.Among Fig. 7, earth terminal 0 is as voltage source V Sc
As shown in Figure 7, linear regulator 522 ' comprise resistor R 1 ' and R2 ' and transistor M3 '.The source electrode of transistor M3 ' is couple to the first end N1 of capacitor C1, and the drain electrode of transistor M3 ' is couple to earth terminal 0.Between the grid of resistor R 1 ' be coupled in transistor M3 ' and the drain electrode of transistor M3 ', between the source electrode of and resistor R 2 ' be coupled in transistor M3 ' and the grid of transistor M3 '.In addition, resistor R 3 ' can be coupled between the drain electrode of earth terminal 0 and transistor M3 ', thus restriction flows to the electric current of the source electrode of transistor M3 ' from the drain electrode of transistor M3 '.
Referring to Fig. 8, at first, turn-on transistor Y during addressing period ScLThereby the voltage of the second end N2 of capacitor C1 becomes voltage V ScLIn addition, because if also voltage is not charged into capacitor C1, then the voltage of the first end N1 of capacitor C1 is voltage V ScLSo, by resistor R 1 ' and the voltage of R2 ' dividing potential drop become linear regulator 522 ' in the source voltage of transistor M3 '.Therefore, the grid-source voltage Vgs ' of transistor M3 ' is provided by equation 5.Then, because transistor M3 ' is the N channel transistor, so by positive grid-source voltage Vgs ' turn-on transistor M3 '.Therefore, by earth terminal 0, diode D1, resistor R 3 ', transistor M3 ', capacitor C1, transistor Y ScL, and voltage source V ScLThe path capacitor C1 is charged.
Equation 5:
Vgs &prime; = R 2 &prime; R 1 &prime; + R 2 &prime; | VscL |
Thereby when to the grid-source voltage Vgs ' of capacitor C1 charging transistor M3 ' as equation 6 expressedly less than the threshold voltage V of transistor M3 ' THIn ' time, transistor M3 ' ends.As a result, the voltage V of the first end N1 of capacitor C1 N1In equation 7, provide, and this voltage V N1Become voltage V ScHIf by the discharge of capacitor C1, the voltage V of the first end N1 of capacitor C1 N1Reduce, then turn-on transistor M3 ' once more.Therefore, transistor Y therein ScLDuring the addressing period that is switched on, the voltage that charges into capacitor C1 can maintain the voltage place of expectation.
Equation 6:
Vgs &prime; = R 2 &prime; R 1 &prime; + R 2 &prime; | V N 1 | < V TH &prime;
Equation 7:
V N 1 = VscH &ap; - V TH &prime; ( 1 + R 1 &prime; R 2 &prime; )
By the size of control resistor R3 ', can determine the time of wherein capacitor C1 being charged.In addition, can by allow resistor R 1 ' and R2 ' at least one for variohm and control the size of this variohm, determine this voltage V ScHSize.
Though first to the 4th example embodiment has been described voltage V ScHBe set to negative voltage, but by will be from voltage source V ScThe voltage that provides is set to positive voltage, can be with voltage V ScHBe set to positive voltage.Voltage among Fig. 2 V is provided a, V e, or V sVoltage source can be used as this voltage source V Sc
As mentioned above, according to example embodiment of the present invention, can be by using voltage generator, the voltage source V such as voltage divider and linear regulator Sc(earth terminal 0) and voltage source V ScLGenerate voltage V ScHThe voltage that fills into capacitor C1 by use comes the source voltage of oxide-semiconductor control transistors M3 or M3 ', voltage generator formation voltage V ScHTherefore, can be during addressing period with voltage V ScHOffer the Y electrode, and do not need to be used to provide voltage V ScHThe individual voltage source.
Though describe the present invention in detail in conjunction with the current practical demonstration embodiment that thinks, but be to be understood that, the present invention is not limited to disclosed example embodiment, but opposite, and intention contains various modifications and the equivalent arrangements in the spirit and scope that are included in accessory claim.

Claims (25)

1, a kind of plasma scope comprises:
A plurality of scan electrodes;
A plurality of sweep circuits that are couple to a plurality of scan electrodes respectively, each sweep circuit are suitable for voltage with the voltage of first node and Section Point and offer respective scan electrode in a plurality of scan electrodes selectively;
Capacitor, it is coupled between first node and the Section Point;
The first transistor, it is coupled in Section Point and is suitable for providing between first voltage source of first voltage;
Transistor seconds, it is coupled in and is suitable for providing between second voltage source and first node of second voltage, and the voltage of its source electrode is determined by first node;
First resistor, it is coupled between the grid of second voltage source and transistor seconds; And
Second resistor, it is couple to the grid of transistor seconds, and is suitable for first resistor the second voltage dividing potential drop.
2, plasma scope as claimed in claim 1, wherein, second resistor is coupled between the grid and tertiary voltage source of transistor seconds.
3, plasma scope as claimed in claim 2, wherein, the tertiary voltage source comprises first voltage source.
4, plasma scope as claimed in claim 1, wherein, second resistor is coupled between the source electrode of the grid of transistor seconds and transistor seconds.
5, plasma scope as claimed in claim 1, wherein, transistor seconds comprises the N channel transistor, and wherein second voltage is higher than first voltage.
6, plasma scope as claimed in claim 5, wherein, first voltage comprises negative voltage, and wherein second voltage comprises ground voltage.
7, plasma scope as claimed in claim 1, wherein, at least one in first resistor and second resistor comprises variohm.
8, plasma scope as claimed in claim 1 also comprises: be connected in series in diode and the 3rd resistor between the drain electrode of second voltage source and transistor seconds; Wherein first resistor is coupled between the grid of the contact of diode and the 3rd resistor and transistor seconds.
9, plasma scope as claimed in claim 1, wherein each sweep circuit comprises:
The 3rd transistor, it is coupled between first node and the corresponding scan electrode; And
The 4th transistor, it is coupled between respective scan electrode and the Section Point.
10, plasma scope as claimed in claim 9, wherein, during addressing period, the conducting the first transistor, the 4th transistor in a plurality of sweep circuits of conducting, and conducting selectively has the 3rd transistor in the 4th transistorized sweep circuit that ends.
11, plasma scope as claimed in claim 9, wherein, at least a portion in a plurality of sweep circuits comprises integrated circuit.
12, a kind of method that drives plasma scope, this plasma display comprise a plurality of scan electrodes, a plurality of be couple to the sweep circuit of a plurality of scan electrodes respectively and be coupled in the first terminal and second terminal between capacitor, each sweep circuit offers respective scan electrode in a plurality of scan electrodes selectively with the voltage of the voltage of the first terminal and second terminal, and this driving method comprises:
Provide first voltage to second terminal;
Provide second voltage that is higher than first voltage to the first terminal, come this capacitor charging;
Second voltage and capacitor electrode are isolated, thereby the voltage of the first terminal is tertiary voltage; And
By the first terminal in a plurality of sweep circuits and second terminal tertiary voltage and first voltage are offered a plurality of scan electrodes selectively.
13, method as claimed in claim 12, wherein, second voltage is higher than tertiary voltage.
14, method as claimed in claim 13, wherein, first voltage comprises negative voltage, and second voltage comprises ground voltage.
15, method as claimed in claim 12 wherein, offers a plurality of scan electrodes with tertiary voltage and first voltage and comprises:
Sequentially first voltage is offered a plurality of scan electrodes; And
Tertiary voltage is offered those scan electrodes that also do not provide first voltage.
16, method as claimed in claim 12, wherein,
Provide first voltage to comprise to second terminal: will offer the transistorized grid that its source electrode is couple to the first terminal by the voltage of dividing potential drop between corresponding to the 4th voltage of second voltage and first voltage;
Provide second voltage to comprise turn-on transistor to the first terminal; And
Second voltage and electric capacity electricity is isolated to be comprised by this transistor.
17, method as claimed in claim 12, wherein:
Provide first voltage to comprise to second terminal: will offer the transistorized grid that its source electrode is couple to the first terminal by the voltage of dividing potential drop between corresponding to the voltage of the 4th voltage of second voltage and the first terminal;
Provide second voltage to comprise this transistor of conducting to the first terminal; And
Second voltage and electric capacity electricity is isolated to be comprised by this transistor.
18, a kind of plasma scope driver that is used for plasma scope, this plasma display comprises a plurality of scan electrodes and a plurality of sweep circuit that is couple to a plurality of scan electrodes respectively, each sweep circuit offers respective scan electrode in a plurality of scan electrodes selectively with the voltage of the voltage of the first terminal and second terminal, and this plasma display driver comprises:
Capacitor, it is coupled between the first terminal and second terminal;
The first transistor, it is coupled between second terminal and first voltage source, and is suitable for providing first voltage; And
Voltage divider, it is coupled between first voltage source and second voltage source, and is suitable for providing second voltage, and the tertiary voltage that will be lower than second voltage outputs to the first terminal.
19, plasma scope driver as claimed in claim 18, wherein this voltage divider comprises:
Transistor seconds, its source electrode are couple to the first terminal and its drain electrode is couple to second voltage source;
First resistor, it is coupled between the drain electrode of the grid of transistor seconds and transistor seconds; And
Second resistor, it is coupled between the source electrode of the grid of transistor seconds and the first transistor.
20, plasma scope driver as claimed in claim 18, wherein, the first transistor is suitable for conducting during addressing period.
21, plasma scope driver as claimed in claim 20, wherein, first voltage comprises negative voltage, and second voltage comprises ground voltage.
22, a kind of plasma scope driver that is used for plasma scope, this plasma display comprises a plurality of scan electrodes and a plurality of sweep circuit that is couple to a plurality of scan electrodes respectively, each sweep circuit offers respective scan electrode in a plurality of scan electrodes selectively with the voltage of the voltage of the first terminal and second terminal, and this plasma display driver comprises:
Capacitor, it is coupled between the first terminal and second terminal;
The first transistor, it is coupled between second terminal and first voltage source, and is suitable for providing first voltage; And
Linear regulator, it is coupled between the first terminal and second voltage source, and is suitable for providing second voltage, and the tertiary voltage that will be lower than second voltage outputs to the first terminal.
23, plasma scope driver as claimed in claim 22, wherein this linear regulator comprises:
Transistor seconds, its source electrode are couple to the first terminal and its drain electrode is couple to second voltage source;
First resistor, it is coupled between the drain electrode of the grid of transistor seconds and transistor seconds; And
Second resistor, it is coupled between the source electrode of the grid of transistor seconds and transistor seconds.
24, plasma scope driver as claimed in claim 23, wherein, the first transistor is suitable for conducting during addressing period.
25, plasma scope driver as claimed in claim 24, wherein, first voltage comprises negative voltage, and second voltage comprises ground voltage.
CNB2006101084353A 2005-08-02 2006-08-02 Plasma display and plasma display driver and method of driving plasma display Expired - Fee Related CN100458895C (en)

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