CN1893696A - Method for controlling double-mode terminal and between its internal chips - Google Patents
Method for controlling double-mode terminal and between its internal chips Download PDFInfo
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- CN1893696A CN1893696A CNA2005100803913A CN200510080391A CN1893696A CN 1893696 A CN1893696 A CN 1893696A CN A2005100803913 A CNA2005100803913 A CN A2005100803913A CN 200510080391 A CN200510080391 A CN 200510080391A CN 1893696 A CN1893696 A CN 1893696A
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Abstract
The invention discloses a terminal in dual modes, and control and comm. method for between inner chips. The mobile comm. terminal in dual modes includes first chip and second chip with serial port of comm. transceiver respectively. First chip is in use for first comm. mode and runs man-machine interface. Second chip is in use for second comm. mode. POWERON, IRQP, GREADY as output signals in first chip are realized by using GPIO. IRQG, PREADY, WORKINGDET are output signals. IRQG is realized by using falling edge to trigger interrupt. PREADY, WORKINGDET are realized by using GPIO. IRQG, PREADY, WORKINGDET as output signal in second chip are realized through GPIO. POWERON, IRQP, GREADY are as input signals. IRQP is realized by using falling edge to trigger interrupt.
Description
Technical field
The present invention relates to the dual-mode terminal technology in the wireless communication field, specifically, relate to control of different systems intermodule and method for communicating in the dual-mode terminal.
Background technology
The variation of existing mobile network's technology standard brings the differentiation of user terminal, along with increasing of many card users, the user produces naturally increases terminal standard tenability to reduce the demand that terminal is carried number, and the multimode multifrequency has become one of developing direction of future mobile communications terminal.Bimodulus product with network handoff functionality is very attractive, and the purpose that develops this dual-mode terminal is by improving the standard tenability of mobile phone, reduce difficulty and cost that the user is switched between the different systems service.
From technical standpoint, two kinds of standards on the mobile phone are wanted to realize to work simultaneously, a kind of mode is to adopt the core nest plate of integrating highly and support that two kinds of standards are worked simultaneously, and another kind of mode is to dispose two standalone modules of supporting different systems on terminal.Commercial at present few of nest plate described in first kind of mode, and the mode combinations of supporting is limited; For the second way, the communication standard that often needs the user manually to select needs to use.Such manual switching seems more loaded down with trivial details, it is convenient inadequately to use.
Summary of the invention
Technical problem to be solved by this invention provides control and method for communicating between a kind of dual-mode terminal and inside chip thereof.To improve the multi-modulation scheme tenability of mobile phone.
For solving the problems of the technologies described above, it is as follows to the invention provides scheme:
A kind of bimodule mobile communication terminal comprises first chip and second chip, has serial communication transmitting-receiving port respectively, and wherein said first chip is used for first communication pattern, and operation has man-machine interface, and described second chip is used for the second communication pattern, wherein,
Described first chip also has:
The first control signal output ends mouth is in order to output electrifying startup signal;
The second control signal output ends mouth wakes up/sleep signal in order to output;
The 3rd control signal output ends mouth is in order to outputting communication permission/inhibit signal;
Four-way letter signal input port wakes up/sleep signal in order to input;
Five-way letter signal input port is in order to incoming traffic permission/inhibit signal;
The 6th signal of communication input port is in order to input warm reset signal;
Described second chip also has:
The first signal input end mouth is in order to import the electrifying startup signal of first control signal output ends mouth output in described first chip;
The second signal input end mouth wakes up/sleep signal in order to the output of importing the second control signal output ends mouth in described first chip;
The 3rd signal input end mouth is in order to import the communication permission/inhibit signal of the 3rd control signal output ends mouth output in described first chip;
Four-way letter signal output port wakes up/sleep signal in order to the input of the letter of four-way in described first chip signal input port;
Five-way letter signal output port is in order to the letter of five-way in described first chip signal input port incoming traffic permission/inhibit signal;
The 6th signal of communication output port is in order to the input of the 6th signal of communication input port in described first chip warm reset signal.
Terminal of the present invention, wherein, the input signal employing trailing edge triggering interruption realization of the second signal input end mouth in four-way letter signal input port and described second chip in described first chip.
Terminal of the present invention, wherein, the first control signal output ends mouth, the second control signal output ends mouth, the 3rd control signal output ends mouth, five-way letter signal input port in described first chip, the first signal input end mouth, the 3rd signal input end mouth in the 6th signal of communication input port and described second chip, four-way letter signal output port, five-way letter signal output port, the signal of the 6th signal of communication output port adopts general I/O to realize.
Terminal of the present invention, wherein, described electrifying startup signal high level is represented start, low level is represented shutdown.
Terminal of the present invention, wherein, described sleep-awake signal high level is represented to enter sleep pattern, and low level is represented wake-up signal.
Terminal of the present invention, wherein, described warm reset signal high level is represented normal condition, low level is represented warm reset.
Realize control and method for communicating between terminal chips of the present invention, comprising:
Described second chip power of described first chip controls starts and configuration parameter;
When described first chip when second chip is initiated communication request, first chip wakes second chip up by described waking up/sleep signal, after second chip was replied first chip by permissions/inhibit signal, first chip began to second chip transmission communications command;
When described second chip when first chip is initiated communication request, second chip wakes first chip up by described waking up/sleep signal, after first chip was replied second chip by permissions/inhibit signal, second chip began to first chip transmission communications command.
The method of the invention, wherein, described electrifying startup and configuration parameter step comprise:
Described first chip begins power-up initializing by described second chip of described electrifying startup signal controlling;
After initialization finished, described second chip was replied described first chip by described warm reset signal;
Described first chip by wake up/sleep signal wakes described second chip up;
Described second chip is replied described first chip by communication permission/inhibit signal;
Described first chip sends the parameter configuration order to described second chip;
After parameter configuration finished, described second chip sent communication permission/inhibit signal, the described second chip entry communication illegal state to first chip.
The method of the invention, wherein, described first chip is initiated communication request constantly to second chip, comprising:
Described first chip by wake up/sleep signal wakes described second chip up;
Described second chip is replied described first chip by communication permission/inhibit signal, enters the serial communication enable state;
Described first chip and described second chip carry out serial communication;
After communication finished, described second chip sent communication permission/inhibit signal, the described second chip entry communication illegal state to first chip.
Method of the present invention, wherein, described first chip is initiated communication request to second chip and comprised: needs are initiated caller, are sent note, reporting signal strength, parameter setting by second chip.
The method of the invention wherein, when described second chip is initiated communication request to first chip, comprising:
Described second chip by wake up/sleep signal wakes described first chip up;
Described first chip is replied described second chip by communication permission/inhibit signal, enters the serial communication enable state;
Described second chip and described first chip carry out serial communication;
After communication finished, described first chip sent communication permission/inhibit signal, the described first chip entry communication illegal state to second chip.
Method of the present invention, wherein, described second chip is initiated communication request to first chip and comprised: described second chip is received called, reception note.
Method of the present invention wherein, when described second chip need be from abnormal restoring, further comprises:
Described second chip sends the warm reset signal to described first chip;
Described first chip by wake up/sleep signal wakes described second chip up;
Described second chip is replied described first chip by communication permission/inhibit signal;
Described first chip sends the parameter configuration order to described second chip;
After communication finished, described second chip sent communication permission/inhibit signal, the described second chip entry communication illegal state to first chip.
Compared with prior art, the invention has the advantages that:
The present invention improves the multi-modulation scheme tenability of mobile phone by at the intermodule employing master control of different systems, driven control and communication mechanism.Realized a kind of reliable, efficient, flexibly, the communication and the control method of low-power consumption.
Technical problem to be solved by this invention, the main points of technical scheme and beneficial effect of the present invention will be in conjunction with the embodiments, are further described with reference to accompanying drawing.
Description of drawings
Fig. 1 is a bimodule mobile communication terminal structure chart of the present invention.
Fig. 2 is a slave module wake-up signal sequential chart of the present invention.
Fig. 3 is a main control module wake-up signal sequential chart of the present invention.
Fig. 4 is a slave module electrifying startup signal timing diagram of the present invention.
Fig. 5 is a slave module warm reset signal timing diagram of the present invention.
Embodiment
Below, we are that example comes the method for the invention is described further with GSM (Global System for Mobile communications) and PHS (Personal Handset System) dual-mode terminal.Here, GSM side and PHS side can adopt the chip of different company respectively.Gsm module is a main control module, operation man-machine interface (MMI).The PHS module is a slave module.
Here we define one group of I/O signal and interrupt signal earlier, as following table:
| (waking up/sleep signal) | Module is initiated the interrupt signal that communication is carried out in requirement | Pattern, L represents wake-up signal | |
| 3 | PREADY (communication permission/inhibit signal) | The P module side allows or forbids communication | |
| 4 | GREADY (communication permission/inhibit signal) | The G module side allows or forbids communication | |
| 5 | WORKINGDET (warm reset signal) | The P module notifies warm reset to initial condition | H represents normal condition, and L represents warm reset |
| 6 | POWERON (electrifying startup signal) | P module electrifying startup signal | H representative start L representative shutdown |
| 7 | UART TXD/RXD (serial communication signal) | The serial ports receiving and transmitting signal |
With reference to Fig. 1, at GSM side POWERON, IRQP, GREADY are output signal, use GPIO (general I/O) to realize; IRQG, PREADY, WORKINGDET are input signal, wherein IRQG uses trailing edge to trigger interruption and realizes that PREADY, WORKINGDET use GPIO to realize.
PHS side IRQG, PREADY, WORKINGDET are output signal, use GPIO to realize equally; POWERON, IRQP, GREADY are input signal, wherein IRQP uses trailing edge to trigger interruption and realizes that GREADY, POWERON use GPIO to realize.
The transmitting-receiving line that UARTTX/RX uses for the chip serial communication.
Realize control and method for communicating between described bimodule mobile communication terminal chips, comprising:
The described PHS chip power of GSM chip controls starts and configuration parameter;
When described GSM chip when the PHS chip is initiated communication request, the GSM chip wakes the PHS chip up by described waking up/sleep signal, after the PHS chip was replied the GSM chip by permissions/inhibit signal, the GSM chip began to PHS chip transmission communications command;
When described PHS chip when the GSM chip is initiated communication request, the PHS chip wakes the GSM chip up by described waking up/sleep signal, after the GSM chip was replied the PHS chip by permissions/inhibit signal, the PHS chip began to GSM chip transmission communications command.
The GSM chip is when the PHS chip is initiated communication request in the described bimodule mobile communication terminal, for example, and when needs are initiated caller, when sending situation such as note, reporting signal strength, parameter setting, being comprised by the PHS chip:
Described GSM chip by wake up/sleep signal wakes described PHS chip up;
Described PHS chip is replied described GSM chip by communication permission/inhibit signal, enters the serial communication enable state;
Described GSM chip and described PHS chip carry out serial communication;
After communication finished, described PHS chip sent communication permission/inhibit signal, described PHS chip entry communication illegal state to the GSM chip.
That is to say, when the PHS side is in the serial communication illegal state for reducing power consumption, the GSM side need be initiated serial communication, the GSM side at first detects the PREADY signal level, if level is low, then the GSM side is converted to the serial communication enable state with the PHS side according to the following steps before serial communication, and sequential as shown in Figure 2
Step 2-1:GREADY signal level is changed to height
Step 2-2:IRQP signal level is put low by height
Step 2-3:PHS side is changed to height with the PREADY signal level, enters the serial communication enable state
Step 2-4:GSM side reverts to height with the IRQP signal level, the beginning serial communication
Step 2-5: communication finishes, and the PREADY signal level is put low, enters the serial communication illegal state
Similarly, the PHS chip is initiated communication request constantly to the GSM chip in the described terminal, and for example, that the PHS chip is received is called, when receiving note, comprising:
Described PHS chip by wake up/sleep signal wakes described GSM chip up;
Described GSM chip is replied described PHS chip by communication permission/inhibit signal, enters the serial communication enable state;
Described PHS chip and described GSM chip carry out serial communication;
After communication finished, described GSM chip sent communication permission/inhibit signal, described GSM chip entry communication illegal state to the PHS chip.
That is to say that when the GSM side is in the serial communication illegal state, the PHS side need be initiated serial communication, the PHS side at first detects the GREADY signal level, if level is low, then the PHS side is converted to the serial communication enable state with the GSM side according to the following steps before serial communication, sequential as shown in Figure 3:
Step 3-1:PREADY signal level is changed to height
Step 3-2:IRQG signal level is put low by height
Step 3-3:GSM side is changed to height with the GREADY signal level, enters the serial communication enable state
Step 3-4:PHS side reverts to height with the IRQG signal level, the beginning serial communication
Step 3-5: communication finishes, and the GREADY signal level is put low, enters the serial communication illegal state
When the GSM chip as described first chip, when needing the electrifying startup of control PHS chip and parameter configuration, then:
Described GSM chip begins power-up initializing by the described PHS chip of described electrifying startup signal controlling;
After initialization finished, described PHS chip was replied described GSM chip by described warm reset signal;
Described GSM chip by wake up/sleep signal wakes described PHS chip up;
Described PHS chip is replied described GSM chip by communication permission/inhibit signal;
Described GSM chip sends the parameter configuration order to described PHS chip;
After parameter configuration finished, described PHS chip sent communication permission/inhibit signal, described PHS chip entry communication illegal state to the GSM chip.
Concrete steps are as follows, sequential as shown in Figure 4:
Step 4-1:POWERON signal level is changed to height, and the PHS chip begins power-up initializing
Step 4-2: initialization finishes back WORKINGDET signal level and puts height
Step 4-3:GSM side IRQP signal level is high
Step 4-4:GSM side GREADY signal level is high
Step 4-5:GSM side IRQP signal level is put low by height
Step 4-6:PHS side is changed to height with the PREADY signal level
Step 4-7:GSM side reverts to height with the IRQP signal level, begins to send the parameter configuration order
Step 4-8: communication finishes, and the PREADY signal level is put low, enters the serial communication illegal state
When described PHS chip need be from abnormal restoring, comprising:
Described PHS chip sends the warm reset signal to described GSM chip;
Described GSM chip by wake up/sleep signal wakes described PHS chip up;
Described PHS chip is replied described GSM chip by communication permission/inhibit signal;
Described GSM chip sends the parameter configuration order to described PHS chip;
After communication finished, described PHS chip sent communication permission/inhibit signal, described PHS chip entry communication illegal state to the GSM chip.
That is to say that PHS module execute exception restore funcitons can make chip reset and restart from bust, simultaneously must notice gsm master module do respective handling, step is as follows, sequential as shown in Figure 5:
The warm reset of step 5-1:PHS side, the WORKINGDET signal level is put low
The warm reset of step 5-2:PHS side is finished, and the WORKINGDET signal level reverts to height
Step 5-3:GSM side GREADY signal level is high
Step 5-4:GSM side IRQP signal level is put low by height
Step 5-5:PHS side is changed to height with the PREADY signal level
Step 5-6:GSM side reverts to height with the IRQP signal level, begins to send the parameter configuration order
Step 5-7: communication finishes, and the PREADY signal level is put low, enters the serial communication illegal state
Control and method for communicating between a kind of dual-mode terminal of the present invention and inside chip thereof, be not restricted to listed utilization in specification and the execution mode, it can be applied to various suitable the present invention's field fully, for those skilled in the art, can easily realize additional advantage and make amendment, therefore under the situation of the spirit and scope of the universal that does not deviate from claim and equivalency range and limited, the examples shown that the present invention is not limited to specific details, representational equipment and illustrates here and describe.
Claims (13)
1, a kind of bimodule mobile communication terminal comprises first chip and second chip, has serial communication transmitting-receiving port respectively, wherein said first chip is used for first communication pattern, and the operation man-machine interface is arranged, described second chip is used for the second communication pattern, it is characterized in that:
Described first chip also has:
The first control signal output ends mouth is in order to output electrifying startup signal;
The second control signal output ends mouth wakes up/sleep signal in order to output;
The 3rd control signal output ends mouth is in order to outputting communication permission/inhibit signal;
Four-way letter signal input port wakes up/sleep signal in order to input;
Five-way letter signal input port is in order to incoming traffic permission/inhibit signal;
The 6th signal of communication input port is in order to input warm reset signal;
Described second chip also has:
The first signal input end mouth is in order to import the electrifying startup signal of first control signal output ends mouth output in described first chip;
The second signal input end mouth wakes up/sleep signal in order to the output of importing the second control signal output ends mouth in described first chip;
The 3rd signal input end mouth is in order to import the communication permission/inhibit signal of the 3rd control signal output ends mouth output in described first chip;
Four-way letter signal output port wakes up/sleep signal in order to the input of the letter of four-way in described first chip signal input port;
Five-way letter signal output port is in order to the letter of five-way in described first chip signal input port incoming traffic permission/inhibit signal;
The 6th signal of communication output port is in order to the input of the 6th signal of communication input port in described first chip warm reset signal.
2, terminal according to claim 1 is characterized in that: the input signal employing trailing edge triggering interruption realization of the second signal input end mouth in four-way letter signal input port and described second chip in described first chip.
3, terminal according to claim 1, it is characterized in that: the first control signal output ends mouth, the second control signal output ends mouth, the 3rd control signal output ends mouth, five-way letter signal input port in described first chip, the first signal input end mouth, the 3rd signal input end mouth in the 6th signal of communication input port and described second chip, four-way letter signal output port, five-way letter signal output port, the signal of the 6th signal of communication output port adopts general I/O to realize.
4, terminal according to claim 1 is characterized in that: described electrifying startup signal high level is represented start, and low level is represented shutdown.
5, terminal according to claim 1 is characterized in that: described sleep-awake signal high level is represented to enter sleep pattern, and low level is represented wake-up signal.
6, terminal according to claim 1 is characterized in that: described warm reset signal high level is represented normal condition, and low level is represented warm reset.
7, realize control and method for communicating between terminal chips according to claim 1, it is characterized in that comprising:
Described second chip power of described first chip controls starts and configuration parameter;
When described first chip when second chip is initiated communication request, first chip wakes second chip up by described waking up/sleep signal, after second chip was replied first chip by permissions/inhibit signal, first chip began to second chip transmission communications command;
When described second chip when first chip is initiated communication request, second chip wakes first chip up by described waking up/sleep signal, after first chip was replied second chip by permissions/inhibit signal, second chip began to first chip transmission communications command.
8, method according to claim 7 is characterized in that described electrifying startup and configuration parameter step, comprising:
Described first chip begins power-up initializing by described second chip of described electrifying startup signal controlling;
After initialization finished, described second chip was replied described first chip by described warm reset signal;
Described first chip by wake up/sleep signal wakes described second chip up;
Described second chip is replied described first chip by communication permission/inhibit signal;
Described first chip sends the parameter configuration order to described second chip;
After parameter configuration finished, described second chip sent communication permission/inhibit signal, the described second chip entry communication illegal state to first chip.
9, method according to claim 7 is characterized in that described first chip when second chip is initiated communication request, comprising:
Described first chip by wake up/sleep signal wakes described second chip up;
Described second chip is replied described first chip by communication permission/inhibit signal, enters the serial communication enable state;
Described first chip and described second chip carry out serial communication;
After communication finished, described second chip sent communication permission/inhibit signal, the described second chip entry communication illegal state to first chip.
10, method according to claim 7, it is characterized in that described first chip comprises to second chip initiation communication request: needs are initiated caller, are sent note, reporting signal strength, parameter setting by second chip.
11, method according to claim 7 is characterized in that described second chip when first chip is initiated communication request, comprising:
Described second chip by wake up/sleep signal wakes described first chip up;
Described first chip is replied described second chip by communication permission/inhibit signal, enters the serial communication enable state;
Described second chip and described first chip carry out serial communication;
After communication finished, described first chip sent communication permission/inhibit signal, the described first chip entry communication illegal state to second chip.
12, method according to claim 7, it is characterized in that described second chip comprises to first chip initiation communication request: described second chip is received called, reception note.
13, method according to claim 7 when it is characterized in that described second chip need be from abnormal restoring, further comprises:
Described second chip sends the warm reset signal to described first chip;
Described first chip by wake up/sleep signal wakes described second chip up;
Described second chip is replied described first chip by communication permission/inhibit signal;
Described first chip sends the parameter configuration order to described second chip;
After communication finished, described second chip sent communication permission/inhibit signal, the described second chip entry communication illegal state to first chip.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2005100803913A CN100388841C (en) | 2005-07-04 | 2005-07-04 | Method for controlling double-mode terminal and between its internal chips |
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| CNB2005100803913A CN100388841C (en) | 2005-07-04 | 2005-07-04 | Method for controlling double-mode terminal and between its internal chips |
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| CN1893696A true CN1893696A (en) | 2007-01-10 |
| CN100388841C CN100388841C (en) | 2008-05-14 |
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| CNB2005100803913A Expired - Fee Related CN100388841C (en) | 2005-07-04 | 2005-07-04 | Method for controlling double-mode terminal and between its internal chips |
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| CN101350995A (en) * | 2008-08-26 | 2009-01-21 | 青岛海信移动通信技术股份有限公司 | Awakening method between mobile terminal modules and multi-mode terminal using the same |
| CN101150809B (en) * | 2007-11-03 | 2011-02-02 | 青岛海信移动通信技术股份有限公司 | Method for arousing and stream control of mobile terminal processor serial port |
| CN102761646A (en) * | 2011-04-26 | 2012-10-31 | 深圳富泰宏精密工业有限公司 | System and method for command interaction correction for dual-mode phone |
| CN104125315A (en) * | 2013-04-23 | 2014-10-29 | 深圳富泰宏精密工业有限公司 | Time sequence control system and method |
| CN105791513A (en) * | 2014-12-22 | 2016-07-20 | 深圳富泰宏精密工业有限公司 | Anomaly processing system and method for baseband chips |
| CN106233273A (en) * | 2014-04-21 | 2016-12-14 | 高通股份有限公司 | Mix virtual GPIO |
| CN106464824A (en) * | 2016-06-28 | 2017-02-22 | 北京小米移动软件有限公司 | Pin control method and device |
| CN114647448A (en) * | 2020-12-17 | 2022-06-21 | 航天科工惯性技术有限公司 | Method, device, equipment and storage medium for awakening communication among multiple single-chip microcomputers |
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| JPH11289278A (en) * | 1998-04-01 | 1999-10-19 | Toshiba Corp | Portable radio terminal equipment |
| JP2003163966A (en) * | 2001-11-27 | 2003-06-06 | Toshiba Corp | Chip set for dual mode terminal |
| CN1303837C (en) * | 2004-09-27 | 2007-03-07 | 杭州斯达康通讯有限公司 | Double mode type mobile phone with PHS and VoWlan function |
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| CN101150809B (en) * | 2007-11-03 | 2011-02-02 | 青岛海信移动通信技术股份有限公司 | Method for arousing and stream control of mobile terminal processor serial port |
| CN101350995A (en) * | 2008-08-26 | 2009-01-21 | 青岛海信移动通信技术股份有限公司 | Awakening method between mobile terminal modules and multi-mode terminal using the same |
| CN101350995B (en) * | 2008-08-26 | 2013-10-09 | 青岛海信移动通信技术股份有限公司 | Awakening method between mobile terminal modules and multi-mode terminal using the same |
| CN102761646A (en) * | 2011-04-26 | 2012-10-31 | 深圳富泰宏精密工业有限公司 | System and method for command interaction correction for dual-mode phone |
| CN102761646B (en) * | 2011-04-26 | 2014-12-10 | 深圳富泰宏精密工业有限公司 | System and method for command interaction correction for dual-mode phone |
| TWI548253B (en) * | 2011-04-26 | 2016-09-01 | 群邁通訊股份有限公司 | System and method for correcting at commands in a mobile phone with double cards |
| CN104125315A (en) * | 2013-04-23 | 2014-10-29 | 深圳富泰宏精密工业有限公司 | Time sequence control system and method |
| CN104125315B (en) * | 2013-04-23 | 2019-04-19 | 深圳富泰宏精密工业有限公司 | Sequential control system and method |
| CN106233273A (en) * | 2014-04-21 | 2016-12-14 | 高通股份有限公司 | Mix virtual GPIO |
| CN106233273B (en) * | 2014-04-21 | 2019-05-10 | 高通股份有限公司 | Mix virtual GPIO |
| CN105791513A (en) * | 2014-12-22 | 2016-07-20 | 深圳富泰宏精密工业有限公司 | Anomaly processing system and method for baseband chips |
| CN106464824A (en) * | 2016-06-28 | 2017-02-22 | 北京小米移动软件有限公司 | Pin control method and device |
| WO2018000193A1 (en) * | 2016-06-28 | 2018-01-04 | 北京小米移动软件有限公司 | Pin control method and device |
| CN106464824B (en) * | 2016-06-28 | 2019-09-17 | 北京小米移动软件有限公司 | Pin control method and device |
| CN114647448A (en) * | 2020-12-17 | 2022-06-21 | 航天科工惯性技术有限公司 | Method, device, equipment and storage medium for awakening communication among multiple single-chip microcomputers |
| WO2022204990A1 (en) * | 2021-03-30 | 2022-10-06 | 华为技术有限公司 | Method for controlling chip, and integrated circuit system |
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| CN100388841C (en) | 2008-05-14 |
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