CN1884638A - Inner gettering process of heavily boron-doped Czochralski silicon wafer based on quick heat process - Google Patents
Inner gettering process of heavily boron-doped Czochralski silicon wafer based on quick heat process Download PDFInfo
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- CN1884638A CN1884638A CN 200610051834 CN200610051834A CN1884638A CN 1884638 A CN1884638 A CN 1884638A CN 200610051834 CN200610051834 CN 200610051834 CN 200610051834 A CN200610051834 A CN 200610051834A CN 1884638 A CN1884638 A CN 1884638A
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Abstract
The invention discloses a systemic complex technology of heavy doped boron straight-pulled silica piece based on rapid heat-disposal, which comprises the following steps: 1) washing heavy doped boron silica piece; proceeding heat disposal for 5-50 s at 1200-1280 deg.c in the argon environment; keeping temperature; transmitting the disposing environment into oxygen to dispose for 5-50 s continually; cooling in the oxygen environment or proceeding heat disposal for 5-50 s at 1200-1280 deg.c in the argon environment; cooling; proceeding heat disposal for 5-50 s at 1200-1280 deg.c in the oxygen environment again; 2) annealing the heavy boron silica piece for 4 h at 800 deg.c in the oxygen environment; annealing for 16 h at 1000 deg.c again. The invention realizes inner complex adsorbing structure, which shortens hot period with excellent repeatability.
Description
Technical field
The present invention relates to the systemic impurity process of heavily boron-doped Czochralski silicon wafer.
Background technology
Because the boron of high density can the pinning dislocation, improve the physical strength of silicon chip; Simultaneously can promote oxygen precipitation, thereby strengthen the Internal Gettering of Silicon Wafers ability, so heavily boron-doped Czochralski silicon wafer is widely used as the substrate material of the epitaxial silicon chip of super large-scale integration (ULSI).Along with constantly reducing of unicircuit characteristic line breadth, silicon chip also more and more becomes the focus that people pay close attention to the gettering ability of metal, thereby the gettering behavior of people's counterweight boron-doping silicon chip also carried out extensive studies, and the report document has: S.Hahn, F.A.Ponce, W.A.Tiller, V.Stojanoff, D.A.P.Bulla, and W.E.Castro, J.Appl.Phys.64,4454 (1988); W.Wijaranakula, J.Appl.Phys.72,2713 (1992); T.Ono, E.Asayma, H.Horie, M.Hourai, M.Sano, H.Tsuya, and K.Nakai, Jpn.J.Appl.Phys.36,249 (1997); T.Ono, A.Romanowski, E.Asayama, H.Horie, K.Sueoka, H.Tsuya, and G.A.Rozgonyi, J.Electrochem.Soc.146,3461 (1999) etc.People such as Aoki have reported the gettering behavior of p/p+ epitaxial silicon chip, the principle of utilizing Fe or the Cu solid solubility in heavily doped substrate to increase, reduced the concentration of metal ion in the epitaxial film, thereby reach the effect (reference: M.Aoki of gettering, T.Itakura, and N.Sasaki, Appl.Phys.Lett.66,2709 (1995)).But heavily doped B substrate weakens to some extent to the gettering effect of Cu, can ignore (reference: R.Hoelzl, D.Huber to the gettering effect of Ni, K.J.Range, L.Fabry, J.Hage, and R.Wahlich, J.Electrchem.Soc.147,2704 (2000); H.Tsuya, Jpn.J.Appl.Phys.43,4055 (2004)).Simultaneously, people such as Smith have designed p/p+ epitaxial silicon chip ideal gettering structure, promptly in heavily doped borosilicate lamellar body, form highdensity oxygen precipitation as the intrinsic gettering point, form the clean area of certain width on the nearly surface of substrate, growth one deck is gently mixed epitaxial film on substrate again, like this can be so that the fractional condensation gettering of the lax gettering of bulk defects and heavily doped substrate mutually combines, strengthened the gettering ability (reference: A.L.Smith of silicon chip greatly, K.Wada, and L.C.Kimerling, J.Electrchem.Soc.147,1154 (2000)).And people such as Rossi find during the concerning of defect concentration and silicon substrate near surface flaw in the research epitaxial film, the defective that reduces the nearly surface of substrate can reduce the dislocation of outer Yanzhong and the density of fault greatly, thereby improve the quality of epitaxial silicon chip, so form clean area in heavily doped borosilicate sheet, reducing near surface flaw is very important (reference J.A.Rossi, W.Dyson, L.G.Hellwig, and T.M.Hanley, J.Appl.Phys.58,1798 (1985)).But, on heavily doped substrate, form relatively difficulty of clean area because the boron of high density can promote oxygen precipitation strongly.People such as Li Chunlong have studied the influence of oxygen precipitation and clean area in rapid thermal process (RTP) the counterweight boron-doping silicon chip, behind high temperature RTP, vacancy concentration increases in body gradually from the surface, very low in nearly surface vacancy concentration, for gently mixing Czochralski silicon wafer, can form " magic clean area " (MDZ); And,, can not form clean area because boron, makes in annealing process subsequently that nearly surf zone generates very close oxygen precipitation easily to the promoter action of oxygen precipitation for heavily doped borosilicate sheet.Therefore Li Chunlong etc. thinks that MDZ technology is not suitable for heavily doped borosilicate sheet (reference: C.Li, X.Ma, J.Xu, X.Yu, D.Yang, and D.Que, Jpn.J.Appl.Phys.42,7290 (2003)).
Summary of the invention
The objective of the invention is to propose a kind of simple and effective heavily boron-doped Czochralski silicon wafer based on the quick heat treatment systemic impurity process.
Heavily boron-doped Czochralski silicon wafer based on the quick heat treatment systemic impurity process, may further comprise the steps:
1) heavily doped borosilicate sheet is cleaned the back earlier under argon atmospher 1200-1280 ℃ of thermal treatment 5-50 second, keep temperature-resistant then, will handle atmosphere and be transformed into oxygen, continuation thermal treatment 5-50 second, under oxygen atmosphere, cool off at last; Perhaps earlier under argon atmospher 1200-1280 ℃ of thermal treatment 5-50 second, after the cooling, again under oxygen atmosphere 1200-1280 ℃ of thermal treatment 5-50 second;
2) the heavily doped borosilicate sheet that will handle through step 1) is under argon atmospher, earlier 800 ℃ of annealing 4 hours down, and then 1000 ℃ of annealing 16 hours down.
The present invention is by control heat treated temperature and atmosphere, can be adjusted in the point defect introduced in the heavily doped borosilicate lamellar body (room and from the gap) concentration and distribution thereof, and then the distribution of control wafer bulk defective.
Beneficial effect of the present invention is:
Adopt double annealing under the high temperature rapid thermal process of conversion protective atmosphere and low, the high-temperature, can realize heavily doped boron Internal Gettering of Silicon Wafers structure effectively, this intrinsic gettering structure is very stable in subsequent processes, and heat cycle is short, good reproducibility.
Description of drawings
Fig. 1 is the light micrograph that the cross section bulk defects of embodiment 1 heavily boron-doped Czochralski silicon wafer distributes;
Fig. 2 is the light micrograph that the cross section bulk defects of embodiment 2 heavily boron-doped Czochralski silicon wafers distributes;
Fig. 3 is the light micrograph that the cross section bulk defects of embodiment 3 heavily boron-doped Czochralski silicon wafers distributes.
Embodiment
Further specify the present invention below in conjunction with accompanying drawing.
Embodiment 1
Heavily boron-doped Czochralski silicon wafer based on the quick heat treatment systemic impurity process, step is as follows:
1) heavily doped borosilicate sheet is cleaned the back earlier under argon atmospher in 1240 ℃ of thermal treatments 50 seconds, keep temperature-resistant then, under oxygen atmosphere, handled 20 seconds again, and in oxygen atmosphere, cool off;
2) silicon chip was annealed 4 hours at 800 ℃ earlier under argon atmospher, and then 1000 ℃ of annealing 16 hours.
Implemented to seal with wax in the surface of silicon chip, corroded 3 minutes in Secco liquid then, (Secco liquid is the K of 0.15M
2Cr
2O
7With 1: 2 by volume mixed solution of 49%HF).Cross section microdefect with OLYMPUS observation by light microscope silicon chip distributes, and takes pictures.
Fig. 1 is the light micrograph that the heavily boron-doped Czochralski silicon wafer cross section microdefect that makes distributes.From figure as can be seen, the relevant bulk defects of highdensity oxygen precipitation is arranged in the heavily doped borosilicate lamellar body behind low, the high temperature annealing, density reaches 3.9 * 10
7Cm
-2, and there is the clean area about 25 μ m on nearly surface.The distribution of oxygen precipitation is distributed by point defect and determines, under argon atmospher behind the high temperature RTP, in silicon chip, formed the room of high density, RTP under back to back oxygen atmosphere has then injected certain density from the gap Siliciumatom from silicon chip surface, thereby in silicon chip, finally formed the distribution that vacancy concentration raises in from the surface to the body gradually, such vacancy concentration makes silicon chip form the IG structure in low-Gao two step thermal treatments subsequently, i.e. the nearly surperficial zero defect of silicon chip and the bulk defects of high density is arranged in the wafer bulk.
Embodiment 2
The systemic impurity process based on RTP of heavily boron-doped Czochralski silicon wafer, step is as follows:
1) heavily doped borosilicate sheet is cleaned the back earlier under argon atmospher in 1260 ℃ of thermal treatments 30 seconds, keep temperature-resistant then, under oxygen atmosphere, handled 20 seconds again, and in oxygen atmosphere, cool off;
2) silicon chip was annealed 4 hours at 800 ℃ earlier under argon atmospher, and then 1000 ℃ of annealing 16 hours.
Implemented to seal with wax in the surface of silicon chip, corroded 3 minutes in Secco liquid then, (Secco liquid is the K of 0.15M
2Cr
2O
7With 1: 2 by volume mixed solution of 49%HF).Cross section microdefect with OLYMPUS observation by light microscope silicon chip distributes, and takes pictures.
Fig. 2 is the light micrograph that the heavily boron-doped Czochralski silicon wafer cross section microdefect that makes distributes.Can see that on scheming similar among the intravital defect distribution of silicon chip and Fig. 1, nearly surface has 30 microns clean area approximately, and highdensity bulk defects is arranged in wafer bulk.
Embodiment 3
The systemic impurity process based on RTP of heavily boron-doped Czochralski silicon wafer, step is as follows:
1) heavily doped borosilicate sheet is cleaned the back earlier under argon atmospher in 1280 ℃ of thermal treatments 30 seconds, after the cooling, under oxygen atmosphere, handled 50 seconds in 1280 ℃ again, and in oxygen atmosphere, cool off;
2) silicon chip was annealed 4 hours at 800 ℃ earlier under argon atmospher, and then 1000 ℃ of annealing 16 hours.
Implemented to seal with wax in the surface of silicon chip, corroded 3 minutes in Secco liquid then, (Secco liquid is the K of 0.15M
2Cr
2O
7With 1: 2 by volume mixed solution of 49%HF).Cross section microdefect with OLYMPUS observation by light microscope silicon chip distributes, and takes pictures.
Fig. 3 is the light micrograph that the heavily boron-doped Czochralski silicon wafer cross section microdefect that makes distributes.As can be seen from the figure, the clean area width of silicon chip is about 50 microns, and bulk defects density is still higher.
Claims (1)
- Heavily boron-doped Czochralski silicon wafer based on the quick heat treatment systemic impurity process, it is characterized in that may further comprise the steps:1) heavily doped borosilicate sheet is cleaned the back earlier under argon atmospher 1200-1280 ℃ of thermal treatment 5-50 second, keep temperature-resistant then, will handle atmosphere and be transformed into oxygen, continuation thermal treatment 5-50 second, under oxygen atmosphere, cool off at last; Perhaps earlier under argon atmospher 1200-1280 ℃ of thermal treatment 5-50 second, after the cooling, again under oxygen atmosphere 1200-1280 ℃ of thermal treatment 5-50 second;2) the heavily doped borosilicate sheet that will handle through step 1) is under argon atmospher, earlier 800 ℃ of annealing 4 hours down, and then 1000 ℃ of annealing 16 hours down.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104762656A (en) * | 2014-01-02 | 2015-07-08 | 浙江大学 | Intrinsic gettering technology of major diameter czochralski silicon chip |
| CN106087052A (en) * | 2016-08-10 | 2016-11-09 | 中联西北工程设计研究院有限公司 | A kind of double annealing technique of polycrystalline silicon ingot casting |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1190525C (en) * | 2001-12-06 | 2005-02-23 | 浙江大学 | Micro germanium-doped vertical-pulling silicon single crystal |
| CN1688015A (en) * | 2005-04-11 | 2005-10-26 | 浙江大学 | P/P+ silicon epitaxial wafer using Ge-B doped straight drawing silicone wafer as substrate |
-
2006
- 2006-06-06 CN CNB2006100518340A patent/CN100336945C/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104762656A (en) * | 2014-01-02 | 2015-07-08 | 浙江大学 | Intrinsic gettering technology of major diameter czochralski silicon chip |
| CN104762656B (en) * | 2014-01-02 | 2017-12-22 | 浙江大学 | A kind of systemic impurity process of major diameter Czochralski silicon wafer |
| CN106087052A (en) * | 2016-08-10 | 2016-11-09 | 中联西北工程设计研究院有限公司 | A kind of double annealing technique of polycrystalline silicon ingot casting |
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Assignee: Wanxiang Silicon-Peak Electronics Co.,Ltd. Assignor: Zhejiang University Contract fulfillment period: 2008.7.17 to 2013.7.16 Contract record no.: 2008330000131 Denomination of invention: Inner gettering process of heavily boron-doped Czochralski silicon wafer based on quick heat process Granted publication date: 20070912 License type: Exclusive license Record date: 20080804 |
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