CN1864091A - 在热膨胀率匹配的透明衬底上具有加热体的可调谐光学滤波器 - Google Patents
在热膨胀率匹配的透明衬底上具有加热体的可调谐光学滤波器 Download PDFInfo
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Abstract
一种光学器件包括:玻璃衬底(410),粘合到玻璃衬底的晶体硅层(402)和在晶体硅层的顶部制造的热可调谐薄膜光学滤波器(420)。
Description
技术领域
本发明通常涉及热可调谐器件比如热光可调谐薄膜光学滤波器。
背景技术
有一类基于热光可调谐薄膜光学滤波器的器件。这些器件由非晶半导体材料制成,采用以前被看成为非晶硅不期望的特性,即,它的大热光系数。这些器件的性能基于试图最大化薄膜干涉结构中热光可调谐性,而不是试图最小化它,后者常常是传统的固定滤波器的目标。这些器件的特征在于通带的中心处于由器件的温度控制的波长。换言之,通过变化器件的温度可以在波长范围内往复的移动通带位置并由此控制允许穿过器件(或者被器件反射的)光的波长。
用于热光可调谐薄膜滤波器的基本结构是单腔法布里-珀罗(Fabry-Perot)型滤波器10,如图1a中所示。法布里-珀罗腔(Fabry-Perot cavity)包括一对由隔离物16分开的薄膜多层干涉镜14a和14b。薄膜镜由交替的高和低折射率的四分之一波长对组成。用于层的两种材料是Si:H(n=3.67)和非化学计量(non-stoichiometric)的SiNx(n=1.77)。此外隔离物(″腔″)还用非晶硅制成。为了产生更复杂的通带特性或者更好地限定的通带,可以串联多个腔形成多腔的结构。
为了实现控制器件温度,至少一些实施例包括集成在多层结构中的ZnO或者多晶硅加热体薄膜12。在所考虑的波长(例如1550nm)下,加热体薄膜是导电的和光学上透明的。因此,通过控制通过薄膜的电流,可以控制滤波器的温度。
图1b说明了可由这种热光可调谐光学滤波器实现的热调谐。该配置使用具有介质反射镜(用离子辅助溅射法沉积五氧化二钽高反射率层和二氧化硅低反射率层,R=98.5%镜面反射率)的非晶硅隔离物。在加热室从25C到229C加热那种结构。调谐是大约15nm或者dλ/dT=0.08nm/K。
发明内容
通常,一方面,本发明涉及一种光学器件,其包括:玻璃衬底、粘合到玻璃衬底的晶体硅层;以及在晶体硅层的顶部制造的热可调谐薄膜光学滤波器。
其他实施例包括一个或多个以下特征。光学滤波器设计成能在波长λ的光信号上工作并且其中玻璃衬底对波长λ的光透明。热可调谐光学滤波器是热光可调谐薄膜光学滤波器。光学器件还包括在晶体硅层上并且围绕在光学滤波器周围的加热元件。或者,光学器件包括在晶体硅层上形成的电触点,用于给硅层提供电流以便使用硅层作为加热体。晶体硅加热体层是掺杂晶体硅层。玻璃衬底由派热克斯玻璃(Pyrex)或者硼硅玻璃制成。玻璃衬底的特点在于CTE(热膨胀系数)与光学滤波器的CTE相配。薄膜光学滤波器包括一个或多个包括例如非晶硅的非晶形半导体的层。薄膜光学滤波器包括多个薄膜干涉层。多个薄膜层的至少一些层由非晶硅制成。光学滤波器设计成能在波长λ的光信号上工作并且其中多个薄膜层中的每一层具有大致为λ/4的整数倍的厚度。薄膜光学滤波器包括大量多个Fabry-Perot腔的堆。
通常,另一个方面,本发明涉及一种制造光学器件的方法。该方法包括:给粘合到玻璃衬底的晶体硅层提供玻璃衬底;以及在晶体硅层的顶部制造热可调谐薄膜光学滤波器。
其他实施例包括一个或多个以下特征。硅层是掺杂硅层并且该方法还包括在硅层上制造电触点,用于给掺杂硅层提供电流。该方法还包括在制造光学滤波器之前,构图硅层来形成硅岛,在该硅岛上制造光学滤波器。晶体硅层阳极地(anodically)粘合到玻璃衬底。在晶体硅层的顶部制造热可调谐薄膜光学滤波器包括制造热光可调谐薄膜、光学滤波器。
按照附图和下面的描述阐明本发明的一个或多个实施例的细节。从说明书和附图中和从权利要求中本发明的其他特征、目的和优点是清楚的。
附图说明
图1a示出了热光可调谐薄膜滤波器的基本器件结构。
图1b呈现了说明具有热光隔离物和介质反射镜的滤波器调谐范围的滤波器传输特性的多个曲线。
图2a-e说明了通过掺杂晶体硅抵抗层实现的薄膜加热体上的集成热光地滤波器的制造。
应该理解为附图是便于说明。描述的结构没有按比例画出,相对尺寸也不是精确的。
具体实施方式
通常,在掺杂的单晶硅薄片电阻加热体的上面直接沉积热可调谐薄膜光学滤波器,衬底又支撑所述加热体,衬底对于光学滤波器要在其上工作的波长透明。衬底的热膨胀率(CTE)比过去已经使用的熔凝石英硅石更接近地与光学滤波器的CTE相匹配,因此当暴露于制造或者调谐所需的大的温度摆幅时允许整个结构膨胀和收缩而不受到过分的应力或者导致损坏。如下是用于制造这种结构的方法。
参考图2a-e,工艺过程以具有期望厚度的器件层402的SOI晶片400开始。器件层402由高质量单晶硅材料制成并且粘合到在操作层408上形成的氧化层(BOX层)406。因为器件层402会变成层的堆的一部分,所述层构成后来在硅层上沉积的滤光器,所述器件层402的厚度需要精密的控制以便它大致等于四分之一波长的某个整数倍。
为了获得这种等级的厚度控制,使用″精密的切割(smart cut)″工艺制造SOI晶片。″精密的切割″工艺使用两个磨光的Si晶片,晶片A和晶片B,并且如下工作。在晶片A上热地生长氧化物,之后氢注入通过氧化层并且注入到下面的硅到预定深度。然后在施加压力和大约400-600℃的温度下晶片A亲水地粘合到晶片B。在随后的热处理期间,氢离子注入用作原子解剖刀,使得能够从晶片A(即,施主晶片)切割(厚度d的)晶体薄膜薄片并且转移到晶片B(即,接收晶片)的上面。在大约1100℃下经过第二、后续的退火加强了硅薄片和氧化层之间的粘合。在产生的结构中,薄的晶体Si膜(通常被称为是″器件″层)粘合到目前坚固地粘合到晶片B的氧化膜(也被称为是″操作″层)。器件层通常具有高精度(大约±30-40nm)的300-500nm的厚度。然后进行暴露的Si膜表面的最后的抛光以确保非常光滑的表面。
用这种工艺制造的晶片商业上可以从法国Bernin的S.O.I.TECSilicon on Insulator Technologies(Soitec)获得。
随着获得了SOI晶片,然后通过利用若干不同的可用工艺中任何工艺用适当的掺杂剂(例如硼或者磷)掺杂器件层402。在所述的实施例中,需要在一定密度下用掺杂剂404进行离子注入来获得期望的电导率。然后利用标准半导体处理,通过高温退火激活注入的掺杂剂。退火用来确保在整个器件层402的厚度的恒定的掺杂密度,以便通过该层的″背面″可以建立到该层的有效的电接触,这在下面描述。
SOI晶片400的器件层402被掺杂之后,它阳极地粘合到适当的玻璃衬底410,如图2b中描述的一样。玻璃衬底由其CTE与滤波器堆的CTE更匹配的材料(例如来自Corning的某些硼硅玻璃,PyrexTM和Eagle2000TM)制成。在CTE匹配的衬底附着于器件层402之后,通过用适当的试剂,例如KOH溶液,蚀刻或者通过机械研磨(lapping)之后结合蚀刻,来除去SOI晶片400的操作层408。注意,如较早描述的,用BOX层406氧化层自动地停止蚀刻,所述BOX层406氧化层把器件层402和操作层408分开。这产生图2c中示出的结构。
已经完全除去操作层408之后,还通过将晶片浸入比如缓冲的HF溶液的适当的试剂,除去BOX层402。如图2d所示,这完全地暴露晶体硅层402。然后光刻地构图暴露的硅器件层以在衬底410的上面形成掺杂硅的隔离区域并且在硅区域的上面制造光学元件(例如可调谐光学滤波器堆)420。这是通过在晶片的整个表面上沉积滤波器堆然后光刻地构图沉积的材料来在硅区域的顶部产生独立的隔离滤波器元件来实现的。其次,在掺杂硅区域的顶部制造沿着相关联的接触垫424的电金属迹线422来提供到那个材料的电连接,以便可以通过使电流流过它来加热它。
以前,在由熔凝石英衬底支持的多晶硅膜上沉积热光可调谐滤波器。掺杂的多晶硅膜用做加热体来控制热可调谐滤波器的温度。
虽然这些器件正常工作,但是它们出现以下问题。第一,在滤波器-膜/多晶硅结构和下面的熔凝石英衬底之间存在大的CTE不匹配。当通过利用高驱动电流激发加热体而驱动器件到大的温度极限时或者在制造过程本身期间,这种不匹配导致高应力,这引起破裂并且把滤波器-膜/多晶硅结构分层。第二,在器件操作期间掺杂的多晶硅膜的电阻逐渐地增加。认为这种效应是由掺杂剂扩散到多晶硅薄膜中的晶粒边界(grain boundary)造成的,在所述边界,它们被捕获并被电去活。第三,由于多晶硅膜的晶体颗粒结构,它通常是显微镜下粗糙的,因此当光穿过滤波器-膜/多晶硅结构时产生散射。这种散射引起插入损耗增大和滤波器线宽增大。
在这里描述的CTE匹配的结构把两个基本变化引入到以前的设计中以解决这些问题。第一,它用单晶硅加热体替换多晶硅加热体。如上所述,益处包括在时间上稳定的加热体电阻和减少的光散射,这又带来较低的插入损耗和较窄的滤波器尖峰。第二,它用CTE匹配的衬底替换熔凝硅石衬底。使用这种衬底减少了膜中的应力,允许生长更厚的、更复杂的膜堆并允许利用大的调谐范围。此外,单晶硅加热体具有光滑的表面并且没有颗粒边界,因此减少滤波器的插入损耗和增加相邻信道抑制,这在制造多端口器件和具有更紧密信道间隔的器件方面是关键的。
此外,热光可调谐薄膜滤波结构包括非晶硅膜。希望在器件寿命期间保持这种膜在非晶形状态下以便对于它的折射率,导热率保持很高。可是,由于施加到滤波结构的高温,在器件工作期间这些膜可能经历慢的微结晶,因此限制了器件寿命。还知道,机械应力的存在加快了非晶硅膜的微结晶。因此,消除膜结构和衬底之间的CTE不匹配明显减少了施加到膜结构上的应力,由此也抑制了微结晶,并且改善了器件寿命。
上面描述的结构对于热光可调谐薄膜光学滤波器特别有用处。但是可以把它用于其他器件中,其中需要加热体具有优良的电稳定性、对分层和破裂的高抵抗性,和/或没有散射的在红外线(IR)中良好的透明度。
尽管上面的描述一般地集中于晶片衬底上的各个器件的制造,但实际上,有许多在单个晶片上制造的这样的器件,它们后来通过对晶片的切割和分片以产生许多独立的管芯而被分离成独立的元件。
其它实施例在下面的权利要求的范围内。
Claims (20)
1、一种光学器件包括:
玻璃衬底,
粘合到所述玻璃衬底的晶体硅层;以及
在晶体硅层的顶部上制造的热可调谐薄膜光学滤波器。
2、权利要求1的所述光学器件,其中所述光学滤波器设计成在波长λ的光信号上工作并且其中所述玻璃衬底对波长λ的光是透明的。
3、权利要求2所述的光学器件,其中所述热可调谐光学滤波器是热光可调谐薄膜光学滤波器。
4、权利要求3所述的光学器件,还包括在晶体硅层上并围绕在光学滤波器周围的加热元件。
5、权利要求3所述的光学器件,还包括在晶体硅层上形成的电触点,用于给所述硅层提供电流以把硅层用作加热体。
6、权利要求5所述的光学器件,其中所述晶体硅加热体层是掺杂的晶体硅层。
7、权利要求6所述的光学器件,其中玻璃衬底由派热克斯玻璃制成。
8、权利要求6所述的光学器件,其中玻璃衬底由硼硅玻璃制成。
9、权利要求6所述的光学器件,其中玻璃衬底的特征是与所述光学滤波器的热膨胀系数相匹配的热膨胀系数。
10、权利要求5所述的光学器件,其中所述薄膜光学滤波器包括一个或多个包括非晶形半导体的层。
11、权利要求10所述的光学器件,其中所述非晶形半导体是非晶硅。
12、权利要求5所述的光学器件,其中所述薄膜光学滤波器包括多个薄膜干涉层。
13、权利要求12所述的光学器件,其中所述多个薄膜层的至少一些包括非晶硅。
14、权利要求12所述的光学器件,其中所述光学滤波器设计成在波长λ的光信号上工作并且其中所述多个薄膜层中的每一个层具有大致为λ/4的整数倍的厚度。
15、权利要求5的所述光学器件,其中所述薄膜光学滤波器包括多个法布里-珀罗腔的堆。
16、一种制造光学器件的方法,该方法包括:
给玻璃衬底提供粘合到玻璃衬底的晶体硅层;以及
在晶体硅层的顶部制造热可调谐薄膜光学滤波器。
17、权利要求16所述的方法,其中所述硅层是掺杂的硅层并且该方法还包括在所述硅层上制造电触点,用于给掺杂硅层提供电流。
18、权利要求16所述的方法,还包括,在制造光学滤波器之前,制图硅层来形成硅岛,在该硅岛上制造光学滤波器。
19、权利要求16所述的方法,其中所述晶体硅层阳极地粘合到玻璃衬底。
20、权利要求16所述的方法,其中在所述晶体硅层的顶部制造热可调谐薄膜光学滤波器的步骤包括制造热光可调谐薄膜光学滤波器。
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EP (1) | EP1671177A1 (zh) |
JP (1) | JP2007514961A (zh) |
KR (1) | KR20070003766A (zh) |
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CN105093417A (zh) * | 2014-04-23 | 2015-11-25 | 华为技术有限公司 | 波长锁定装置和薄膜滤波器 |
CN105093417B (zh) * | 2014-04-23 | 2018-10-30 | 华为技术有限公司 | 波长锁定装置和薄膜滤波器 |
CN104714311A (zh) * | 2015-04-09 | 2015-06-17 | 上海新微技术研发中心有限公司 | 一种低光学损耗的mems热光可调谐滤波器 |
CN104714311B (zh) * | 2015-04-09 | 2018-07-31 | 上海新微技术研发中心有限公司 | 一种低光学损耗的mems热光可调谐滤波器 |
CN106324826A (zh) * | 2016-09-23 | 2017-01-11 | 北极光电(深圳)有限公司 | 一种基于温度控制硅镀膜基片光学厚度的可调谐光滤波器及其控制方法 |
WO2021063013A1 (zh) * | 2019-09-30 | 2021-04-08 | 福州高意光学有限公司 | 可调谐滤光片 |
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US20050105185A1 (en) | 2005-05-19 |
JP2007514961A (ja) | 2007-06-07 |
KR20070003766A (ko) | 2007-01-05 |
US7304799B2 (en) | 2007-12-04 |
CA2540184A1 (en) | 2005-04-21 |
WO2005036240A1 (en) | 2005-04-21 |
EP1671177A1 (en) | 2006-06-21 |
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