CN1862482A - FIFO memory and method for output empty full marker thereof - Google Patents
FIFO memory and method for output empty full marker thereof Download PDFInfo
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- CN1862482A CN1862482A CN 200610073194 CN200610073194A CN1862482A CN 1862482 A CN1862482 A CN 1862482A CN 200610073194 CN200610073194 CN 200610073194 CN 200610073194 A CN200610073194 A CN 200610073194A CN 1862482 A CN1862482 A CN 1862482A
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Abstract
The present invention discloses a first-in first-out memory and its method for outputting empty/full mark. Said first-in first-out memory includes memory, write address counter, read address counter, byte counter and empty/full mark production logic. Besides, said invention also provides the concrete steps of its method for outputting empty/full mark.
Description
Technical field
The present invention relates to pushup storage (FIFO), particularly relate to a kind of high reliability byte level and write the method that the bag level is read pushup storage and exported empty full scale will.
Background technology
The base unit of transmission data is bags in IP network, and bag is a kind of Frame of on-fixed length.In IP device, the FIFO of storage package generally adopts byte level FIFO or block FIFO.Byte level FIFO read-write end all is to conduct interviews according to byte, and the sky sign of output and full scale will also are byte levels; Block FIFO read-write end all is to conduct interviews according to piece, and the sky sign of output and full scale will also are the piece levels.
Byte level FIFO comprises that storer, read address counter, write address counter, byte counter and empty full scale will produce logic.To reading end: whenever read data, the count value of read address counter adds 1, is added to after maximal value becomes 0, continues to add 1 if there are data to read; To writing end: whenever write 1 data, the count value of write address counter adds 1, is added to after maximal value becomes 0, continues to add 1 if there are data to write.The count value that the count value of byte counter equals write address counter subtracts the count value of read address counter, if the count value of byte counter is 0, empty full scale will produces the empty sign of logic output; If the count value of byte counter reaches preset threshold, empty full scale will produces logic output full scale will.
If byte level FIFO begins to be sky, write FIFO non-NULL after the data, read end beginning sense data.Writing end when FIFO does not write a complete bag as yet interrupts writing for a certain reason, but for reading end, if internal schedule is based on bag, read end owing to can not read a complete bag and must wait for, this makes and writes byte level by byte level to read FIFO efficient based on the scheduling of bag level the time not high.
Block FIFO comprises that storer, read address counter, write address counter, block counter and empty full scale will produce logic.Storer logically is divided into the storage block of a plurality of identical sizes, and for example a storage block can be deposited 128 or 256 bytes.Read address and write address and logically distinguish separated into two parts: high address and low order address, certain storage block of memory inside is pointed in the high address, and low order address points to a concrete storage unit in the storage block.In the process that receives a piece, high-order write address remains unchanged, and has only the low level write address to change; Finish receive a piece after, high-order write address changes, the low level write address is changed to a fixing initial value, and is identical to guarantee that each wraps in the start address of storing in the storage block.Equally, in the process that sends a piece, a high position is read the address and is remained unchanged, and has only low level to read address change; After finishing piece of transmission, a high position is read address modification, and low level is read the address and is changed to a fixing initial value, and the start address of reading next bag with assurance is identical.When receiving a piece, the count value of block counter adds 1, and when sending a piece, the count value of block counter subtracts 1, and the maximal value of block counter equals total number of storage block among this FIFO.The count value of block count is 0 o'clock, and empty full scale will produces the empty sign of logic output, and when the count value of block count reached preset threshold, empty full scale will produced logic output full scale will.
Under the prerequisite based on the home block scheduling, block FIFO does not need to wait for, has realized the dispatching efficiency higher than byte level FIFO.But block FIFO is low to the service efficiency of storer, and for example, the size of setting piece is 128 bytes, if the bag of input is 129 bytes, second piece has only 1 storage unit to be used so, wasted a large amount of memory resources.
Summary of the invention
The objective of the invention is to provide a kind of high reliability byte level to write the bag level and read pushup storage at the problems referred to above.
Another object of the present invention provides the method that a kind of pushup storage is exported empty full scale will.
Pushup storage of the present invention comprises that storer, write address counter, read address counter, byte counter and empty full scale will produce logic, wherein:
Write address counter is used for basis to be counted from the write signal of external circuit, and the write address count value that obtains is sent to storer and byte counter;
Read address counter is used for basis to be counted from the read signal of external circuit, and the address count value of reading that will obtain sends to storer and byte counter;
Storer is used for the storage of data, and according to the write address count value that receives with read the address count value, adjusts write address pointer and read address pointer;
Byte counter is used for according to the write address count value that receives and reads the byte that the address count value stores storer and count, and the byte count value that obtains is sent to sky full scale will produces logic;
Package counting facility is used for the bag that storer is stored is counted, and the bag count value that will obtain sends to sky full scale will generation logic;
Empty full scale will produces logic and is used for judging according to byte count value that receives and/or bag count value whether storer is empty or full, and corresponding empty sign of output or full scale will.
Described package counting facility receives when writing bag tail signal according to wrapping the tail signal from writing of external circuit and reading to wrap the tail signal and count, and count value adds 1, receives when reading to wrap the tail signal, and count value subtracts 1.
Described empty full scale will produces logic and equals at 0 o'clock in the bag count value that receives, and determines that storer is empty, and the empty sign of output; When the byte count value that receives reaches preset threshold, determine that storer is full, and output full scale will.
Further, described empty full scale will produces logic and reaches threshold value in the byte count value that receives, and the bag count value that receives was determined that storer was full, and exported full scale will greater than 0 o'clock.
Further, pushup storage of the present invention also comprises the bag long counter, it is according to counting from the read signal of external circuit, when its count value reaches the bag length of setting, the pseudo-bag of output tail signal is to package counting facility, and receive external circuit read wrap the tail signal, receive its count value clear 0 when reading to wrap the tail signal; Described package counting facility is also counted according to puppet bag tail signal, and when receiving puppet bag tail signal, the bag count value subtracts 1.
Pushup storage of the present invention is exported the method for empty full scale will, may further comprise the steps:
Steps A, according to write signal and read signal the byte of storing in the storer is counted from external circuit, obtain the byte count value,, obtain wrapping count value according to wrapping the tail signal from writing of external circuit and reading to wrap the tail signal bag of storing in the storer is counted;
Step B according to described byte count value and/or described bag count value, judges whether storer is empty or full, and corresponding empty sign of output or full scale will.
In step B, if described bag count value is 0, determine that storer is empty, and the empty sign of output; If described byte count value reaches preset threshold, determine that storer is full, and output full scale will.
Further, in step B, if described byte count value reaches preset threshold, and described bag count value is determined that storer is full, and is exported full scale will greater than 0.
Further, in steps A, also the data length of reading is counted, long if the data length count value reaches the bag of setting, then wrap count value and subtract 1, and when the external circuit input reads to wrap the tail signal, data length count value clear 0.
The invention has the beneficial effects as follows: realized that byte level writes and wraps level and reads, byte level writes the memory resource that can utilize to maximal efficiency among the FIFO, and the bag level is read and can be realized dispatching efficiency in maximal efficiency ground; Propose byte level simultaneously and write bag level and read the self-recovery method of FIFO defective, improved the reliability and the fault-tolerance of design.
Description of drawings
Fig. 1 is the structural representation of FIFO of the present invention;
Fig. 2 is the structural representation that has increased the FIFO of a bag long counter on Fig. 1 basis.
Embodiment
Describe the present invention below in conjunction with accompanying drawing.
Key of the present invention is on existing FIFO, increased a package counting facility, this package counting facility is used for the bag that storer is stored is counted, and the bag count value that will obtain sends to sky full scale will generation logic, byte count value that empty full scale will generation logical foundation receives and/or bag counting count value judge whether storer is empty or full, and export corresponding empty sign or full scale will.
As shown in Figure 1, FIFO of the present invention comprises that storer, write address counter, read address counter, byte counter, package counting facility and empty full scale will produce logic, wherein:
Write address counter is used for basis to be counted from the write signal of external circuit, and the write address count value that obtains is sent to storer and byte counter;
Read address counter is used for basis to be counted from the read signal of external circuit, and the address count value of reading that will obtain sends to storer and byte counter;
Storer is used for the storage of data, and according to the write address count value that receives with read the address count value, adjusts write address pointer and read address pointer;
Byte counter is used for according to the write address count value that receives and reads the byte that the address count value stores storer and count, and the byte count value that obtains is sent to sky full scale will produces logic;
Package counting facility is used for the bag that storer is stored is counted, and the bag count value that will obtain sends to sky full scale will generation logic;
Empty full scale will produces logic and is used for judging according to byte count value that receives and/or bag count value whether storer is empty or full, and corresponding empty sign of output or full scale will.
Described storer is random access memory (RAM), as: dual-ported memory (DPRAM), one-port memory (SPRAM) etc., optimal way of the present invention is a dual-ported memory.
Described read address counter is trigger pip with the read signal, whenever reads data, reads the address count value and adds 1, is added to after maximal value becomes 0, continues to add 1 if there are data to read.Described write address counter is trigger pip with the write signal, whenever writes 1 data, and the write address count value adds 1, is added to after maximal value becomes 0, continues to add 1 if there are data to write.The count value of the package counting facility among the present invention is the bag level, therefore is called package counting facility.When receiving or sending a bag, package counting facility upgrades count value according to the control signal that receives.Package counting facility receives when writing bag tail signal according to wrapping the tail signal from writing of external circuit and reading to wrap the tail signal and count, and count value adds 1, receives when reading to wrap the tail signal, and count value subtracts 1.
Empty full scale will produces logic and comprises two output terminals: empty mark output end and full scale will output terminal.Empty mark output end sends to the outside read through model that FIFO is carried out read operation with empty marking signal; Full scale will output terminal sends to the outside writing module that FIFO is carried out write operation with full scale will signal.The output terminal of empty full scale will can be represented the effective or invalid of empty full scale will by output high level or low level.Such as: represent effectively that when being output as high level low level represents when invalid that if FIFO is for full, then full scale will output terminal is changed to high level, otherwise is changed to low level; If FIFO is empty, then empty mark output end is changed to high level, otherwise is changed to low level.Empty full scale will produces logic output terminal and places high level effectively still to place low level effective, can be determined by deviser oneself.Can produce back-pressure to the interface that reads or writes of FIFO after sky or full scale will are effective, stop the outside to read or write data to the storer of FIFO.
Specifically, empty full scale will produces logic and equals at 0 o'clock in the bag count value that receives, and determines that storer is empty, and the empty sign of output; Empty full scale will produces logic when the byte count value that receives reaches preset threshold, determines that storer is full, and output full scale will.
Under normal circumstances, aforesaid way does not have problem.But FIFO is interfered in use (for example clock interference), some abnormal conditions can appear, illustrate two kinds of abnormal conditions and solution below.
1) the byte count value has reached threshold value, and at this moment, empty full scale will produces logic output full scale will, and FIFO is in full state.When being interfered, the bag count value might become 0, and the bag count value becomes at 0 o'clock, and empty full scale will produces the empty sign of logic output, and FIFO is in empty state.FIFO has exported empty sign and full scale will simultaneously like this, and the outside can not read to write FIFO.
In this case, the condition of empty full scale will generation logic output full scale will is: the byte count value that receives reaches threshold value, and the bag count value that receives is greater than 0.Like this, FIFO just can have been read in the outside.
2) FIFO is initialized as sky, and wrap count value and the byte count value all is 0 this moment, owing to be interfered, it is non-0 that the bag count value becomes, and the state of FIFO is a non-NULL.This moment, FIFO can be read in the outside, but what read is invalid data, owing to do not wrap tail tag will symbol among the FIFO, the bag count value is constant always, can not export empty sign, and causing reading end can't stop.
In this case, as shown in Figure 2, can increase by a bag long counter, it is according to counting from the read signal of external circuit, when its count value reaches the bag length of setting, the pseudo-bag of output tail signal is to package counting facility, described bag long counter also receive external circuit read wrap the tail signal, receive its count value clear 0 when reading to wrap the tail signal.Bag length can be set as required, as long as grow up than the longest bag in the transmission.Described package counting facility is also counted according to puppet bag tail signal, and when receiving puppet bag tail signal, the bag count value subtracts 1.Like this, if never have writing data into memory, the bag count value will be reduced to 0 gradually, and empty full scale will produces logic output sky and indicates, reads end and stops read data.
The method that pushup storage of the present invention is exported empty full scale will may further comprise the steps:
Steps A is counted the byte of storing in the storer according to write signal and read signal from external circuit, obtains the byte count value; According to wrapping the tail signal from writing of external circuit and reading to wrap the tail signal bag of storing in the storer is counted, obtain wrapping count value.
When writing a byte, the byte count value adds 1, and when reading a byte, the byte count value subtracts 1; When bag tail signal was write in one of external circuit input, the bag count value added 1, and when one of external circuit input read to wrap the tail signal, the bag count value subtracted 1.
Step B according to described byte count value and/or described bag count value, judges whether storer is empty or full, and corresponding empty sign of output or full scale will.
In step B, if described bag count value is 0, determine that storer is empty, and the empty sign of output; If described byte count value reaches preset threshold, determine that storer is full, and output full scale will.
Further, in step B, if described byte count value reaches preset threshold, and described bag count value is determined that storer is full, and is exported full scale will greater than 0.
Further, in steps A, also the data length of reading is counted, long if the data length count value reaches the bag of setting, then wrap count value and subtract 1, and when the external circuit input reads to wrap the tail signal, data length count value clear 0.
FIFO of the present invention has realized that byte level writes and wraps level and reads, and byte level writes the memory resource that can utilize to maximal efficiency among the FIFO, and the bag level is read and can be realized dispatching efficiency in maximal efficiency ground.Thereby FIFO of the present invention has improved dispatching efficiency when effectively utilizing memory storage space.The present invention has proposed byte level simultaneously and has write bag level and read the self-recovery method of FIFO defective, has improved the reliability and the fault-tolerance of design.
The above only is preferred embodiment of the present invention, and is in order to restriction the present invention, within the spirit and principles in the present invention not all, any modification of being done, is equal to replacement, improvement etc., all should be included in of the present invention comprising within the scope.
Claims (11)
1. a pushup storage comprises that storer, write address counter, read address counter, byte counter and empty full scale will produce logic, wherein,
Described write address counter is used for basis to be counted from the write signal of external circuit, and the write address count value that obtains is sent to storer and byte counter;
Described read address counter is used for basis to be counted from the read signal of external circuit, and the address count value of reading that will obtain sends to storer and byte counter;
Described storer is used for the storage of data, and according to the write address count value that receives with read the address count value, adjusts write address pointer and read address pointer;
Described byte counter is used for according to the write address count value that receives and reads the byte that the address count value stores storer and count, and the byte count value that obtains is sent to sky full scale will produces logic;
It is characterized in that: also comprise package counting facility,
Described package counting facility is used for the bag that storer is stored is counted, and the bag count value that will obtain sends to sky full scale will generation logic;
Described empty full scale will produces logic and is used for judging according to byte count value that receives and/or bag count value whether storer is empty or full, and corresponding empty sign of output or full scale will.
2. pushup storage as claimed in claim 1 is characterized in that:
Described package counting facility receives when writing bag tail signal according to wrapping the tail signal from writing of external circuit and reading to wrap the tail signal and count, and count value adds 1, receives when reading to wrap the tail signal, and count value subtracts 1.
3. pushup storage as claimed in claim 1 or 2 is characterized in that:
Described empty full scale will produces logic and equals at 0 o'clock in the bag count value that receives, and determines that storer is empty, and the empty sign of output.
4. pushup storage as claimed in claim 1 or 2 is characterized in that:
Described empty full scale will produces logic when the byte count value that receives reaches preset threshold, determines that storer is full, and output full scale will.
5. pushup storage as claimed in claim 1 or 2 is characterized in that:
Described empty full scale will produces logic and reaches threshold value in the byte count value that receives, and the bag count value that receives was determined that storer was full, and exported full scale will greater than 0 o'clock.
6. pushup storage as claimed in claim 1 or 2 is characterized in that:
Also comprise the bag long counter, it is according to counting from the read signal of external circuit, and when its count value reached the bag length of setting, the pseudo-bag of output tail signal was to package counting facility, and receive external circuit read wrap the tail signal, receive its count value clear 0 when reading to wrap the tail signal;
Described package counting facility is also counted according to puppet bag tail signal, and when receiving puppet bag tail signal, the bag count value subtracts 1.
7. a pushup storage is exported the method for empty full scale will, it is characterized in that, may further comprise the steps:
Steps A, according to write signal and read signal the byte of storing in the storer is counted from external circuit, obtain the byte count value,, obtain wrapping count value according to wrapping the tail signal from writing of external circuit and reading to wrap the tail signal bag of storing in the storer is counted;
Step B according to described byte count value and/or described bag count value, judges whether storer is empty or full, and corresponding empty sign of output or full scale will.
8. method as claimed in claim 7 is characterized in that:
In step B, if described bag count value is 0, determine that storer is empty, and the empty sign of output.
9. method as claimed in claim 7 is characterized in that:
In step B, if described byte count value reaches preset threshold, determine that storer is full, and output full scale will.
10. method as claimed in claim 7 is characterized in that:
In step B, if described byte count value reaches preset threshold, and described bag count value is determined that storer is full, and is exported full scale will greater than 0.
11. method as claimed in claim 7 is characterized in that:
In steps A, also the data length of reading is counted, long if the data length count value reaches the bag of setting, then wrap count value and subtract 1, and when the external circuit input reads to wrap the tail signal, data length count value clear 0.
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| CNB2006100731943A CN100346289C (en) | 2006-04-12 | 2006-04-12 | FIFO memory and method for output empty full marker thereof |
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Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101281489B (en) * | 2007-04-03 | 2010-05-26 | 中兴通讯股份有限公司 | FIFO memory implementing method and apparatus |
| CN102013935A (en) * | 2010-01-21 | 2011-04-13 | 柳州市达迪通信设备有限公司 | E1 signal extracting method and device |
| CN103678189A (en) * | 2012-08-31 | 2014-03-26 | Nxp股份有限公司 | SRAM handshake |
| CN106445842A (en) * | 2016-09-18 | 2017-02-22 | 北京机械设备研究所 | Data cache and data caching method |
| CN108108148A (en) * | 2016-11-24 | 2018-06-01 | 舒尔电子(苏州)有限公司 | A kind of data processing method and device |
| CN108268238A (en) * | 2018-01-24 | 2018-07-10 | 深圳市风云实业有限公司 | Data processing method, device, computer storage media and FIFO device |
| CN109358835A (en) * | 2018-10-25 | 2019-02-19 | 天津市滨海新区信息技术创新中心 | FIFO memory and its data transmission method |
| CN111367495A (en) * | 2020-03-06 | 2020-07-03 | 电子科技大学 | Asynchronous first-in first-out data cache controller |
| CN112437021A (en) * | 2020-11-30 | 2021-03-02 | 清华大学 | Routing control method, device, routing equipment and storage medium |
| CN113472486A (en) * | 2021-06-30 | 2021-10-01 | 四川省分析测试服务中心 | Efficient retransmission method and device for low-frequency acquisition of instrument operation data |
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| JPH05224880A (en) * | 1992-02-12 | 1993-09-03 | Matsushita Electric Ind Co Ltd | Fifo buffer circuit |
| JPH0683581A (en) * | 1992-09-03 | 1994-03-25 | Matsushita Electric Ind Co Ltd | First-in first-out buffer circuit |
| CN100396052C (en) * | 2004-03-12 | 2008-06-18 | 华为技术有限公司 | FIFO memory with high reliability and implementing method thereof |
| CN100531104C (en) * | 2004-03-12 | 2009-08-19 | 华为技术有限公司 | A FIFO memory with high reliability and implementing method thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101281489B (en) * | 2007-04-03 | 2010-05-26 | 中兴通讯股份有限公司 | FIFO memory implementing method and apparatus |
| CN102013935A (en) * | 2010-01-21 | 2011-04-13 | 柳州市达迪通信设备有限公司 | E1 signal extracting method and device |
| CN102013935B (en) * | 2010-01-21 | 2014-09-17 | 柳州市达迪通信设备有限公司 | E1 signal extracting method and device |
| CN103678189A (en) * | 2012-08-31 | 2014-03-26 | Nxp股份有限公司 | SRAM handshake |
| CN106445842A (en) * | 2016-09-18 | 2017-02-22 | 北京机械设备研究所 | Data cache and data caching method |
| CN108108148A (en) * | 2016-11-24 | 2018-06-01 | 舒尔电子(苏州)有限公司 | A kind of data processing method and device |
| CN108268238A (en) * | 2018-01-24 | 2018-07-10 | 深圳市风云实业有限公司 | Data processing method, device, computer storage media and FIFO device |
| CN109358835A (en) * | 2018-10-25 | 2019-02-19 | 天津市滨海新区信息技术创新中心 | FIFO memory and its data transmission method |
| CN111367495A (en) * | 2020-03-06 | 2020-07-03 | 电子科技大学 | Asynchronous first-in first-out data cache controller |
| CN111367495B (en) * | 2020-03-06 | 2023-03-28 | 电子科技大学 | Asynchronous first-in first-out data cache controller |
| CN112437021A (en) * | 2020-11-30 | 2021-03-02 | 清华大学 | Routing control method, device, routing equipment and storage medium |
| CN112437021B (en) * | 2020-11-30 | 2022-03-29 | 清华大学 | Routing control method, device, routing equipment and storage medium |
| CN113472486A (en) * | 2021-06-30 | 2021-10-01 | 四川省分析测试服务中心 | Efficient retransmission method and device for low-frequency acquisition of instrument operation data |
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