CN1858914A - Cmos-bildsensoren und verfahren zum herstellen derselben - Google Patents
Cmos-bildsensoren und verfahren zum herstellen derselben Download PDFInfo
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- CN1858914A CN1858914A CNA200510125139XA CN200510125139A CN1858914A CN 1858914 A CN1858914 A CN 1858914A CN A200510125139X A CNA200510125139X A CN A200510125139XA CN 200510125139 A CN200510125139 A CN 200510125139A CN 1858914 A CN1858914 A CN 1858914A
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- 239000004065 semiconductor Substances 0.000 claims abstract description 32
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 8
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 8
- 239000010703 silicon Substances 0.000 claims abstract description 8
- 238000000034 method Methods 0.000 claims description 51
- 238000009413 insulation Methods 0.000 claims description 42
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 32
- 230000003647 oxidation Effects 0.000 claims description 17
- 238000007254 oxidation reaction Methods 0.000 claims description 17
- 229910052757 nitrogen Inorganic materials 0.000 claims description 16
- 239000000758 substrate Substances 0.000 claims description 14
- 150000004767 nitrides Chemical class 0.000 claims description 13
- 230000004888 barrier function Effects 0.000 claims description 12
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 11
- 239000001301 oxygen Substances 0.000 claims description 11
- 229910052760 oxygen Inorganic materials 0.000 claims description 11
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 10
- 238000000137 annealing Methods 0.000 claims description 9
- 239000001257 hydrogen Substances 0.000 claims description 9
- 229910052739 hydrogen Inorganic materials 0.000 claims description 9
- 238000001514 detection method Methods 0.000 claims description 7
- 235000012239 silicon dioxide Nutrition 0.000 claims description 5
- 239000000377 silicon dioxide Substances 0.000 claims description 5
- 238000005121 nitriding Methods 0.000 claims description 4
- 239000001307 helium Substances 0.000 claims description 2
- 229910052734 helium Inorganic materials 0.000 claims description 2
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 claims description 2
- 125000004435 hydrogen atom Chemical class [H]* 0.000 claims 3
- 239000013078 crystal Substances 0.000 claims 2
- 239000010410 layer Substances 0.000 description 39
- 239000002800 charge carrier Substances 0.000 description 8
- 238000009792 diffusion process Methods 0.000 description 7
- 238000005229 chemical vapour deposition Methods 0.000 description 5
- 239000002019 doping agent Substances 0.000 description 4
- 230000002000 scavenging effect Effects 0.000 description 4
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 3
- 150000002431 hydrogen Chemical class 0.000 description 3
- 238000003384 imaging method Methods 0.000 description 3
- 238000009825 accumulation Methods 0.000 description 2
- 229910052785 arsenic Inorganic materials 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 239000011229 interlayer Substances 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- VIKNJXKGJWUCNN-XGXHKTLJSA-N norethisterone Chemical compound O=C1CC[C@@H]2[C@H]3CC[C@](C)([C@](CC4)(O)C#C)[C@@H]4[C@@H]3CCC2=C1 VIKNJXKGJWUCNN-XGXHKTLJSA-N 0.000 description 2
- 229910052698 phosphorus Inorganic materials 0.000 description 2
- 238000001259 photo etching Methods 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 229920005591 polysilicon Polymers 0.000 description 2
- 230000006641 stabilisation Effects 0.000 description 2
- 238000011105 stabilization Methods 0.000 description 2
- 230000036962 time dependent Effects 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 230000000717 retained effect Effects 0.000 description 1
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- H01L27/144—Devices controlled by radiation
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Abstract
A CMOS image sensor includes an image transfer transistor therein. This image transfer transistor includes a semiconductor channel region of first conductivity type and an electrically conductive gate on the semiconductor channel region. A gate insulating region is also provided. The gate insulating region extends between the semiconductor channel region and the electrically conductive gate. The gate insulating region includes a nitridated insulating layer extending to an interface with the electrically conductive gate and a substantially nitrogen-free insulating layer extending to an interface with the semiconductor channel region. The nitridated insulating layer may be a silicon oxynitride (SiON) layer.
Description
With reference to patent application formerly
This patent application requires the priority of the 2005-36632 korean patent application of submission on May 2nd, 2005, and is for reference in this content of quoting this patent application.
Technical field
The present invention relates to integrated circuit (IC)-components, the method that the present invention relates more particularly to image sensor integrated circuit and forms this image sensor integrated circuit.
Background technology
Cmos image sensor generally includes the two-dimensional array image sensor cell, and this image sensor cell contains the image transfer transistor.Dispose these imageing sensor transistors, control with transfer to the semiconductor light emitting electron hole pair that accumulates during the image detection time interval.As shown in Figure 1, traditional cmos image sensor unit 10 comprises photodiode (P/D), image transfer transistor T X, reset transistor RX, selection transistor SX and the access transistor AX that connects as shown in the figure.Select the grid end of transistor SX to be connected to floating diffusion region (F/D).When starting image transfer transistor T X, this floating diffusion region F/D receives charge carrier from photodiode P/D.Receive photon radiation at photodiode P/D, then, when producing electron hole pair within it, produce these charge carriers.The grid end of transistor SX is selected in the charge carrier biasing of floating diffusion region F/D accumulation.In addition, by this zone is electrically connected to positive voltage VDD, starting reset transistor RX is with the floating diffusion region F/D that resets.
The data of a large amount of charge carrier reflections of floating diffusion region F/D accumulation make selects transistor SX conducting, thereby voltage power line VDD is connected to the current-carrying end of access transistor AX.When on corresponding line (ROW) make access transistor AX conducting when receiving effective high pressure, this access transistor AX work with when selecting transistor SX and the equal conducting of access transistor AX, makes supply voltage VDD be delivered to output line (OUT).For high quality graphic is provided, usually, require when making image transfer transistor T X conducting, to make charge carrier highly transfer to floating diffusion region F/D from photodiode P/D.In order to prevent ghost image imaging (that is, picture lag), need height transfer charge carrier like this.When the charge carrier of photodiode P/D generation is retained in the photodiode P/D, after fragmentary is as transfering transistor, the ghost image imaging may take place.The charge carrier of this remnants influences photodiode P/D usually and then gathers photon (for example, during the next frame of demonstration/image sequence) immediately, and may cause forming image artefacts, has reduced picture quality like this.
Summary of the invention
Embodiments of the invention comprise having the transistorized image detection device of image transfer in it.This image transfer transistor comprises: semiconductor channel area is first conductivity type; And conductive gate, be positioned on this semiconductor channel area.Also be provided with the gate insulation district.Extend between semiconductor channel area and conductive gate in this gate insulation district.This gate insulation district comprises: the nitrogenize insulating barrier extends to the interface with conductive gate; And do not have the nitrogen insulating barrier substantially, extend to interface with semiconductor channel area.In some embodiment of these embodiment, the nitrogenize insulating barrier comprises silicon oxynitride (SiON), can form it by the upper surface of nitrided silicon dioxide layer.The thickness in gate insulation district can be at about 30 to the scope of about 100 .
Other image detection devices according to the present invention comprise: semiconductor region has photodiode in it; And the image transfer transistor, be positioned on this semiconductor region.This image transfer transistor comprises semiconductor channel area, and it is first conductivity type, is electrically connected to photodiode.Also on semiconductor channel area, be provided with conductive gate.Also be provided with the gate insulation district, it extends between semiconductor channel area and conductive gate.This gate insulation district comprises: the nitrogenize insulating barrier extends to the interface with this conductive gate; And do not have the nitrogen insulating barrier substantially, extend to interface with this semiconductor channel area.
Another embodiment of the present invention comprises a kind of transistorized method of image transfer that forms the image detection device.This method is included in the upper surface that forms gate insulation district and this gate insulation district of nitrogenize on the Semiconductor substrate.Nitriding step is included in and carries out decompress(ion) pecvd nitride (DPN) processing procedure in the gate insulation district.At room temperature, can carry out this DPN processing procedure, and hold the roughly nitrogen (N of uniform flow
2) and the reative cell of helium (He) in can carry out this DPN and handle.Then, on the nitrogenize upper surface in gate insulation district, can form conductive gate.In some embodiment of these embodiment, after the nitriding step of execution, containing under the nitrogen environment, carry out the step that makes the annealing of gate insulation district.Can also after the step of having carried out the formation conductive gate, contain under the nitrogen environment, carrying out the step that makes the annealing of gate insulation district.
In yet another embodiment of the present invention, the step that forms the gate insulation district comprises, utilizes the free-radical oxidation processing procedure, forms gate oxide layers on Semiconductor substrate.Hydrogen (H can held
2) and oxygen (O
2) reative cell in carry out this free-radical oxidation processing procedure.Can also be with about 450 ℃ of temperature to about 950 ℃ of scopes, and, carry out free-radical oxidation processing procedure (radical oxidation process) with the pressure of about 2 torrs to about 5 torrs.In addition, oxygen (O
2) and hydrogen (H
2) velocity ratio about 70 to about 110 scope.Particularly, hydrogen (H
2) and oxygen (O
2) can be mobile with the speed of about 0.1sccm and about 9.0sccm respectively.
Description of drawings
Fig. 1 is the circuit theory diagrams of traditional cmos image sensor cell.
Fig. 2 A to 2E illustrates the cutaway view that forms the intermediate structure of the transistorized method of image transfer according to the embodiment of the invention.
Fig. 3 be illustrated in free-radical oxidation and handle during the curve chart of time dependent reaction chamber temperature.
Fig. 4 is the curve chart of time dependent reaction chamber temperature during the PNA annealing in process.
Fig. 5 A to 5D illustrates the cutaway view of intermediate structure that forms the method for cmos image sensor according to the embodiment of the invention.
Embodiment
To the present invention be described more comprehensively referring to accompanying drawing below, accompanying drawing illustrates the preferred embodiments of the present invention.Yet the present invention can realize the present invention with different forms, and should not be interpreted as the embodiment that is confined in this explanation to the present invention.On the contrary, it is in order to make the disclosure thoroughly and comprehensively that these embodiment are provided, and in order to make the disclosure to those skilled in the art's comprehensive representation scope of the present invention.In the accompanying drawings, for the sake of clarity, each layer and regional thickness are amplified.It is also to be understood that, claim one deck be positioned at another layer or substrate " on " time, it can be located immediately on this another layer or the substrate, also can have the intermediate layer.In addition, term " first conductivity type " and " second conductivity type " refer to opposite conductivity type, for example, and N type or P type, yet, also all comprise its complementary embodiment at this each embodiment that describes and illustrate.In whole specification, same numbering is represented same element.
Shown in Fig. 2 A, form the transistorized method of image transfer according to the embodiment of the invention and be included in formation channel region 22 on the Semiconductor substrate 20.If the image transfer transistor is a nmos pass transistor, then channel region 22 can be formed p type island region, and if the image transfer transistor is the PMOS transistor, then it is formed N type district.Channel region 22 is electrically connected to photodiode P/D.This photodiode comprises p type island region 24 (anode) and N type district 26 (negative electrode).By B or BF2 are implanted in the substrate 20, can form p type island region 24, and, can form N type district 26 by P or As are implanted substrate 20.Shown in Fig. 2 B, can on the surface of substrate 20, form gate insulation layer 28.Can utilize thermal oxidation, chemical vapor deposition (CVD) or free-radical oxidation are handled, and form this gate insulation layer 28.The thickness of formed gate insulation layer 28 can be in the scope between about 30 and about 100 .Hydrogen (H can held
2) and oxygen (O
2) reative cell in carry out free-radical oxidation and handle, and can carry out free-radical oxidation in about 450 ℃ of temperature to about 950 ℃ of scopes and handle.As shown in Figure 3, the temperature during the free-radical oxidation in the reative cell can be at 0t in the time interval of 11t, and the high temperature from 450 ℃ low temperature to 950 ℃ changes in time, and wherein " t " is illustrated in from 0 to 11t the time interval when inhomogeneous, the value that can change.During free-radical oxidation is handled, can make the pressure of reative cell be maintained at about 2 torrs to the scope of about 5 torrs.Hydrogen (H
2) and oxygen (O
2) can be so that oxygen-hydrogen gas rate is than flowing in about 70 speed to about 110 the scope.Particularly, hydrogen (H
2) and oxygen (O
2) can be mobile with the speed of about 0.1sccm and 9.0sccm respectively.
With reference to figure 2C, on gate insulation layer 28, directly form thin nitride layer 30.Utilization can be with the silicon dioxide (SiO on the gate insulation layer 28
2) surface area be transformed to decoupled plasma nitrogenize (DPN) method of silicon oxynitride (SiON), can in process chamber, form this thin nitride layer 30.Although do not wish to be subjected to the restriction of any theory, but can believe, this thin nitride layer can be as the dopant blocking layer (for example, the boron diffusion trapping layer), it stops the grid course outdiffusion of dopant from basically forming, improve the transistorized noise characteristic of image transfer, and prevent the ghost image imaging.This DPN processing procedure can comprise, under the chamber RF power situation of the fixedly constant pressure of 80 milli torrs and 500 watts, at room temperature, makes N
2And H
2Flow with the speed that equals 100sccm and 100sccm respectively.The thickness of formed this thin nitride layer 30 can be at about 1 to the scope of about 10 .Can comprise the incipient stability time interval (duration=10 second), touching the time interval (duration=5 second), nitridation time (duration=60 second), decompress(ion) (dechuck) time interval (duration=5 second) and final scavenging period this DPN processing procedure of execution in a series of time intervals of (duration=5 second) at interval at interval.Stabilization time be can carry out with 0 watt RF power at interval and the scavenging period interval, and the time interval and the decompress(ion) time interval touched with 500 watts RF power.After carrying out the DPN processing procedure, can keep under the 5 torr pressure, held the interior annealing steps of carrying out of process chamber of nitrogen and oxygen.
As shown in Figure 4, during back nitrogenize annealing (PNA), the temperature of reative cell can be at 0t in the time interval of 9t, and the maximum temperature from 450 ℃ low temperature to 1000 ℃ changes in time, wherein " t " is illustrated in from 0 to 9t the time interval when inhomogeneous, the value that can change.In certain embodiments, can on gate insulation layer, form after the subsequent step of conductive gate layer, carry out the PNA step.On thin nitride layer 30, form conductive gate layer 32, shown in Fig. 2 D.For example, can form this conductive gate layer 32 by polysilicon.With reference to figure 2E, utilize photoetching process, grid layer 32, nitride layer 30 and gate insulation layer 28 are patterned into regional 32a, 30a and 28a, to determine the transistorized insulated gate of image transfer.
Now, with reference to figure 5A-5D, the method that forms image sensor devices is included in channel separating zone 53 and the channel region 52 that forms first conductivity type on the Semiconductor substrate 50.If this transducer adopts NMOS image transfer transistor, then channel region 52 forms p type island region, and if this transducer employing PMOS image transfer transistor then forms N type district with this channel region 52.Also with channel region 52 adjacent formation photodiodes.On substrate 50, this photodiode is formed the P-N knot.This P-N knot comprises p type island region 54 and N type district 56.Typical P type dopant comprises B and BF2, and typical N type dopant comprises As and P.On the surface of substrate 50, form gate insulation layer 58.Can utilize thermal oxidation, chemical vapor deposition (CVD) method or free-radical oxidation are handled, and form this gate insulation layer 58, and be as above described with reference to figure 2A-2E.The thickness of formed gate insulation layer 58 can be in the scope between about 30 and about 100 .After this, directly on gate insulation layer 58, form thin nitride layer 60.Can utilize the silicon dioxide (SiO on the gate insulation layer 58
2) be converted to decompress(ion) pecvd nitride (DPN) method of silicon oxynitride (SiON), in process chamber, form this thin nitride layer 60.
This DPN processing procedure can comprise, under the chamber RF power situation of the fixedly constant pressure of 80 milli torrs and 500 watts, at room temperature, makes N
2And H
2Flow with the speed that equals 100sccm and 100sccm respectively.The thickness of formed this thin nitride layer 60 can be at about 1 to the scope of about 10 .Can comprise the incipient stability time interval (duration=10 second), touching the time interval (duration=5 second), nitridation time (duration=60 second), decompress(ion) (dechuck) time interval (duration=5 second) and final scavenging period this DPN processing procedure of execution in a series of time intervals of (duration=5 second) at interval at interval.Can carry out with 0 watt RF power stabilization time at interval and scavenging period at interval, and touch the time interval, nitridation time interval and the decompress(ion) time interval with 500 watts RF power.After carrying out the DPN processing procedure, can keep under the 5 torr pressure, held the interior annealing steps of carrying out of process chamber of nitrogen and oxygen.As shown in Figure 4, during back nitrogenize annealing (PNA), the temperature of reative cell can be at 0t in the time interval of 9t, and the maximum temperature from 450 ℃ low temperature to 1000 ℃ changes in time, wherein " t " is illustrated in from 0 to 9t the time interval when inhomogeneous, the value that can change.Then, can on thin nitride layer 60, form conductive gate layer 62.For example, can form this conductive gate layer 62 by polysilicon.
Now, with reference to figure 5B, utilize photoetching process, patterned conductive grid layer 62 and gate insulation layer 58 are with the grid (regional 62a, 60a and 58a) of determining image transfer transistor T X, the grid (regional 62b, 60b and 58b) of reset transistor RX and the grid (regional 62c, 60c and 58c) of selecting transistor SX.After this, on corresponding grid, form many metal line 64a, 64b and 64c, shown in Fig. 5 C.In interlayer insulating film 68, also metal wire 66 is formed the resistance light shield, can utilize the CVD method, form this resistance light shield.
Now,, conventional art be can utilize, colour filter 70, outer coating 72 and microlens array 74 on interlayer insulating film 68, formed with reference to figure 5D.Passivation layer can also further be set on microlens array 74.
In drawing and description, typical preferred embodiment of the present invention is disclosed, although and adopted particular term, only use them, and do not have restricted meaning with general meaning and descriptive sense, following claim limits scope of the present invention.
Claims (25)
1. image transfer transistor that is used for the image detection device comprises:
Semiconductor channel area is first conductivity type;
Conductive gate is positioned on the described semiconductor channel area; And
Extend between described semiconductor channel area and described conductive gate in the gate insulation district, and described gate insulation district comprises: the nitrogenize insulating barrier extends to the interface with described conductive gate; And do not have the nitrogen insulating barrier substantially, extend to interface with described semiconductor channel area.
2. image transfer transistor according to claim 1, wherein the nitrogenize insulating barrier comprises silicon oxynitride (SiON).
3. image transfer transistor according to claim 1, wherein said conductive gate comprises the multi-crystal silicon area of first conductivity type.
4. image transfer transistor according to claim 2, the thickness in wherein said gate insulation district at about 30 to the scope of about 100 .
5. image transfer transistor according to claim 1, wherein said gate insulation district comprises the silicon dioxide layer with nitrogenize upper surface.
6. image transfer transistor according to claim 1, the percentage by weight that does not wherein have nitrogen on the nitrogen insulating barrier substantially is approximately less than 10%.
7. image detection device comprises:
Semiconductor region wherein has photodiode; And
The image transfer transistor is positioned on the described semiconductor region, and described image transfer transistor comprises:
Semiconductor channel area is first conductivity type, is electrically connected to photodiode;
Conductive gate is positioned on the semiconductor channel area; And
Extend between semiconductor channel area and conductive gate in the gate insulation district, and described gate insulation district comprises: the nitrogenize insulating barrier extends to the interface with this conductive gate; And do not have the nitrogen insulating barrier substantially, extend to interface with this semiconductor channel area.
8. device according to claim 7, wherein the nitrogenize insulating barrier comprises silicon oxynitride (SiON).
9. device according to claim 7, wherein said conductive gate comprises the multi-crystal silicon area of first conductivity type.
10. device according to claim 8, the thickness in wherein said gate insulation district at about 30 to the scope of about 100 .
11. device according to claim 7, wherein said gate insulation district comprises the silicon dioxide layer with nitrogenize upper surface.
12. the transistorized method of image transfer that is used to form the image detection device comprises step:
On Semiconductor substrate, form the gate insulation district;
The upper surface in this gate insulation district of nitrogenize; And
On the nitrogenize upper surface in this gate insulation district, form conductive gate.
13. method according to claim 12 has wherein been carried out after the described nitriding step, is containing under the nitrogen environment, carries out the step that makes the annealing of gate insulation district.
14. method according to claim 12, wherein carried out the described step that forms conductive gate after, containing under the nitrogen environment, carry out the step that makes the annealing of gate insulation district.
15. method according to claim 12, wherein said nitriding step are included in and carry out decompress(ion) pecvd nitride (DPN) processing procedure in the gate insulation district.
16. method according to claim 15 is wherein carried out the DPN processing procedure with room temperature approximately.
17. method according to claim 15 is wherein being held the roughly nitrogen (N of uniform flow
2) and the reative cell of helium (He) in carry out DPN and handle.
18. method according to claim 15, wherein the DPN processing procedure comprises with about 500 watts nitrogen plasma is powered up.
19. method according to claim 12, wherein the described step in form gate insulation district comprises and utilizes the free-radical oxidation processing procedure, forms gate oxide layers on Semiconductor substrate.
20. method according to claim 19 is wherein being held hydrogen (H
2) and oxygen (O
2) reative cell in carry out the free-radical oxidation processing procedure.
21. method according to claim 20 wherein with the temperature in about 450 ℃ to 950 ℃ scopes, is carried out the free-radical oxidation processing procedure.
22. method according to claim 21 wherein with the pressure of about 2 torrs to about 5 torr scopes, is carried out the free-radical oxidation processing procedure.
23. method according to claim 21, wherein hydrogen (H
2) and oxygen (O
2) mobile with the speed of about 0.1sccm and about 9.0sccm respectively.
24. method according to claim 12, the described step that wherein forms the gate insulation district is included in and forms the gate oxide layers that does not have nitrogen substantially on the Semiconductor substrate.
25. method according to claim 21, wherein oxygen (O
2) and hydrogen (H
2) velocity ratio about 70 to about 110 scope.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020050036632A KR100672812B1 (en) | 2005-05-02 | 2005-05-02 | Image sensor and method of manufacturing the same |
| KR1020050036632 | 2005-05-02 | ||
| US11/222,363 | 2005-09-08 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN1858914A true CN1858914A (en) | 2006-11-08 |
Family
ID=37233644
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNA200510125139XA Pending CN1858914A (en) | 2005-05-02 | 2005-11-21 | Cmos-bildsensoren und verfahren zum herstellen derselben |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US20060244087A1 (en) |
| KR (1) | KR100672812B1 (en) |
| CN (1) | CN1858914A (en) |
| TW (1) | TW200640026A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102456732A (en) * | 2010-10-19 | 2012-05-16 | 格科微电子（上海）有限公司 | MOS (Metal Oxide Semiconductor) transistor and manufacturing method thereof as well as CMOS (Complementary Metal Oxide Semiconductor) image sensor |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100929349B1 (en) * | 2007-01-30 | 2009-12-03 | 삼성전자주식회사 | Color pixels, image sensors, and color interpolation methods that do not include organic color filters |
| CN103855006A (en) * | 2012-11-30 | 2014-06-11 | 中国科学院微电子研究所 | Manufacturing method of semiconductor device |
| US10177091B2 (en) * | 2016-02-19 | 2019-01-08 | Globalfoundries Inc. | Interconnect structure and method of forming |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH09232555A (en) * | 1996-02-21 | 1997-09-05 | Sony Corp | Image sensor |
| US6002432A (en) * | 1996-09-10 | 1999-12-14 | Foveon, Inc. | Method for operating an active pixel sensor cell that reduces noise in the photo information extracted from the cell |
| US5869857A (en) * | 1997-04-07 | 1999-02-09 | Chen; Pao-Jung | CMOS photodetectors with wide range operating region |
| US6307243B1 (en) * | 1999-07-19 | 2001-10-23 | Micron Technology, Inc. | Microlens array with improved fill factor |
| US6909162B2 (en) * | 2001-11-02 | 2005-06-21 | Omnivision Technologies, Inc. | Surface passivation to reduce dark current in a CMOS image sensor |
| US6734099B2 (en) * | 2001-12-28 | 2004-05-11 | Texas Insturments Incorporated | System for preventing excess silicon consumption in ultra shallow junctions |
| US6780720B2 (en) * | 2002-07-01 | 2004-08-24 | International Business Machines Corporation | Method for fabricating a nitrided silicon-oxide gate dielectric |
| US6933157B2 (en) * | 2003-11-13 | 2005-08-23 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor wafer manufacturing methods employing cleaning delay period |
| US7056782B2 (en) * | 2004-02-25 | 2006-06-06 | International Business Machines Corporation | CMOS silicide metal gate integration |
| KR100632954B1 (en) * | 2005-05-06 | 2006-10-12 | 삼성전자주식회사 | Cmos image sensor and method of fabricating the same |
| US7728330B2 (en) * | 2005-08-24 | 2010-06-01 | Aptina Imaging Corporation | CMOS imager with nitrided gate oxide and method of fabrication |
-
2005
- 2005-05-02 KR KR1020050036632A patent/KR100672812B1/en not_active IP Right Cessation
- 2005-09-08 US US11/222,363 patent/US20060244087A1/en not_active Abandoned
- 2005-11-07 TW TW094138926A patent/TW200640026A/en unknown
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102456732A (en) * | 2010-10-19 | 2012-05-16 | 格科微电子（上海）有限公司 | MOS (Metal Oxide Semiconductor) transistor and manufacturing method thereof as well as CMOS (Complementary Metal Oxide Semiconductor) image sensor |
| CN102456732B (en) * | 2010-10-19 | 2014-10-08 | 格科微电子（上海）有限公司 | MOS (Metal Oxide Semiconductor) transistor and manufacturing method thereof as well as CMOS (Complementary Metal Oxide Semiconductor) image sensor |
Also Published As
| Publication number | Publication date |
|---|---|
| TW200640026A (en) | 2006-11-16 |
| KR20060114499A (en) | 2006-11-07 |
| US20060244087A1 (en) | 2006-11-02 |
| KR100672812B1 (en) | 2007-01-22 |
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